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https://github.com/libretro/Lakka-LibreELEC.git
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100 lines
3.3 KiB
Diff
100 lines
3.3 KiB
Diff
From 48432d3ed3b7011051afc3d422e50cd42ebf860b Mon Sep 17 00:00:00 2001
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From: Jerome Brunet <jbrunet@baylibre.com>
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Date: Fri, 13 Dec 2024 15:30:17 +0100
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Subject: [PATCH 13/58] FROMGIT(6.14): clk: amlogic: g12b: fix cluster A parent
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data
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Several clocks used by both g12a and g12b use the g12a cpu A clock hw
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pointer as clock parent. This is incorrect on g12b since the parents of
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cluster A cpu clock are different. Also the hw clock provided as parent to
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these children is not even registered clock on g12b.
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Fix the problem by reverting to the global namespace and let CCF pick
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the appropriate, as it is already done for other clocks, such as
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cpu_clk_trace_div.
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Fixes: 25e682a02d91 ("clk: meson: g12a: migrate to the new parent description method")
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Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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---
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drivers/clk/meson/g12a.c | 36 ++++++++++++++++++++++++------------
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1 file changed, 24 insertions(+), 12 deletions(-)
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diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
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index ff634d3a2f95..4f92b83965d5 100644
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--- a/drivers/clk/meson/g12a.c
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+++ b/drivers/clk/meson/g12a.c
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@@ -1139,8 +1139,18 @@ static struct clk_regmap g12a_cpu_clk_div16_en = {
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.hw.init = &(struct clk_init_data) {
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.name = "cpu_clk_div16_en",
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.ops = &clk_regmap_gate_ro_ops,
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- .parent_hws = (const struct clk_hw *[]) {
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- &g12a_cpu_clk.hw
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+ .parent_data = &(const struct clk_parent_data) {
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+ /*
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+ * Note:
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+ * G12A and G12B have different cpu clocks (with
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+ * different struct clk_hw). We fallback to the global
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+ * naming string mechanism so this clock picks
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+ * up the appropriate one. Same goes for the other
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+ * clock using cpu cluster A clock output and present
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+ * on both G12 variant.
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+ */
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+ .name = "cpu_clk",
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+ .index = -1,
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},
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.num_parents = 1,
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/*
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@@ -1205,7 +1215,10 @@ static struct clk_regmap g12a_cpu_clk_apb_div = {
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.hw.init = &(struct clk_init_data){
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.name = "cpu_clk_apb_div",
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.ops = &clk_regmap_divider_ro_ops,
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- .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw },
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+ .parent_data = &(const struct clk_parent_data) {
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+ .name = "cpu_clk",
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+ .index = -1,
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+ },
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.num_parents = 1,
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},
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};
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@@ -1239,7 +1252,10 @@ static struct clk_regmap g12a_cpu_clk_atb_div = {
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.hw.init = &(struct clk_init_data){
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.name = "cpu_clk_atb_div",
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.ops = &clk_regmap_divider_ro_ops,
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- .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw },
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+ .parent_data = &(const struct clk_parent_data) {
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+ .name = "cpu_clk",
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+ .index = -1,
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+ },
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.num_parents = 1,
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},
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};
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@@ -1273,7 +1289,10 @@ static struct clk_regmap g12a_cpu_clk_axi_div = {
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.hw.init = &(struct clk_init_data){
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.name = "cpu_clk_axi_div",
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.ops = &clk_regmap_divider_ro_ops,
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- .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw },
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+ .parent_data = &(const struct clk_parent_data) {
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+ .name = "cpu_clk",
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+ .index = -1,
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+ },
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.num_parents = 1,
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},
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};
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@@ -1308,13 +1327,6 @@ static struct clk_regmap g12a_cpu_clk_trace_div = {
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.name = "cpu_clk_trace_div",
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.ops = &clk_regmap_divider_ro_ops,
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.parent_data = &(const struct clk_parent_data) {
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- /*
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- * Note:
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- * G12A and G12B have different cpu_clks (with
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- * different struct clk_hw). We fallback to the global
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- * naming string mechanism so cpu_clk_trace_div picks
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- * up the appropriate one.
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- */
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.name = "cpu_clk",
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.index = -1,
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},
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--
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2.34.1
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