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39 lines
1.5 KiB
Diff
39 lines
1.5 KiB
Diff
From 1793e95601a15f93e5d9e2846281f86eb19e8fe4 Mon Sep 17 00:00:00 2001
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From: Sandor Yu <Sandor.yu@nxp.com>
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Date: Wed, 30 Dec 2020 16:05:29 +0800
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Subject: [PATCH 19/49] MLK-25199-4: drm: bridge: mhdp_hdmi: set clear avmute
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bit
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Sync HDMI TX configuation with 4.14 hdmi driver.
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Clear avmute bit must be set otherwise imx8qm hdcp not work.
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Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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Reviewed-by: Robby Cai <robby.cai@nxp.com>
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---
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drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c
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index c37a7ac6af9b..3ff43f7fb0a6 100644
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--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c
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+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c
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@@ -1,5 +1,5 @@
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/*
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- * Copyright (C) 2019 NXP Semiconductor, Inc.
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+ * Copyright (C) 2019-2021 NXP Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@@ -205,7 +205,7 @@ int cdns_hdmi_ctrl_init(struct cdns_mhdp_device *mhdp,
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/* set hdmi mode and preemble mode data enable */
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val = F_HDMI_MODE(protocol) | F_HDMI2_PREAMBLE_EN(1) | F_DATA_EN(1) |
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- F_HDMI2_CTRL_IL_MODE(1) | F_BCH_EN(1) | F_PIC_3D(0XF);
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+ F_HDMI2_CTRL_IL_MODE(1) | F_BCH_EN(1) | F_PIC_3D(0XF) | F_CLEAR_AVMUTE(1);
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ret = cdns_mhdp_reg_write(mhdp, HDTX_CONTROLLER, val);
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return ret;
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--
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2.29.2
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