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111 lines
3.2 KiB
Diff
111 lines
3.2 KiB
Diff
From e7babbfd6c66c20e81e9d728a6a4384a9a5885dd Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Sat, 15 Jan 2022 06:23:29 +0000
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Subject: [PATCH 11/25] WIP: boards: amlogic: add Radxa Zero2 defconfig
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Add a defconfig for the Radxa Zero2 SBC, using an Amlogic A311D chip.
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Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
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---
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board/amlogic/w400/MAINTAINERS | 1 +
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configs/radxa-zero2_defconfig | 77 ++++++++++++++++++++++++++++++++++
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2 files changed, 78 insertions(+)
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create mode 100644 configs/radxa-zero2_defconfig
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diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS
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index 96ccda2001..caad41577d 100644
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--- a/board/amlogic/w400/MAINTAINERS
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+++ b/board/amlogic/w400/MAINTAINERS
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@@ -3,4 +3,5 @@ M: Neil Armstrong <neil.armstrong@linaro.org>
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S: Maintained
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L: u-boot-amlogic@groups.io
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F: board/amlogic/w400/
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+F: configs/radxa-zero2_defconfig
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F: doc/board/amlogic/w400.rst
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diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig
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new file mode 100644
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index 0000000000..3ef3c9c143
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--- /dev/null
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+++ b/configs/radxa-zero2_defconfig
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@@ -0,0 +1,77 @@
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+CONFIG_ARM=y
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+CONFIG_ARCH_MESON=y
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+CONFIG_SYS_TEXT_BASE=0x01000000
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+CONFIG_NR_DRAM_BANKS=1
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+CONFIG_ENV_SIZE=0x2000
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+CONFIG_DM_GPIO=y
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+CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-radxa-zero2"
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+CONFIG_MESON_G12A=y
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+CONFIG_DEBUG_UART_BASE=0xff803000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_IDENT_STRING=" radxa-zero2"
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+CONFIG_SYS_LOAD_ADDR=0x1000000
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+CONFIG_DEBUG_UART=y
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+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
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+CONFIG_REMAKE_ELF=y
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+CONFIG_OF_BOARD_SETUP=y
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+# CONFIG_DISPLAY_CPUINFO is not set
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+CONFIG_MISC_INIT_R=y
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+CONFIG_SYS_MAXARGS=32
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+# CONFIG_CMD_BDI is not set
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+# CONFIG_CMD_IMI is not set
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+CONFIG_CMD_GPIO=y
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+# CONFIG_CMD_LOADS is not set
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_USB=y
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+CONFIG_CMD_USB_MASS_STORAGE=y
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+# CONFIG_CMD_SETEXPR is not set
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+CONFIG_CMD_REGULATOR=y
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+CONFIG_OF_CONTROL=y
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+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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+CONFIG_NET_RANDOM_ETHADDR=y
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+CONFIG_MMC_MESON_GX=y
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+CONFIG_MTD=y
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+CONFIG_DM_MTD=y
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+# CONFIG_PHY_REALTEK is not set
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+CONFIG_DM_MDIO=y
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+CONFIG_DM_MDIO_MUX=y
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+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
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+CONFIG_MDIO_MUX_MESON_G12A=y
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+CONFIG_MESON_G12A_USB_PHY=y
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+CONFIG_PINCTRL=y
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+CONFIG_PINCTRL_MESON_G12A=y
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+CONFIG_POWER_DOMAIN=y
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+CONFIG_MESON_EE_POWER_DOMAIN=y
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+CONFIG_DM_REGULATOR=y
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+CONFIG_DM_REGULATOR_FIXED=y
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+CONFIG_DM_RESET=y
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+CONFIG_DEBUG_UART_ANNOUNCE=y
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+CONFIG_DEBUG_UART_SKIP_INIT=y
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+CONFIG_MESON_SERIAL=y
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_DWC3=y
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+CONFIG_USB_DWC3=y
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+# CONFIG_USB_DWC3_GADGET is not set
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+CONFIG_USB_DWC3_MESON_G12A=y
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+CONFIG_USB_KEYBOARD=y
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+CONFIG_USB_GADGET=y
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+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
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+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
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+CONFIG_USB_GADGET_DWC2_OTG=y
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+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
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+CONFIG_USB_GADGET_DOWNLOAD=y
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+CONFIG_DM_VIDEO=y
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+# CONFIG_VIDEO_BPP8 is not set
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+# CONFIG_VIDEO_BPP16 is not set
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+CONFIG_SYS_WHITE_ON_BLACK=y
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+CONFIG_VIDEO_MESON=y
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+CONFIG_VIDEO_DT_SIMPLEFB=y
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+CONFIG_SPLASH_SCREEN=y
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+CONFIG_SPLASH_SCREEN_ALIGN=y
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+CONFIG_VIDEO_BMP_RLE8=y
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+CONFIG_BMP_16BPP=y
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+CONFIG_BMP_24BPP=y
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+CONFIG_BMP_32BPP=y
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+CONFIG_OF_LIBFDT_OVERLAY=y
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--
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2.34.1
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