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63 lines
2.1 KiB
Diff
63 lines
2.1 KiB
Diff
From f34fad413355b9fb666b61cc9e8df7156bbbb7b6 Mon Sep 17 00:00:00 2001
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From: Tomeu Vizoso <tomeu.vizoso@collabora.com>
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Date: Wed, 30 Nov 2022 12:05:46 +0000
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Subject: [PATCH 022/120] FROMGIT(6.3): arm64: dts: Add DT node for the
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VIPNano-QI on the A311D
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This "NPU" is very similar to the Vivante GPUs and Etnaviv works well
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with it with just a few small changes.
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Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
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Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
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---
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arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 12 ++++++++++++
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.../dts/amlogic/meson-g12b-a311d-khadas-vim3.dts | 4 ++++
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2 files changed, 16 insertions(+)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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index d2b6fa8034ea..c90066823250 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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@@ -11,6 +11,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
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#include <dt-bindings/thermal/thermal.h>
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+#include <dt-bindings/power/meson-g12a-power.h>
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/ {
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interrupt-parent = <&gic>;
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@@ -2484,4 +2485,15 @@ xtal: xtal-clk {
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#clock-cells = <0>;
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};
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+ npu: npu@ff100000 {
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+ status = "disabled";
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+ compatible = "vivante,gc";
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+ reg = <0x0 0xff100000 0x0 0x20000>;
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+ interrupts = <0 147 4>;
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+ clocks = <&clkc CLKID_NNA_CORE_CLK>,
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+ <&clkc CLKID_NNA_AXI_CLK>;
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+ clock-names = "core", "bus";
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+ resets = <&reset RESET_NNA>;
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+ power-domains = <&pwrc PWRC_G12A_NNA_ID>;
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+ };
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};
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
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index 124a80901084..73f3d87dcefd 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
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@@ -15,6 +15,10 @@ / {
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compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
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};
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+&npu {
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+ status = "okay";
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+};
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+
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/*
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* The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
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* lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
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--
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2.34.1
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