Merge pull request #8759 from chewitt/amlogic-upstream

amlogic: bump to Linux 6.8.y and prepare for u-boot 2024.04 plus misc bits

packages/linux-drivers/RTL8192DU/patches/RTL8192DU-0002-fixes-for-linux-6.8.patch

@@ -0,0 +1,42 @@
+From 496ee7ac49a732b051fe0f717a946b0a35f90737 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Sat, 23 Mar 2024 09:15:55 +0000
+Subject: [PATCH] os_dep: update os_intfs.c/usb_intf.c for kernel 6.8
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ os_dep/os_intfs.c | 4 ++++
+ os_dep/usb_intf.c | 2 +-
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/os_dep/os_intfs.c b/os_dep/os_intfs.c
+index 5feaaf4..1831d6c 100644
+--- a/os_dep/os_intfs.c
++++ b/os_dep/os_intfs.c
+@@ -35,6 +35,10 @@
+ #include <rtw_br_ext.h>
+ #endif //CONFIG_BR_EXT
+ 
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 8, 0))
++#define strlcpy strscpy
++#endif
++
+ MODULE_LICENSE("GPL");
+ MODULE_DESCRIPTION("Realtek Wireless Lan Driver");
+ MODULE_AUTHOR("Realtek Semiconductor Corp.");
+diff --git a/os_dep/usb_intf.c b/os_dep/usb_intf.c
+index a2353e3..2961a81 100644
+--- a/os_dep/usb_intf.c
++++ b/os_dep/usb_intf.c
+@@ -148,7 +148,7 @@ struct rtw_usb_drv rtl8192d_usb_drv = {
+ 	.usbdrv.supports_autosuspend = 1,
+ 	#endif
+ 
+-	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19))
++	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0))
+ 	.usbdrv.drvwrap.driver.shutdown = rtw_dev_shutdown,
+ 	#else
+ 	.usbdrv.driver.shutdown = rtw_dev_shutdown,
+-- 
+2.34.1
+

packages/linux/package.mk

@@ -16,8 +16,8 @@ PKG_PATCH_DIRS="${LINUX}"
 
 case "${LINUX}" in
   amlogic)
-    PKG_VERSION="004dcea13dc10acaf1486d9939be4c793834c13c" # 6.7.5
-    PKG_SHA256="65911f37f072778f60f77821e8c4cf67e7a8aeca8a290fbbb743ee877048a676"
+    PKG_VERSION="e8f897f4afef0031fe618a8e94127a0934896aba" # 6.8.0
+    PKG_SHA256="52608771cc42196f0a7a71a93270a27ca5f7ba1d9280fb398e521b0620a7a3ac"
     PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
     PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
     PKG_PATCH_DIRS="default"

packages/sysutils/busybox/package.mk

@@ -103,6 +103,9 @@ makeinstall_target() {
       cp ${PKG_DIR}/scripts/update-bootloader-edid-rpi ${INSTALL}/usr/bin/update-bootloader-edid
       cp ${PKG_DIR}/scripts/getedid-drm ${INSTALL}/usr/bin/getedid
     fi
+    if [ "${PROJECT}" = "Amlogic" ]; then
+      cp ${PKG_DIR}/scripts/update-bootloader-edid-amlogic ${INSTALL}/usr/bin/getedid
+    fi
     cp ${PKG_DIR}/scripts/createlog ${INSTALL}/usr/bin/
     cp ${PKG_DIR}/scripts/dthelper ${INSTALL}/usr/bin
       ln -sf dthelper ${INSTALL}/usr/bin/dtfile

packages/sysutils/busybox/scripts/update-bootloader-edid-amlogic

@@ -0,0 +1,89 @@
+#!/bin/bash
+
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (C) 2022-present Team LibreELEC (https://libreelec.tv)
+
+do_install(){
+  # create the persistent firmware dir
+  mkdir -p "/storage/.config/firmware/edid"
+
+  # capture the raw edid file
+  if [ ! -e /storage/.config/firmware/edid/edid.bin ]; then
+    cat "/sys/class/drm/card0-HDMI-A-1/edid" > "/storage/.config/firmware/edid/edid.bin"
+  else
+    echo "info: using existing edid.bin"
+  fi
+
+  # create the cpio file
+  mkdir -p "/storage/cpio/lib/firmware/edid"
+  cp "/storage/.config/firmware/edid/edid.bin" "/storage/cpio/lib/firmware/edid/"
+  cd "/storage/cpio"
+  find . -print | cpio -ov -H newc > "/storage/.config/firmware/edid/edid.cpio"
+
+  # mount /flash rw
+  mount -o remount,rw /flash
+
+  # copy the cpio file
+  cp "/storage/.config/firmware/edid/edid.cpio" "/flash/edid.cpio"
+
+  # cleanup cpio dir
+  rm -rf "/storage/cpio"
+
+  # determine boot method and set params
+  if [ -f "/flash/extlinux/extlinux.conf" ]; then
+    FILE="/flash/extlinux/extlinux.conf"
+    if grep -q "initrd=/edid.cpio" "${FILE}" ; then
+      echo "error: ${FILE} already contains edid.cpio, aborting!"
+      exit 1
+    else
+      cp "${FILE}" "${FILE}.backup"
+      sed -i "/ APPEND/s/$/ drm.edid_firmware=edid\/edid.bin video=HDMI-A-1:D/" "${FILE}"
+      echo "info: edid setup complete!"
+      exit 0
+    fi
+  else
+    FILE="/flash/uEnv.ini"
+    if grep -q "initrd=/edid.cpio" "${FILE}" ; then
+      echo "error: ${FILE} already contains edid.cpio info .. aborting!"
+      exit 1
+    else
+      cp "${FILE}" "${FILE}.backup"
+      sed -i "/ bootargs/s/$/ drm.edid_firmware=edid\/edid.bin video=HDMI-A-1:D/" "${FILE}"
+      echo "info: edid setup complete!"
+      exit 0
+    fi
+  fi
+}
+
+do_cleanup(){
+  rm "/storage/.config/firmware/edid/edid.bin"
+  rm "/storage/.config/firmware/edid/edid.cpio"
+  mount -o remount,rw /flash
+  rm "/flash/edid.cpio"
+  if [ -f "/flash/extlinux/extlinux.conf" ]; then
+    FILE="/flash/extlinux/extlinux.conf"
+  else
+    FILE="/flash/uEnv.ini"
+  fi
+  cp "${FILE}.backup" "${FILE}"
+  mount -o remount,ro /flash
+}
+
+do_usage(){
+  echo "usage: getedid {create|delete}"
+  exit 0
+}
+
+case $1 in
+  create)
+    do_install
+    ;;
+  delete)
+    do_cleanup
+    ;;
+  *)
+    do_usage
+    ;;
+esac
+
+exit

packages/sysutils/systemd/hwdb.d/70-local-keyboard.hwdb

@@ -22,6 +22,10 @@ evdev:input:b0005v0957p1001*
  KEYBOARD_KEY_70045=volumeup
  KEYBOARD_KEY_70069=volumedown
 
+# google tv remote
+evdev:name:*Chromecast Remote*:*
+ KEYBOARD_KEY_c0041=enter
+
 # g7bts remote
 evdev:input:b0005v045Ep0041e0300*
  KEYBOARD_KEY_c0041=enter

projects/Amlogic/bootloader/mkimage

@@ -26,7 +26,7 @@ mkimage_bootini(){
 mkimage_uEnv(){
   echo "image: creating uEnv.ini"
 cat << EOF > "${LE_TMP}/uEnv.ini"
-dtb_name=/dtb/${DTB}
+dtb_name=/amlogic/${DTB}
 bootargs=boot=UUID=${UUID_SYSTEM} disk=UUID=${UUID_STORAGE} quiet ${EXTRA_CMDLINE}
 EOF
   mcopy -s "${LE_TMP}/uEnv.ini" ::
@@ -38,7 +38,7 @@ mkimage_extlinux(){
   cat << EOF > "${LE_TMP}/extlinux/extlinux.conf"
 LABEL ${DISTRO}
   LINUX /${KERNEL_NAME}
-  FDT /${DTB}
+  FDT /amlogic/${DTB}
   APPEND boot=LABEL=${DISTRO_BOOTLABEL} disk=LABEL=${DISTRO_DISKLABEL} quiet ${EXTRA_CMDLINE}
 EOF
   mcopy -s -o "${LE_TMP}/extlinux" ::
@@ -50,31 +50,15 @@ mkimage_extlinux_fdtdir(){
   cat << EOF > "${LE_TMP}/extlinux/extlinux.conf"
 LABEL ${DISTRO}
   LINUX /${KERNEL_NAME}
-  FDTDIR /
+  FDTDIR /amlogic/
   APPEND boot=LABEL=${DISTRO_BOOTLABEL} disk=LABEL=${DISTRO_DISKLABEL} quiet ${EXTRA_CMDLINE}
 EOF
   mcopy -s -o "${LE_TMP}/extlinux" ::
 }
 
 mkimage_dtb(){
-  if [ "$DTB" != "@@DTB_NAME@@" ]; then
-    echo "image: copying device tree"
-    mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/$DTB" ::
-    if [ "$DTB" = "meson-g12b-odroid-n2.dtb" ]; then
-      mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-g12b-odroid-n2-plus.dtb" ::
-      mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-g12b-odroid-n2l.dtb" ::
-    elif [ "$DTB" = "meson-g12b-gtking.dtb" ]; then
-      mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-g12b-gtking-pro.dtb" ::
-      mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-g12b-gsking-x.dtb" ::
-    elif [ "$DTB" = "meson-gxl-s905x-libretech-cc.dtb" ]; then
-      mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-gxl-s905x-libretech-cc-v2.dtb" ::
-    elif [ "$DTB" = "meson-sm1-odroid-c4.dtb" ]; then
-      mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-sm1-odroid-hc4.dtb" ::
-    fi
-  else
-    echo "image: copying device trees"
-    mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb" ::
-  fi
+  echo "image: copying device trees"
+  mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/amlogic" ::
 }
 
 case "${UBOOT_SYSTEM}" in

projects/Amlogic/bootloader/release

@@ -11,14 +11,15 @@ mkdir -p "$DSTDIR"
     cp -av "${FOUND_PATH}" "$DSTDIR/boot.ini"
   fi
 
-mkdir -p "$DSTDIR/dtb"
+mkdir -p "$DSTDIR/amlogic"
+  ln -sf "$DSTDIR/amlogic" "$DSTDIR/dtb"
   case ${DEVICE:-$PROJECT} in
     AMLGX)
-      cp -a "$SRCDIR"/*gxbb*.dtb "$DSTDIR/dtb"
-      cp -a "$SRCDIR"/*gxl*.dtb "$DSTDIR/dtb"
-      cp -a "$SRCDIR"/*gxm*.dtb "$DSTDIR/dtb"
-      cp -a "$SRCDIR"/*g12a*.dtb "$DSTDIR/dtb"
-      cp -a "$SRCDIR"/*g12b*.dtb "$DSTDIR/dtb"
-      cp -a "$SRCDIR"/*sm1*.dtb "$DSTDIR/dtb"
+      cp -a "$SRCDIR"/*gxbb*.dtb "$DSTDIR/amlogic"
+      cp -a "$SRCDIR"/*gxl*.dtb "$DSTDIR/amlogic"
+      cp -a "$SRCDIR"/*gxm*.dtb "$DSTDIR/amlogic"
+      cp -a "$SRCDIR"/*g12a*.dtb "$DSTDIR/amlogic"
+      cp -a "$SRCDIR"/*g12b*.dtb "$DSTDIR/amlogic"
+      cp -a "$SRCDIR"/*sm1*.dtb "$DSTDIR/amlogic"
       ;;
   esac

projects/Amlogic/bootloader/update.sh

@@ -22,7 +22,16 @@
 # mount $BOOT_ROOT rw
   mount -o remount,rw $BOOT_ROOT
 
-# update extlinux device trees
+# update /amlogic device trees
+  if [ -d $BOOT_ROOT/amlogic ]; then
+    for dtbfile in $BOOT_ROOT/amlogic/*.dtb ; do
+      dtb=$(basename $dtbfile)
+      echo "Updating $dtb"
+      cp -p $SYSTEM_ROOT/usr/share/bootloader/$dtb $BOOT_ROOT/amlogic/ 2>/dev/null || true
+     done
+  fi
+
+# update /extlinux device trees
   if [ -f $BOOT_ROOT/extlinux/extlinux.conf ]; then
     for dtbfile in $BOOT_ROOT/*.dtb ; do
       dtb=$(basename $dtbfile)
@@ -31,8 +40,8 @@
     done
   fi
 
-# update box device trees
-  if [ -f $BOOT_ROOT/uEnv.ini ]; then
+# update /dtb device trees
+  if [ -d $BOOT_ROOT/dtb ]; then
     for dtbfile in $BOOT_ROOT/dtb/*.dtb ; do
       dtb=$(basename $dtbfile)
       echo "Updating $dtb"

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch

@@ -1,7 +1,7 @@
-From 7b7853885891650fff72c6133d24d34998b658fb Mon Sep 17 00:00:00 2001
+From fa91cacc8756959b9b04b2cd3d369888b9a19e82 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 13 Apr 2019 05:41:51 +0000
-Subject: [PATCH 01/64] LOCAL: set meson-gx cma pool to 896MB
+Subject: [PATCH 01/53] LOCAL: set meson-gx cma pool to 896MB
 
 This change sets the CMA pool to a larger 896MB! value for vdec use
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch

@@ -1,7 +1,7 @@
-From b06263d189fe8c6afc4b6bfe0bd50823042b39fc Mon Sep 17 00:00:00 2001
+From db61fd1f5ac1a4b39f7699ef5583db1464f2a419 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Wed, 14 Aug 2019 19:58:14 +0000
-Subject: [PATCH 02/64] LOCAL: set meson-g12 cma pool to 896MB
+Subject: [PATCH 02/53] LOCAL: set meson-g12 cma pool to 896MB
 
 This change sets the CMA pool to a larger 896MB! value for vdec use
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch

@@ -1,7 +1,7 @@
-From cc51fd5a5dc1eedeb89f802f9479d3510817bebe Mon Sep 17 00:00:00 2001
+From ee6ecf00c056184730623b0a09f8e1ce0adb3d24 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 13 Apr 2019 05:45:18 +0000
-Subject: [PATCH 03/64] LOCAL: arm64: fix Kodi sysinfo CPU information
+Subject: [PATCH 03/53] LOCAL: arm64: fix Kodi sysinfo CPU information
 
 This allows the CPU information to show in the Kodi sysinfo screen, e.g.
 
@@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
-index a257da7b56fe..de893e3a5e57 100644
+index 47043c0d95ec..03410a9fac77 100644
 --- a/arch/arm64/kernel/cpuinfo.c
 +++ b/arch/arm64/kernel/cpuinfo.c
-@@ -192,8 +192,7 @@ static int c_show(struct seq_file *m, void *v)
+@@ -190,8 +190,7 @@ static int c_show(struct seq_file *m, void *v)
  		 * "processor".  Give glibc what it expects.
  		 */
  		seq_printf(m, "processor\t: %d\n", i);

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch

@@ -1,7 +1,7 @@
-From 8686b57a5828a674d07954da9d0993b84202966b Mon Sep 17 00:00:00 2001
+From 18375f3ce86dcec9a07f711b696aefb6fcb79829 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Thu, 3 Nov 2016 15:29:23 +0100
-Subject: [PATCH 04/64] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
+Subject: [PATCH 04/53] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
 
 The Amlogic Meson GX SoCs uses a non-standard argument to the
 PSCI CPU_SUSPEND call to enter system suspend.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch

@@ -1,7 +1,7 @@
-From feabed1f718912863b14a051074fc5feb7e6e55a Mon Sep 17 00:00:00 2001
+From 346f8f56697d21901ca2c5d48c7beecc654131c0 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Thu, 3 Nov 2016 15:29:25 +0100
-Subject: [PATCH 05/64] LOCAL: arm64: dts: meson: add support for GX PM and
+Subject: [PATCH 05/53] LOCAL: arm64: dts: meson: add support for GX PM and
  Virtual RTC
 
 Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch

@@ -1,7 +1,7 @@
-From 3f431bfc58eb527290ad1b461e5e291536a675cf Mon Sep 17 00:00:00 2001
+From e288d4c79fb45f1af148b279bcfd091f770e9070 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 21 Jan 2021 01:35:36 +0000
-Subject: [PATCH 06/64] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
+Subject: [PATCH 06/53] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
  Khadas VIM
 
 Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch

@@ -1,7 +1,7 @@
-From 9f5b04acf796cb5c423de664296dfd66b3c98975 Mon Sep 17 00:00:00 2001
+From 1ebc6f1a726d896fb8c72ed5e86423ad2485eea1 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 6 Nov 2021 13:01:08 +0000
-Subject: [PATCH 07/64] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
+Subject: [PATCH 07/53] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
  Khadas VIM2
 
 Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch

@@ -1,7 +1,7 @@
-From 9d15c5b5d125d392bbcca8d74f9c76cbbd6157e8 Mon Sep 17 00:00:00 2001
+From 83e3e72c22bd9261d248c2dda723d5fb3abd4ab9 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 1 Feb 2021 19:27:40 +0000
-Subject: [PATCH 08/64] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
+Subject: [PATCH 08/53] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
  NEO U9-H
 
 Add node aliases to prevent meson-vrtc from claiming /dev/rtc0

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch

@@ -1,7 +1,7 @@
-From ef1379f8920505d862ae335355afa60ff564554b Mon Sep 17 00:00:00 2001
+From b419174ce9cd28aa55673140319aa4317922d0d7 Mon Sep 17 00:00:00 2001
 From: Anssi Hannula <anssi.hannula@iki.fi>
 Date: Sun, 17 Apr 2022 04:37:48 +0000
-Subject: [PATCH 09/64] LOCAL: ASoC: meson: assign internal PCM
+Subject: [PATCH 09/53] LOCAL: ASoC: meson: assign internal PCM
  chmap/ELD/IEC958 kctls to device 0
 
 On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls
@@ -24,10 +24,10 @@ Tested-by: Christian Hewitt <christianshewitt@gmail.com>
  2 files changed, 6 insertions(+), 2 deletions(-)
 
 diff --git a/sound/core/pcm_lib.c b/sound/core/pcm_lib.c
-index a11cd7d6295f..94269e485873 100644
+index 41103e5c43ce..0db7fe63911e 100644
 --- a/sound/core/pcm_lib.c
 +++ b/sound/core/pcm_lib.c
-@@ -2547,7 +2547,10 @@ int snd_pcm_add_chmap_ctls(struct snd_pcm *pcm, int stream,
+@@ -2581,7 +2581,10 @@ int snd_pcm_add_chmap_ctls(struct snd_pcm *pcm, int stream,
  		knew.name = "Playback Channel Map";
  	else
  		knew.name = "Capture Channel Map";
@@ -40,10 +40,10 @@ index a11cd7d6295f..94269e485873 100644
  	knew.private_value = private_value;
  	info->kctl = snd_ctl_new1(&knew, info);
 diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
-index 0938671700c6..3131a20f1b21 100644
+index d3abb7ce2153..e06b28c7e5ba 100644
 --- a/sound/soc/codecs/hdmi-codec.c
 +++ b/sound/soc/codecs/hdmi-codec.c
-@@ -801,7 +801,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
+@@ -802,7 +802,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
  		if (!kctl)
  			return -ENOMEM;
  

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch

@@ -1,12 +1,12 @@
-From 9034557a662a52e608fb504570f6f5fa92bb2b55 Mon Sep 17 00:00:00 2001
+From 9787871fe1e00af9f915237be4474a3b1f1e0887 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 5 Jan 2023 15:16:46 +0000
-Subject: [PATCH 42/64] WIP: media: meson: vdec: disable MPEG1/MPEG2 hardware
+Subject: [PATCH 10/53] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
  decoding
 
 The MPEG1/2 decoder is broken and nobody has volunteered to poke
-code and fix it. As media is almost never over 1080p resolution
-boards should be able to software decode it. So lets just disable
+code and fix it. As media is mostly SD (and never over 1080p)
+resolution most boards can software decode it. So lets disable
 hardware decoding for now.
 
 Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
@@ -15,10 +15,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 110 deletions(-)
 
 diff --git a/drivers/staging/media/meson/vdec/vdec_platform.c b/drivers/staging/media/meson/vdec/vdec_platform.c
-index 90543b4b0cd2..083adf0d07d9 100644
+index 70c9fd7c8bc5..f1df637681e5 100644
 --- a/drivers/staging/media/meson/vdec/vdec_platform.c
 +++ b/drivers/staging/media/meson/vdec/vdec_platform.c
-@@ -39,28 +39,6 @@ static const struct amvdec_format vdec_formats_gxbb[] = {
+@@ -26,28 +26,6 @@ static const struct amvdec_format vdec_formats_gxbb[] = {
  		.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
  		.flags = V4L2_FMT_FLAG_COMPRESSED |
  			 V4L2_FMT_FLAG_DYN_RESOLUTION,
@@ -47,7 +47,7 @@ index 90543b4b0cd2..083adf0d07d9 100644
  	},
  };
  
-@@ -101,28 +79,6 @@ static const struct amvdec_format vdec_formats_gxl[] = {
+@@ -76,28 +54,6 @@ static const struct amvdec_format vdec_formats_gxl[] = {
  		.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
  		.flags = V4L2_FMT_FLAG_COMPRESSED |
  			 V4L2_FMT_FLAG_DYN_RESOLUTION,
@@ -76,7 +76,7 @@ index 90543b4b0cd2..083adf0d07d9 100644
  	},
  };
  
-@@ -163,28 +119,6 @@ static const struct amvdec_format vdec_formats_gxm[] = {
+@@ -126,28 +82,6 @@ static const struct amvdec_format vdec_formats_gxm[] = {
  		.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
  		.flags = V4L2_FMT_FLAG_COMPRESSED |
  			 V4L2_FMT_FLAG_DYN_RESOLUTION,
@@ -105,7 +105,7 @@ index 90543b4b0cd2..083adf0d07d9 100644
  	},
  };
  
-@@ -213,28 +147,6 @@ static const struct amvdec_format vdec_formats_g12a[] = {
+@@ -176,28 +110,6 @@ static const struct amvdec_format vdec_formats_g12a[] = {
  		.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
  		.flags = V4L2_FMT_FLAG_COMPRESSED |
  			 V4L2_FMT_FLAG_DYN_RESOLUTION,
@@ -134,7 +134,7 @@ index 90543b4b0cd2..083adf0d07d9 100644
  	},
  };
  
-@@ -263,28 +175,6 @@ static const struct amvdec_format vdec_formats_sm1[] = {
+@@ -226,28 +138,6 @@ static const struct amvdec_format vdec_formats_sm1[] = {
  		.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
  		.flags = V4L2_FMT_FLAG_COMPRESSED |
  			 V4L2_FMT_FLAG_DYN_RESOLUTION,

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.9-arm64-dts-meson-g12-common-Set-the-rates.patch

@@ -1,8 +1,8 @@
-From 2e3a661a580292de22a1d73b6e8987dde8a03bb2 Mon Sep 17 00:00:00 2001
+From f376bb7ba1afbca87fba7b98f31697cba6776b1b Mon Sep 17 00:00:00 2001
 From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
 Date: Mon, 16 Oct 2023 10:02:03 +0200
-Subject: [PATCH 22/64] FROMLIST(v1): arm64: dts: VIM3: Set the rates of the
- clocks for the NPU
+Subject: [PATCH 11/53] FROMGIT(6.9): arm64: dts: meson-g12-common: Set the
+ rates of the clocks for the NPU
 
 Otherwise they are left at 24MHz and the NPU runs very slowly.
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMLIST-v5-dt-bindings-vendor-prefixes-Add-Titan-Mi.patch

@@ -1,7 +1,7 @@
-From 0e5347d521ba33c9d07f1ce9eb7cb04a7249210f Mon Sep 17 00:00:00 2001
+From 58d3f1f106febd55da1b5e56016fb8e33fde09bd Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
 Date: Sun, 20 Feb 2022 08:23:12 +0000
-Subject: [PATCH 10/64] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
+Subject: [PATCH 13/53] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
  Micro Electronics
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
@@ -17,10 +17,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  1 file changed, 2 insertions(+)
 
 diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
-index 309b94c328c8..3244083ab0af 100644
+index 1a0dc04f1db4..a3c08f859ab1 100644
 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
 +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
-@@ -1407,6 +1407,8 @@ patternProperties:
+@@ -1427,6 +1427,8 @@ patternProperties:
      description: Texas Instruments
    "^tianma,.*":
      description: Tianma Micro-electronics Co., Ltd.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMLIST-v5-dt-bindings-auxdisplay-Add-Titan-Micro-E.patch

@@ -1,7 +1,7 @@
-From b77beaa8de150b04b2de2242bb3bcbde18eca04d Mon Sep 17 00:00:00 2001
+From 24712c83de1ef21e7263f7c3bbe4423068070089 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Sun, 20 Feb 2022 08:24:47 +0000
-Subject: [PATCH 11/64] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
+Subject: [PATCH 14/53] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
  Electronics TM1628
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMLIST-v5-docs-ABI-document-tm1628-attribute-displ.patch

@@ -1,7 +1,7 @@
-From da6fb6205863869aa1edc27169a085a08630c086 Mon Sep 17 00:00:00 2001
+From 35a48968c689d245bbe3dd2ff5cd9192d3a16e62 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Sun, 20 Feb 2022 08:26:27 +0000
-Subject: [PATCH 12/64] FROMLIST(v5): docs: ABI: document tm1628 attribute
+Subject: [PATCH 15/53] FROMLIST(v5): docs: ABI: document tm1628 attribute
  display-text
 
 Document the attribute for reading / writing the text to be displayed on

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMLIST-v5-auxdisplay-add-support-for-Titanmec-TM16.patch

@@ -1,7 +1,7 @@
-From 759bef4817e478e057433f65e34036e22cc1b62d Mon Sep 17 00:00:00 2001
+From e7c3f45587cda5b5b445df7434f38a0d751bb197 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Mon, 4 Apr 2022 18:51:20 +0000
-Subject: [PATCH 13/64] FROMLIST(v5): auxdisplay: add support for Titanmec
+Subject: [PATCH 16/53] FROMLIST(v5): auxdisplay: add support for Titanmec
  TM1628 7 segment display controller
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
@@ -44,10 +44,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  create mode 100644 drivers/auxdisplay/tm1628.c
 
 diff --git a/drivers/auxdisplay/Kconfig b/drivers/auxdisplay/Kconfig
-index 64012cda4d12..2764afc5c5d9 100644
+index d944d5298eca..f3d513139e5c 100644
 --- a/drivers/auxdisplay/Kconfig
 +++ b/drivers/auxdisplay/Kconfig
-@@ -203,6 +203,17 @@ config ARM_CHARLCD
+@@ -197,6 +197,17 @@ config ARM_CHARLCD
  	  line and the Linux version on the second line, but that's
  	  still useful.
  

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMLIST-v5-arm64-dts-meson-gxl-s905w-tx3-mini-add-s.patch

@@ -1,7 +1,7 @@
-From 838bae2f7d263c884239028500a60ca562ae2c2c Mon Sep 17 00:00:00 2001
+From 8dd34cfc3fdb2ae31c34492b8b25bdf7d8c3352b Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Mon, 4 Apr 2022 18:52:34 +0000
-Subject: [PATCH 14/64] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
+Subject: [PATCH 17/53] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
  support for the 7 segment display
 
 This patch adds support for the 7 segment display of the device.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMLIST-v5-MAINTAINERS-Add-entry-for-tm1628-auxdisp.patch

@@ -1,7 +1,7 @@
-From 09ba3701f1cf474aa774f2a79b0eae67f216dc39 Mon Sep 17 00:00:00 2001
+From 3a59c995a56b3802ceb6db413c81e2170fa767cb Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Mon, 4 Apr 2022 18:53:32 +0000
-Subject: [PATCH 15/64] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
+Subject: [PATCH 18/53] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
  auxdisplay driver
 
 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
@@ -10,10 +10,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  1 file changed, 7 insertions(+)
 
 diff --git a/MAINTAINERS b/MAINTAINERS
-index a7c4cf8201e0..2b1d4c6eb346 100644
+index 1aabf1c15bb3..ea6d2ff2eb20 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
-@@ -21851,6 +21851,13 @@ W:	http://sourceforge.net/projects/tlan/
+@@ -22155,6 +22155,13 @@ W:	http://sourceforge.net/projects/tlan/
  F:	Documentation/networking/device_drivers/ethernet/ti/tlan.rst
  F:	drivers/net/ethernet/ti/tlan.*
  

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-FROMLIST-v1-ASoC-hdmi-codec-reorder-channel-allocati.patch

@@ -1,7 +1,7 @@
-From a06eb0c57ce793d99be5b078fb02cd4ca2ff93e5 Mon Sep 17 00:00:00 2001
+From 665584f98081e481e77286b49b6a0e1ce9fe5655 Mon Sep 17 00:00:00 2001
 From: Jonas Karlman <jonas@kwiboo.se>
 Date: Sun, 23 Dec 2018 02:24:38 +0100
-Subject: [PATCH 16/64] FROMLIST(v1): ASoC: hdmi-codec: reorder channel
+Subject: [PATCH 19/53] FROMLIST(v1): ASoC: hdmi-codec: reorder channel
  allocation list
 
 Wrong channel allocation is selected by hdmi_codec_get_ch_alloc_table_idx().
@@ -25,10 +25,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
  1 file changed, 77 insertions(+), 63 deletions(-)
 
 diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
-index 3131a20f1b21..b6d274c4b5e3 100644
+index e06b28c7e5ba..6ebbd4bfa47e 100644
 --- a/sound/soc/codecs/hdmi-codec.c
 +++ b/sound/soc/codecs/hdmi-codec.c
-@@ -184,84 +184,97 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
+@@ -185,84 +185,97 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
  /*
   * hdmi_codec_channel_alloc: speaker configuration available for CEA
   *
@@ -188,7 +188,7 @@ index 3131a20f1b21..b6d274c4b5e3 100644
  };
  
  struct hdmi_codec_priv {
-@@ -370,7 +383,8 @@ static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
+@@ -371,7 +384,8 @@ static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  	struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  	struct hdmi_codec_priv *hcp = info->private_data;
  

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch

@@ -1,7 +1,7 @@
-From 75d03ce5ecfc46fb45b849dd93605f66a3fdf767 Mon Sep 17 00:00:00 2001
+From b4b3656688319a77827ce533f8797f317dfaa01c Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Mon, 22 Nov 2021 09:15:21 +0000
-Subject: [PATCH 17/64] FROMLIST(v1): media: meson: vdec: esparser: check
+Subject: [PATCH 20/53] FROMLIST(v1): media: meson: vdec: esparser: check
  parsing state with hardware write pointer
 
 Also check the hardware write pointer to check if ES Parser has stalled.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch

@@ -1,7 +1,7 @@
-From 1fe10d8edcc624e13ed80cbc13737d29358bed9d Mon Sep 17 00:00:00 2001
+From 73aa203801527e081409ead1c5708552ecc5f82b Mon Sep 17 00:00:00 2001
 From: Benjamin Roszak <benjamin545@gmail.com>
 Date: Mon, 23 Jan 2023 10:56:46 +0000
-Subject: [PATCH 18/64] FROMLIST(v2): media: meson: vdec: implement 10bit
+Subject: [PATCH 21/53] FROMLIST(v2): media: meson: vdec: implement 10bit
  bitstream handling
 
 In order to support 10bit bitstream decoding, buffers and MMU

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch

@@ -1,7 +1,7 @@
-From 204f24973926f6b7cc3bfb27d31215d2d730d12f Mon Sep 17 00:00:00 2001
+From 00829e834a4cd6594b076550fd18be30ddba5b0e Mon Sep 17 00:00:00 2001
 From: Maxime Jourdan <mjourdan@baylibre.com>
 Date: Mon, 23 Jan 2023 11:07:04 +0000
-Subject: [PATCH 19/64] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
+Subject: [PATCH 22/53] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
 
 Add initial HEVC codec for the Amlogic GXBB/GXL/GXM SoCs using
 the common "HEVC" decoder driver.
@@ -1546,7 +1546,7 @@ index 0392f41a1eed..e7eabdd2b119 100644
  #define HEVC_SAO_MMU_VH1_ADDR 0xd8ec
  
 diff --git a/drivers/staging/media/meson/vdec/vdec_platform.c b/drivers/staging/media/meson/vdec/vdec_platform.c
-index 70c9fd7c8bc5..90543b4b0cd2 100644
+index f1df637681e5..083adf0d07d9 100644
 --- a/drivers/staging/media/meson/vdec/vdec_platform.c
 +++ b/drivers/staging/media/meson/vdec/vdec_platform.c
 @@ -11,10 +11,23 @@
@@ -1573,7 +1573,7 @@ index 70c9fd7c8bc5..90543b4b0cd2 100644
  		.pixfmt = V4L2_PIX_FMT_H264,
  		.min_buffers = 2,
  		.max_buffers = 24,
-@@ -64,6 +77,18 @@ static const struct amvdec_format vdec_formats_gxl[] = {
+@@ -42,6 +55,18 @@ static const struct amvdec_format vdec_formats_gxl[] = {
  		.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
  		.flags = V4L2_FMT_FLAG_COMPRESSED |
  			 V4L2_FMT_FLAG_DYN_RESOLUTION,
@@ -1592,7 +1592,7 @@ index 70c9fd7c8bc5..90543b4b0cd2 100644
  	}, {
  		.pixfmt = V4L2_PIX_FMT_H264,
  		.min_buffers = 2,
-@@ -114,6 +139,18 @@ static const struct amvdec_format vdec_formats_gxm[] = {
+@@ -70,6 +95,18 @@ static const struct amvdec_format vdec_formats_gxm[] = {
  		.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
  		.flags = V4L2_FMT_FLAG_COMPRESSED |
  			 V4L2_FMT_FLAG_DYN_RESOLUTION,

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-FROMLIST-v4-dt-bindings-usb-Add-the-binding-example-.patch

@@ -1,7 +1,7 @@
-From 02e0d943c1581ca1a1462c73b8f2340e7dfe7d7e Mon Sep 17 00:00:00 2001
+From 1283c858520094cb01ff6fc133eab9cad8c7e276 Mon Sep 17 00:00:00 2001
 From: Anand Moon <linux.amoon@gmail.com>
 Date: Wed, 22 Nov 2023 23:53:46 +0530
-Subject: [PATCH 20/64] FROMLIST(v4): dt-bindings: usb: Add the binding example
+Subject: [PATCH 23/53] FROMLIST(v4): dt-bindings: usb: Add the binding example
  for the Genesys Logic GL3523 hub
 
 Add the binding example for the USB3.1 Genesys Logic GL3523
@@ -20,7 +20,7 @@ Signed-off-by: Anand Moon <linux.amoon@gmail.com>
  1 file changed, 63 insertions(+), 4 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
-index ee08b9c3721f..bc3b3f4c8473 100644
+index 37cf5249e526..47b7789ce7a5 100644
 --- a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
 +++ b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
 @@ -9,9 +9,6 @@ title: Genesys Logic USB hub controller
@@ -33,7 +33,7 @@ index ee08b9c3721f..bc3b3f4c8473 100644
  properties:
    compatible:
      enum:
-@@ -27,12 +24,48 @@ properties:
+@@ -27,7 +24,16 @@ properties:
  
    vdd-supply:
      description:
@@ -49,7 +49,9 @@ index ee08b9c3721f..bc3b3f4c8473 100644
 +      and help each peer power on during initialization
 +      and power off during suspend.
  
- required:
+   peer-hub:
+     $ref: /schemas/types.yaml#/definitions/phandle
+@@ -38,6 +44,33 @@ required:
    - compatible
    - reg
  
@@ -83,7 +85,7 @@ index ee08b9c3721f..bc3b3f4c8473 100644
  additionalProperties: false
  
  examples:
-@@ -49,3 +82,29 @@ examples:
+@@ -54,3 +87,29 @@ examples:
              reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>;
          };
      };

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v4-arm64-dts-amlogic-Used-onboard-usb-hub-r.patch

@@ -1,7 +1,7 @@
-From 87bdbd2b503d662cdb4c4a1caa00460500fc0bcd Mon Sep 17 00:00:00 2001
+From 3b361c7741a8c9a7ba990eda872fcc7817d35b23 Mon Sep 17 00:00:00 2001
 From: Anand Moon <linux.amoon@gmail.com>
 Date: Tue, 10 Oct 2023 08:54:43 +0530
-Subject: [PATCH 21/64] FROMLIST(v4): arm64: dts: amlogic: Used onboard usb hub
+Subject: [PATCH 24/53] FROMLIST(v4): arm64: dts: amlogic: Used onboard usb hub
  reset on odroid n2
 
 On Odroid n2/n2+ previously use gpio-hog to reset the usb hub,
@@ -14,10 +14,10 @@ Signed-off-by: Anand Moon <linux.amoon@gmail.com>
  1 file changed, 24 insertions(+), 12 deletions(-)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
-index 91c9769fda20..9e671444eca6 100644
+index d80dd9a3da31..86eb81112232 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
-@@ -31,6 +31,30 @@ hub_5v: regulator-hub_5v {
+@@ -31,6 +31,30 @@ hub_5v: regulator-hub-5v {
  		enable-active-high;
  	};
  

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v8-dt-bindings-clk-g12a-clkc-add-CTS_ENCL-c.patch

@@ -1,30 +0,0 @@
-From 6a5eaac07c780df7934d9fd776ca87339e326283 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:02 +0100
-Subject: [PATCH 24/64] FROMLIST(v8): dt-bindings: clk: g12a-clkc: add CTS_ENCL
- clock ids
-
-Add new CLK ids for the CTS_ENCL and CTS_ENCL_SEL clocks
-on G12A compatible SoCs.
-
-Acked-by: Conor Dooley <conor.dooley@microchip.com>
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- include/dt-bindings/clock/g12a-clkc.h | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h
-index 387767f4e298..636d713f95ff 100644
---- a/include/dt-bindings/clock/g12a-clkc.h
-+++ b/include/dt-bindings/clock/g12a-clkc.h
-@@ -279,5 +279,7 @@
- #define CLKID_MIPI_DSI_PXCLK_DIV		268
- #define CLKID_MIPI_DSI_PXCLK_SEL		269
- #define CLKID_MIPI_DSI_PXCLK			270
-+#define CLKID_CTS_ENCL				271
-+#define CLKID_CTS_ENCL_SEL			272
- 
- #endif /* __G12A_CLKC_H */
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v1-arm64-dts-meson-radxa-zero2-add-pwm-fan-.patch

@@ -1,7 +1,7 @@
-From f8bf2e3d64b44bcecc27302a98bffd2cfc800b59 Mon Sep 17 00:00:00 2001
+From 983b5729b97918d6c860bdfd01093cf60b0ea83e Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 30 Jan 2023 05:09:18 +0000
-Subject: [PATCH 23/64] FROMLIST(v1): arm64: dts: meson: radxa-zero2: add
+Subject: [PATCH 25/53] FROMLIST(v1): arm64: dts: meson: radxa-zero2: add
  pwm-fan support
 
 The A311D on Zero2 needs active cooling and the board includes a header to

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v8-dt-bindings-soc-amlogic-meson-gx-hhi-sys.patch

@@ -1,67 +0,0 @@
-From 54d0c47551759eccf5d75a107c168f69d9e4bad7 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:03 +0100
-Subject: [PATCH 25/64] FROMLIST(v8): dt-bindings: soc:
- amlogic,meson-gx-hhi-sysctrl: add example covering meson-axg-hhi-sysctrl
-
-Add a thirst example covering the meson-axg-hhi-sysctrl variant and more
-importantly the phy subnode.
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
-Acked-by: Conor Dooley <conor.dooley@microchip.com>
----
- .../amlogic/amlogic,meson-gx-hhi-sysctrl.yaml | 41 +++++++++++++++++++
- 1 file changed, 41 insertions(+)
-
-diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml
-index 16977e4e4357..2edf4ccea845 100644
---- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml
-+++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml
-@@ -158,3 +158,44 @@ examples:
-             };
-         };
-     };
-+
-+    bus@ff63c000 {
-+        compatible = "simple-bus";
-+        reg = <0xff63c000 0x1c00>;
-+        #address-cells = <1>;
-+        #size-cells = <1>;
-+        ranges = <0x0 0xff63c000 0x1c00>;
-+
-+        system-controller@0 {
-+            compatible = "amlogic,meson-axg-hhi-sysctrl", "simple-mfd", "syscon";
-+            reg = <0 0x400>;
-+
-+            clock-controller {
-+                compatible = "amlogic,axg-clkc";
-+                #clock-cells = <1>;
-+                clocks = <&xtal>;
-+                clock-names = "xtal";
-+            };
-+
-+            power-controller {
-+                compatible = "amlogic,meson-axg-pwrc";
-+                #power-domain-cells = <1>;
-+                amlogic,ao-sysctrl = <&sysctrl_AO>;
-+
-+                resets = <&reset_viu>,
-+                         <&reset_venc>,
-+                         <&reset_vcbus>,
-+                         <&reset_vencl>,
-+                         <&reset_vid_lock>;
-+                reset-names = "viu", "venc", "vcbus", "vencl", "vid_lock";
-+                clocks = <&clk_vpu>, <&clk_vapb>;
-+                clock-names = "vpu", "vapb";
-+            };
-+
-+            phy {
-+                compatible = "amlogic,axg-mipi-pcie-analog-phy";
-+                #phy-cells = <0>;
-+                status = "disabled";
-+            };
-+        };
-+    };
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v2-meson_plane-Add-error-handling.patch

@@ -1,7 +1,7 @@
-From a3fac2d6602af61a6647a89e4edd1b60c7ae0884 Mon Sep 17 00:00:00 2001
+From a4c4025275bcce3c13ff2d2b46dfa49ff947804a Mon Sep 17 00:00:00 2001
 From: Haoran Liu <liuhaoran14@163.com>
 Date: Wed, 29 Nov 2023 03:34:05 -0800
-Subject: [PATCH 40/64] FROMLIST(v2): meson_plane: Add error handling
+Subject: [PATCH 26/53] FROMLIST(v2): meson_plane: Add error handling
 
 This patch adds robust error handling to the meson_plane_create
 function in drivers/gpu/drm/meson/meson_plane.c. The function

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v8-dt-bindings-phy-amlogic-meson-axg-mipi-p.patch

@@ -1,51 +0,0 @@
-From afe3f7c46d20a132f0d7b31df9cb0956232ae49d Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:04 +0100
-Subject: [PATCH 26/64] FROMLIST(v8): dt-bindings: phy:
- amlogic,meson-axg-mipi-pcie-analog: drop text about parent syscon and drop
- example
-
-Since this bindings is referred from amlogic,meson-gx-hhi-sysctrl.yaml, drop the now
-useless description about the parent node and also drop the unnecessary example.
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
-Acked-by: Conor Dooley <conor.dooley@microchip.com>
----
- .../phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 17 -----------------
- 1 file changed, 17 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
-index 009a39808318..70def36e5688 100644
---- a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
-+++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
-@@ -9,16 +9,6 @@ title: Amlogic AXG shared MIPI/PCIE analog PHY
- maintainers:
-   - Remi Pommarel <repk@triplefau.lt>
- 
--description: |+
--  The Everything-Else Power Domains node should be the child of a syscon
--  node with the required property:
--
--  - compatible: Should be the following:
--                "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
--
--  Refer to the bindings described in
--  Documentation/devicetree/bindings/mfd/syscon.yaml
--
- properties:
-   compatible:
-     const: amlogic,axg-mipi-pcie-analog-phy
-@@ -31,10 +21,3 @@ required:
-   - "#phy-cells"
- 
- additionalProperties: false
--
--examples:
--  - |
--    mpphy: phy {
--          compatible = "amlogic,axg-mipi-pcie-analog-phy";
--          #phy-cells = <0>;
--    };
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v1-drm-meson-improve-encoder-probe-initiali.patch

@@ -0,0 +1,262 @@
+From 6fd27cae52fb7b81a1a00822cd1e378ebb3de32b Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Sun, 18 Feb 2024 18:50:35 +0100
+Subject: [PATCH 27/53] FROMLIST(v1): drm/meson: improve encoder probe /
+ initialization error handling
+
+Rename meson_encoder_{cvbs,dsi,hdmi}_init() to
+meson_encoder_{cvbs,dsi,hdmi}_probe() so it's clear that these functions
+are used at probe time during driver initialization. Also switch all
+error prints inside those functions to use dev_err_probe() for
+consistency.
+
+This makes the code more straight forward to read and makes the error
+prints within those functions consistent (by logging all -EPROBE_DEFER
+with dev_dbg(), while actual errors are logged with dev_err() and get
+the error value printed).
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
+---
+ drivers/gpu/drm/meson/meson_drv.c          |  6 +++---
+ drivers/gpu/drm/meson/meson_encoder_cvbs.c | 24 ++++++++++------------
+ drivers/gpu/drm/meson/meson_encoder_cvbs.h |  2 +-
+ drivers/gpu/drm/meson/meson_encoder_dsi.c  | 23 +++++++++------------
+ drivers/gpu/drm/meson/meson_encoder_dsi.h  |  2 +-
+ drivers/gpu/drm/meson/meson_encoder_hdmi.c | 15 +++++++-------
+ drivers/gpu/drm/meson/meson_encoder_hdmi.h |  2 +-
+ 7 files changed, 35 insertions(+), 39 deletions(-)
+
+diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
+index cb674966e9ac..17a5cca007e2 100644
+--- a/drivers/gpu/drm/meson/meson_drv.c
++++ b/drivers/gpu/drm/meson/meson_drv.c
+@@ -312,7 +312,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
+ 
+ 	/* Encoder Initialization */
+ 
+-	ret = meson_encoder_cvbs_init(priv);
++	ret = meson_encoder_cvbs_probe(priv);
+ 	if (ret)
+ 		goto exit_afbcd;
+ 
+@@ -326,12 +326,12 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
+ 		}
+ 	}
+ 
+-	ret = meson_encoder_hdmi_init(priv);
++	ret = meson_encoder_hdmi_probe(priv);
+ 	if (ret)
+ 		goto exit_afbcd;
+ 
+ 	if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
+-		ret = meson_encoder_dsi_init(priv);
++		ret = meson_encoder_dsi_probe(priv);
+ 		if (ret)
+ 			goto exit_afbcd;
+ 	}
+diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.c b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
+index 3407450435e2..d1191de855d9 100644
+--- a/drivers/gpu/drm/meson/meson_encoder_cvbs.c
++++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
+@@ -219,7 +219,7 @@ static const struct drm_bridge_funcs meson_encoder_cvbs_bridge_funcs = {
+ 	.atomic_reset = drm_atomic_helper_bridge_reset,
+ };
+ 
+-int meson_encoder_cvbs_init(struct meson_drm *priv)
++int meson_encoder_cvbs_probe(struct meson_drm *priv)
+ {
+ 	struct drm_device *drm = priv->drm;
+ 	struct meson_encoder_cvbs *meson_encoder_cvbs;
+@@ -240,10 +240,9 @@ int meson_encoder_cvbs_init(struct meson_drm *priv)
+ 
+ 	meson_encoder_cvbs->next_bridge = of_drm_find_bridge(remote);
+ 	of_node_put(remote);
+-	if (!meson_encoder_cvbs->next_bridge) {
+-		dev_err(priv->dev, "Failed to find CVBS Connector bridge\n");
+-		return -EPROBE_DEFER;
+-	}
++	if (!meson_encoder_cvbs->next_bridge)
++		return dev_err_probe(priv->dev, -EPROBE_DEFER,
++				     "Failed to find CVBS Connector bridge\n");
+ 
+ 	/* CVBS Encoder Bridge */
+ 	meson_encoder_cvbs->bridge.funcs = &meson_encoder_cvbs_bridge_funcs;
+@@ -259,10 +258,9 @@ int meson_encoder_cvbs_init(struct meson_drm *priv)
+ 	/* Encoder */
+ 	ret = drm_simple_encoder_init(priv->drm, &meson_encoder_cvbs->encoder,
+ 				      DRM_MODE_ENCODER_TVDAC);
+-	if (ret) {
+-		dev_err(priv->dev, "Failed to init CVBS encoder: %d\n", ret);
+-		return ret;
+-	}
++	if (ret)
++		return dev_err_probe(priv->dev, ret,
++				     "Failed to init CVBS encoder\n");
+ 
+ 	meson_encoder_cvbs->encoder.possible_crtcs = BIT(0);
+ 
+@@ -276,10 +274,10 @@ int meson_encoder_cvbs_init(struct meson_drm *priv)
+ 
+ 	/* Initialize & attach Bridge Connector */
+ 	connector = drm_bridge_connector_init(priv->drm, &meson_encoder_cvbs->encoder);
+-	if (IS_ERR(connector)) {
+-		dev_err(priv->dev, "Unable to create CVBS bridge connector\n");
+-		return PTR_ERR(connector);
+-	}
++	if (IS_ERR(connector))
++		return dev_err_probe(priv->dev, PTR_ERR(connector),
++				     "Unable to create CVBS bridge connector\n");
++
+ 	drm_connector_attach_encoder(connector, &meson_encoder_cvbs->encoder);
+ 
+ 	priv->encoders[MESON_ENC_CVBS] = meson_encoder_cvbs;
+diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.h b/drivers/gpu/drm/meson/meson_encoder_cvbs.h
+index 09710fec3c66..7b7bc85c03f7 100644
+--- a/drivers/gpu/drm/meson/meson_encoder_cvbs.h
++++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.h
+@@ -24,7 +24,7 @@ struct meson_cvbs_mode {
+ /* Modes supported by the CVBS output */
+ extern struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT];
+ 
+-int meson_encoder_cvbs_init(struct meson_drm *priv);
++int meson_encoder_cvbs_probe(struct meson_drm *priv);
+ void meson_encoder_cvbs_remove(struct meson_drm *priv);
+ 
+ #endif /* __MESON_VENC_CVBS_H */
+diff --git a/drivers/gpu/drm/meson/meson_encoder_dsi.c b/drivers/gpu/drm/meson/meson_encoder_dsi.c
+index 311b91630fbe..7816902f5907 100644
+--- a/drivers/gpu/drm/meson/meson_encoder_dsi.c
++++ b/drivers/gpu/drm/meson/meson_encoder_dsi.c
+@@ -100,7 +100,7 @@ static const struct drm_bridge_funcs meson_encoder_dsi_bridge_funcs = {
+ 	.atomic_reset = drm_atomic_helper_bridge_reset,
+ };
+ 
+-int meson_encoder_dsi_init(struct meson_drm *priv)
++int meson_encoder_dsi_probe(struct meson_drm *priv)
+ {
+ 	struct meson_encoder_dsi *meson_encoder_dsi;
+ 	struct device_node *remote;
+@@ -118,10 +118,9 @@ int meson_encoder_dsi_init(struct meson_drm *priv)
+ 	}
+ 
+ 	meson_encoder_dsi->next_bridge = of_drm_find_bridge(remote);
+-	if (!meson_encoder_dsi->next_bridge) {
+-		dev_dbg(priv->dev, "Failed to find DSI transceiver bridge\n");
+-		return -EPROBE_DEFER;
+-	}
++	if (!meson_encoder_dsi->next_bridge)
++		return dev_err_probe(priv->dev, -EPROBE_DEFER,
++				     "Failed to find DSI transceiver bridge\n");
+ 
+ 	/* DSI Encoder Bridge */
+ 	meson_encoder_dsi->bridge.funcs = &meson_encoder_dsi_bridge_funcs;
+@@ -135,19 +134,17 @@ int meson_encoder_dsi_init(struct meson_drm *priv)
+ 	/* Encoder */
+ 	ret = drm_simple_encoder_init(priv->drm, &meson_encoder_dsi->encoder,
+ 				      DRM_MODE_ENCODER_DSI);
+-	if (ret) {
+-		dev_err(priv->dev, "Failed to init DSI encoder: %d\n", ret);
+-		return ret;
+-	}
++	if (ret)
++		return dev_err_probe(priv->dev, ret,
++				     "Failed to init DSI encoder\n");
+ 
+ 	meson_encoder_dsi->encoder.possible_crtcs = BIT(0);
+ 
+ 	/* Attach DSI Encoder Bridge to Encoder */
+ 	ret = drm_bridge_attach(&meson_encoder_dsi->encoder, &meson_encoder_dsi->bridge, NULL, 0);
+-	if (ret) {
+-		dev_err(priv->dev, "Failed to attach bridge: %d\n", ret);
+-		return ret;
+-	}
++	if (ret)
++		return dev_err_probe(priv->dev, ret,
++				     "Failed to attach bridge\n");
+ 
+ 	/*
+ 	 * We should have now in place:
+diff --git a/drivers/gpu/drm/meson/meson_encoder_dsi.h b/drivers/gpu/drm/meson/meson_encoder_dsi.h
+index 9277d7015193..85d5b61805f2 100644
+--- a/drivers/gpu/drm/meson/meson_encoder_dsi.h
++++ b/drivers/gpu/drm/meson/meson_encoder_dsi.h
+@@ -7,7 +7,7 @@
+ #ifndef __MESON_ENCODER_DSI_H
+ #define __MESON_ENCODER_DSI_H
+ 
+-int meson_encoder_dsi_init(struct meson_drm *priv);
++int meson_encoder_dsi_probe(struct meson_drm *priv);
+ void meson_encoder_dsi_remove(struct meson_drm *priv);
+ 
+ #endif /* __MESON_ENCODER_DSI_H */
+diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+index c4686568c9ca..22e07847a9a7 100644
+--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
++++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+@@ -354,7 +354,7 @@ static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = {
+ 	.atomic_reset = drm_atomic_helper_bridge_reset,
+ };
+ 
+-int meson_encoder_hdmi_init(struct meson_drm *priv)
++int meson_encoder_hdmi_probe(struct meson_drm *priv)
+ {
+ 	struct meson_encoder_hdmi *meson_encoder_hdmi;
+ 	struct platform_device *pdev;
+@@ -374,8 +374,8 @@ int meson_encoder_hdmi_init(struct meson_drm *priv)
+ 
+ 	meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote);
+ 	if (!meson_encoder_hdmi->next_bridge) {
+-		dev_err(priv->dev, "Failed to find HDMI transceiver bridge\n");
+-		ret = -EPROBE_DEFER;
++		ret = dev_err_probe(priv->dev, -EPROBE_DEFER,
++				    "Failed to find HDMI transceiver bridge\n");
+ 		goto err_put_node;
+ 	}
+ 
+@@ -393,7 +393,7 @@ int meson_encoder_hdmi_init(struct meson_drm *priv)
+ 	ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder,
+ 				      DRM_MODE_ENCODER_TMDS);
+ 	if (ret) {
+-		dev_err(priv->dev, "Failed to init HDMI encoder: %d\n", ret);
++		dev_err_probe(priv->dev, ret, "Failed to init HDMI encoder\n");
+ 		goto err_put_node;
+ 	}
+ 
+@@ -403,7 +403,7 @@ int meson_encoder_hdmi_init(struct meson_drm *priv)
+ 	ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL,
+ 				DRM_BRIDGE_ATTACH_NO_CONNECTOR);
+ 	if (ret) {
+-		dev_err(priv->dev, "Failed to attach bridge: %d\n", ret);
++		dev_err_probe(priv->dev, ret, "Failed to attach bridge\n");
+ 		goto err_put_node;
+ 	}
+ 
+@@ -411,8 +411,9 @@ int meson_encoder_hdmi_init(struct meson_drm *priv)
+ 	meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm,
+ 							&meson_encoder_hdmi->encoder);
+ 	if (IS_ERR(meson_encoder_hdmi->connector)) {
+-		dev_err(priv->dev, "Unable to create HDMI bridge connector\n");
+-		ret = PTR_ERR(meson_encoder_hdmi->connector);
++		ret = dev_err_probe(priv->dev,
++				    PTR_ERR(meson_encoder_hdmi->connector),
++				    "Unable to create HDMI bridge connector\n");
+ 		goto err_put_node;
+ 	}
+ 	drm_connector_attach_encoder(meson_encoder_hdmi->connector,
+diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.h b/drivers/gpu/drm/meson/meson_encoder_hdmi.h
+index a6cd38eb5f71..fd5485875db8 100644
+--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.h
++++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.h
+@@ -7,7 +7,7 @@
+ #ifndef __MESON_ENCODER_HDMI_H
+ #define __MESON_ENCODER_HDMI_H
+ 
+-int meson_encoder_hdmi_init(struct meson_drm *priv);
++int meson_encoder_hdmi_probe(struct meson_drm *priv);
+ void meson_encoder_hdmi_remove(struct meson_drm *priv);
+ 
+ #endif /* __MESON_ENCODER_HDMI_H */
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v8-dt-bindings-phy-amlogic-g12a-mipi-dphy-a.patch

@@ -1,45 +0,0 @@
-From d9a23fe8b1b3d326641f818ac9f8c6a470eb05b7 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:05 +0100
-Subject: [PATCH 27/64] FROMLIST(v8): dt-bindings: phy:
- amlogic,g12a-mipi-dphy-analog: drop unneeded reg property and example
-
-Now this bindings is referred from amlogic,meson-gx-hhi-sysctrl.yaml and is
-documented as a subnode of a simple-mfd, drop the invalid reg property.
-
-Also drop the unnecessary example, the top level bindings example should
-be enough.
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- .../bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml  | 12 ------------
- 1 file changed, 12 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml
-index c8c83acfb871..81c2654b7e57 100644
---- a/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml
-+++ b/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml
-@@ -16,20 +16,8 @@ properties:
-   "#phy-cells":
-     const: 0
- 
--  reg:
--    maxItems: 1
--
- required:
-   - compatible
--  - reg
-   - "#phy-cells"
- 
- additionalProperties: false
--
--examples:
--  - |
--    phy@0 {
--          compatible = "amlogic,g12a-mipi-dphy-analog";
--          reg = <0x0 0xc>;
--          #phy-cells = <0>;
--    };
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v1-drm-meson-vclk-fix-calculation-of-59.94-.patch

@@ -1,7 +1,7 @@
-From f6a65a3e57eaa033fecd68cf48603ec9112ce1b7 Mon Sep 17 00:00:00 2001
+From 9fa5e4f1d94a0ca01deb5bbe03299e415f0df8c3 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Tue, 9 Jan 2024 16:20:14 +0000
-Subject: [PATCH 41/64] FROMLIST(v1): drm/meson: vclk: fix calculation of 59.94
+Subject: [PATCH 28/53] FROMLIST(v1): drm/meson: vclk: fix calculation of 59.94
  fractional rates
 
 Playing 4K media with 59.94 fractional rate (typically VP9) causes the screen to lose

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v8-dt-bindings-arm-amlogic-Document-the-MNT.patch

@@ -1,30 +0,0 @@
-From fca51065b3fe383fbddb87ac1721bddcd95efc3b Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:06 +0100
-Subject: [PATCH 28/64] FROMLIST(v8): dt-bindings: arm: amlogic: Document the
- MNT Reform 2 CM4 adapter with a BPI-CM4 Module
-
-The MNT Reform 2 CM4 adapter can be populated with any Raspberry Pi CM4
-compatible module such as a BPI-CM4 Module, document that.
-
-Acked-by: Conor Dooley <conor.dooley@microchip.com>
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
-index caab7ceeda45..2154a4614fda 100644
---- a/Documentation/devicetree/bindings/arm/amlogic.yaml
-+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
-@@ -164,6 +164,7 @@ properties:
-         items:
-           - enum:
-               - bananapi,bpi-cm4io
-+              - mntre,reform2-cm4
-           - const: bananapi,bpi-cm4
-           - const: amlogic,a311d
-           - const: amlogic,g12b
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-FROMLIST-v1-ASoC-meson-axg-tdm-interface-fix-mclk-se.patch

@@ -0,0 +1,43 @@
+From 5cddc22049efb7e7aa5382ce789379c943170187 Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Fri, 23 Feb 2024 18:51:07 +0100
+Subject: [PATCH 29/53] FROMLIST(v1): ASoC: meson: axg-tdm-interface: fix mclk
+ setup without mclk-fs
+
+By default, when mclk-fs is not provided, the tdm-interface driver
+requests an MCLK that is 4x the bit clock, SCLK.
+
+However there is no justification for this:
+
+* If the codec needs MCLK for its operation, mclk-fs is expected to be set
+  according to the codec requirements.
+* If the codec does not need MCLK the minimum is 2 * SCLK, because this is
+  minimum the divider between SCLK and MCLK can do.
+
+Multiplying by 4 may cause problems because the PLL limit may be reached
+sooner than it should, so use 2x instead.
+
+Fixes: d60e4f1e4be5 ("ASoC: meson: add tdm interface driver")
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+---
+ sound/soc/meson/axg-tdm-interface.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/sound/soc/meson/axg-tdm-interface.c b/sound/soc/meson/axg-tdm-interface.c
+index 1c3d433cefd2..cd5168e826df 100644
+--- a/sound/soc/meson/axg-tdm-interface.c
++++ b/sound/soc/meson/axg-tdm-interface.c
+@@ -264,8 +264,8 @@ static int axg_tdm_iface_set_sclk(struct snd_soc_dai *dai,
+ 	srate = iface->slots * iface->slot_width * params_rate(params);
+ 
+ 	if (!iface->mclk_rate) {
+-		/* If no specific mclk is requested, default to bit clock * 4 */
+-		clk_set_rate(iface->mclk, 4 * srate);
++		/* If no specific mclk is requested, default to bit clock * 2 */
++		clk_set_rate(iface->mclk, 2 * srate);
+ 	} else {
+ 		/* Check if we can actually get the bit clock from mclk */
+ 		if (iface->mclk_rate % srate) {
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-FROMLIST-v8-clk-meson-g12a-add-CTS_ENCL-CTS_ENCL_SEL.patch

@@ -1,120 +0,0 @@
-From 2679f6f082479807380db1bd9977856ac8cc8da0 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:07 +0100
-Subject: [PATCH 29/64] FROMLIST(v8): clk: meson: g12a: add CTS_ENCL &
- CTS_ENCL_SEL clocks
-
-Add new CTS_ENCL & CTS_ENCL_SEL clocks for the G12A compatible
-SoCs, they are used to feed the VPU LCD Pixel encoder used for
-DSI display purposes.
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- drivers/clk/meson/g12a.c | 40 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 40 insertions(+)
-
-diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
-index f373a8d48b1d..cadd824336ad 100644
---- a/drivers/clk/meson/g12a.c
-+++ b/drivers/clk/meson/g12a.c
-@@ -3549,6 +3549,22 @@ static struct clk_regmap g12a_cts_encp_sel = {
- 	},
- };
- 
-+static struct clk_regmap g12a_cts_encl_sel = {
-+	.data = &(struct clk_regmap_mux_data){
-+		.offset = HHI_VIID_CLK_DIV,
-+		.mask = 0xf,
-+		.shift = 12,
-+		.table = mux_table_cts_sel,
-+	},
-+	.hw.init = &(struct clk_init_data){
-+		.name = "cts_encl_sel",
-+		.ops = &clk_regmap_mux_ops,
-+		.parent_hws = g12a_cts_parent_hws,
-+		.num_parents = ARRAY_SIZE(g12a_cts_parent_hws),
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE,
-+	},
-+};
-+
- static struct clk_regmap g12a_cts_vdac_sel = {
- 	.data = &(struct clk_regmap_mux_data){
- 		.offset = HHI_VIID_CLK_DIV,
-@@ -3628,6 +3644,22 @@ static struct clk_regmap g12a_cts_encp = {
- 	},
- };
- 
-+static struct clk_regmap g12a_cts_encl = {
-+	.data = &(struct clk_regmap_gate_data){
-+		.offset = HHI_VID_CLK_CNTL2,
-+		.bit_idx = 3,
-+	},
-+	.hw.init = &(struct clk_init_data) {
-+		.name = "cts_encl",
-+		.ops = &clk_regmap_gate_ops,
-+		.parent_hws = (const struct clk_hw *[]) {
-+			&g12a_cts_encl_sel.hw
-+		},
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
- static struct clk_regmap g12a_cts_vdac = {
- 	.data = &(struct clk_regmap_gate_data){
- 		.offset = HHI_VID_CLK_CNTL2,
-@@ -4407,10 +4439,12 @@ static struct clk_hw *g12a_hw_clks[] = {
- 	[CLKID_VCLK2_DIV12]		= &g12a_vclk2_div12.hw,
- 	[CLKID_CTS_ENCI_SEL]		= &g12a_cts_enci_sel.hw,
- 	[CLKID_CTS_ENCP_SEL]		= &g12a_cts_encp_sel.hw,
-+	[CLKID_CTS_ENCL_SEL]		= &g12a_cts_encl_sel.hw,
- 	[CLKID_CTS_VDAC_SEL]		= &g12a_cts_vdac_sel.hw,
- 	[CLKID_HDMI_TX_SEL]		= &g12a_hdmi_tx_sel.hw,
- 	[CLKID_CTS_ENCI]		= &g12a_cts_enci.hw,
- 	[CLKID_CTS_ENCP]		= &g12a_cts_encp.hw,
-+	[CLKID_CTS_ENCL]		= &g12a_cts_encl.hw,
- 	[CLKID_CTS_VDAC]		= &g12a_cts_vdac.hw,
- 	[CLKID_HDMI_TX]			= &g12a_hdmi_tx.hw,
- 	[CLKID_HDMI_SEL]		= &g12a_hdmi_sel.hw,
-@@ -4632,10 +4666,12 @@ static struct clk_hw *g12b_hw_clks[] = {
- 	[CLKID_VCLK2_DIV12]		= &g12a_vclk2_div12.hw,
- 	[CLKID_CTS_ENCI_SEL]		= &g12a_cts_enci_sel.hw,
- 	[CLKID_CTS_ENCP_SEL]		= &g12a_cts_encp_sel.hw,
-+	[CLKID_CTS_ENCL_SEL]		= &g12a_cts_encl_sel.hw,
- 	[CLKID_CTS_VDAC_SEL]		= &g12a_cts_vdac_sel.hw,
- 	[CLKID_HDMI_TX_SEL]		= &g12a_hdmi_tx_sel.hw,
- 	[CLKID_CTS_ENCI]		= &g12a_cts_enci.hw,
- 	[CLKID_CTS_ENCP]		= &g12a_cts_encp.hw,
-+	[CLKID_CTS_ENCL]		= &g12a_cts_encl.hw,
- 	[CLKID_CTS_VDAC]		= &g12a_cts_vdac.hw,
- 	[CLKID_HDMI_TX]			= &g12a_hdmi_tx.hw,
- 	[CLKID_HDMI_SEL]		= &g12a_hdmi_sel.hw,
-@@ -4892,10 +4928,12 @@ static struct clk_hw *sm1_hw_clks[] = {
- 	[CLKID_VCLK2_DIV12]		= &g12a_vclk2_div12.hw,
- 	[CLKID_CTS_ENCI_SEL]		= &g12a_cts_enci_sel.hw,
- 	[CLKID_CTS_ENCP_SEL]		= &g12a_cts_encp_sel.hw,
-+	[CLKID_CTS_ENCL_SEL]		= &g12a_cts_encl_sel.hw,
- 	[CLKID_CTS_VDAC_SEL]		= &g12a_cts_vdac_sel.hw,
- 	[CLKID_HDMI_TX_SEL]		= &g12a_hdmi_tx_sel.hw,
- 	[CLKID_CTS_ENCI]		= &g12a_cts_enci.hw,
- 	[CLKID_CTS_ENCP]		= &g12a_cts_encp.hw,
-+	[CLKID_CTS_ENCL]		= &g12a_cts_encl.hw,
- 	[CLKID_CTS_VDAC]		= &g12a_cts_vdac.hw,
- 	[CLKID_HDMI_TX]			= &g12a_hdmi_tx.hw,
- 	[CLKID_HDMI_SEL]		= &g12a_hdmi_sel.hw,
-@@ -5123,10 +5161,12 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
- 	&g12a_vclk2_div12_en,
- 	&g12a_cts_enci_sel,
- 	&g12a_cts_encp_sel,
-+	&g12a_cts_encl_sel,
- 	&g12a_cts_vdac_sel,
- 	&g12a_hdmi_tx_sel,
- 	&g12a_cts_enci,
- 	&g12a_cts_encp,
-+	&g12a_cts_encl,
- 	&g12a_cts_vdac,
- 	&g12a_hdmi_tx,
- 	&g12a_hdmi_sel,
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-FROMLIST-v1-ASoC-meson-axg-tdm-interface-add-frame-r.patch

@@ -0,0 +1,80 @@
+From 69a95e8b2be63812ca0b8e3b59786a21f074cfe9 Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Fri, 23 Feb 2024 18:51:08 +0100
+Subject: [PATCH 30/53] FROMLIST(v1): ASoC: meson: axg-tdm-interface: add frame
+ rate constraint
+
+According to Amlogic datasheets for the SoCs supported by this driver, the
+maximum bit clock rate is 100MHz.
+
+The tdm interface allows the rates listed by the DAI driver, regardless of
+the number slots or their width. However, these will impact the bit clock
+rate.
+
+Hitting the 100MHz limit is very unlikely for most use cases but it is
+possible.
+
+For example with 32 slots / 32 bits wide, the maximum rate is no longer
+384kHz but ~96kHz.
+
+Add the constraint accordingly if the component is not already active.
+If it is active, the rate is already constrained by the first stream rate.
+
+Fixes: d60e4f1e4be5 ("ASoC: meson: add tdm interface driver")
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+---
+ sound/soc/meson/axg-tdm-interface.c | 25 ++++++++++++++++++-------
+ 1 file changed, 18 insertions(+), 7 deletions(-)
+
+diff --git a/sound/soc/meson/axg-tdm-interface.c b/sound/soc/meson/axg-tdm-interface.c
+index cd5168e826df..2cedbce73837 100644
+--- a/sound/soc/meson/axg-tdm-interface.c
++++ b/sound/soc/meson/axg-tdm-interface.c
+@@ -12,6 +12,9 @@
+ 
+ #include "axg-tdm.h"
+ 
++/* Maximum bit clock frequency according the datasheets */
++#define MAX_SCLK 100000000 /* Hz */
++
+ enum {
+ 	TDM_IFACE_PAD,
+ 	TDM_IFACE_LOOPBACK,
+@@ -153,19 +156,27 @@ static int axg_tdm_iface_startup(struct snd_pcm_substream *substream,
+ 		return -EINVAL;
+ 	}
+ 
+-	/* Apply component wide rate symmetry */
+ 	if (snd_soc_component_active(dai->component)) {
++		/* Apply component wide rate symmetry */
+ 		ret = snd_pcm_hw_constraint_single(substream->runtime,
+ 						   SNDRV_PCM_HW_PARAM_RATE,
+ 						   iface->rate);
+-		if (ret < 0) {
+-			dev_err(dai->dev,
+-				"can't set iface rate constraint\n");
+-			return ret;
+-		}
++
++	} else {
++		/* Limit rate according to the slot number and width */
++		unsigned int max_rate =
++			MAX_SCLK / (iface->slots * iface->slot_width);
++		ret = snd_pcm_hw_constraint_minmax(substream->runtime,
++						   SNDRV_PCM_HW_PARAM_RATE,
++						   0, max_rate);
+ 	}
+ 
+-	return 0;
++	if (ret < 0)
++		dev_err(dai->dev, "can't set iface rate constraint\n");
++	else
++		ret = 0;
++
++	return ret;
+ }
+ 
+ static int axg_tdm_iface_set_stream(struct snd_pcm_substream *substream,
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-FROMLIST-v8-clk-meson-add-vclk-driver.patch

@@ -1,271 +0,0 @@
-From 66f1e78fbe2a3d6726e90986a8ecc09098d3d3a6 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:08 +0100
-Subject: [PATCH 30/64] FROMLIST(v8): clk: meson: add vclk driver
-
-The VCLK and VCLK_DIV clocks have supplementary bits.
-
-The VCLK has a "SOFT RESET" bit to toggle after the whole
-VCLK sub-tree rate has been set, this is implemented in
-the gate enable callback.
-
-The VCLK_DIV clocks as enable and reset bits used to disable
-and reset the divider, associated with CLK_SET_RATE_GATE it ensures
-the rate is set while the divider is disabled and in reset mode.
-
-The VCLK_DIV enable bit isn't implemented as a gate since it's part
-of the divider logic and vendor does this exact sequence to ensure
-the divider is correctly set.
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- drivers/clk/meson/Kconfig  |   5 ++
- drivers/clk/meson/Makefile |   1 +
- drivers/clk/meson/vclk.c   | 141 +++++++++++++++++++++++++++++++++++++
- drivers/clk/meson/vclk.h   |  51 ++++++++++++++
- 4 files changed, 198 insertions(+)
- create mode 100644 drivers/clk/meson/vclk.c
- create mode 100644 drivers/clk/meson/vclk.h
-
-diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
-index 29ffd14d267b..59a40a49f8e1 100644
---- a/drivers/clk/meson/Kconfig
-+++ b/drivers/clk/meson/Kconfig
-@@ -30,6 +30,10 @@ config COMMON_CLK_MESON_VID_PLL_DIV
- 	tristate
- 	select COMMON_CLK_MESON_REGMAP
- 
-+config COMMON_CLK_MESON_VCLK
-+	tristate
-+	select COMMON_CLK_MESON_REGMAP
-+
- config COMMON_CLK_MESON_CLKC_UTILS
- 	tristate
- 
-@@ -140,6 +144,7 @@ config COMMON_CLK_G12A
- 	select COMMON_CLK_MESON_EE_CLKC
- 	select COMMON_CLK_MESON_CPU_DYNDIV
- 	select COMMON_CLK_MESON_VID_PLL_DIV
-+	select COMMON_CLK_MESON_VCLK
- 	select MFD_SYSCON
- 	help
- 	  Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2
-diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
-index 9ee4b954c896..9ba43fe7a07a 100644
---- a/drivers/clk/meson/Makefile
-+++ b/drivers/clk/meson/Makefile
-@@ -12,6 +12,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o
- obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o
- obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o
- obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o
-+obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o
- 
- # Amlogic Clock controllers
- 
-diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c
-new file mode 100644
-index 000000000000..47f08a52b49f
---- /dev/null
-+++ b/drivers/clk/meson/vclk.c
-@@ -0,0 +1,141 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
-+ */
-+
-+#include <linux/module.h>
-+#include "vclk.h"
-+
-+/* The VCLK gate has a supplementary reset bit to pulse after ungating */
-+
-+static inline struct clk_regmap_vclk_data *
-+clk_get_regmap_vclk_data(struct clk_regmap *clk)
-+{
-+	return (struct clk_regmap_vclk_data *)clk->data;
-+}
-+
-+static int clk_regmap_vclk_enable(struct clk_hw *hw)
-+{
-+	struct clk_regmap *clk = to_clk_regmap(hw);
-+	struct clk_regmap_vclk_data *vclk = clk_get_regmap_vclk_data(clk);
-+
-+	meson_parm_write(clk->map, &vclk->enable, 1);
-+
-+	/* Do a reset pulse */
-+	meson_parm_write(clk->map, &vclk->reset, 1);
-+	meson_parm_write(clk->map, &vclk->reset, 0);
-+
-+	return 0;
-+}
-+
-+static void clk_regmap_vclk_disable(struct clk_hw *hw)
-+{
-+	struct clk_regmap *clk = to_clk_regmap(hw);
-+	struct clk_regmap_vclk_data *vclk = clk_get_regmap_vclk_data(clk);
-+
-+	meson_parm_write(clk->map, &vclk->enable, 0);
-+}
-+
-+static int clk_regmap_vclk_is_enabled(struct clk_hw *hw)
-+{
-+	struct clk_regmap *clk = to_clk_regmap(hw);
-+	struct clk_regmap_vclk_data *vclk = clk_get_regmap_vclk_data(clk);
-+
-+	return meson_parm_read(clk->map, &vclk->enable);
-+}
-+
-+const struct clk_ops clk_regmap_vclk_ops = {
-+	.enable = clk_regmap_vclk_enable,
-+	.disable = clk_regmap_vclk_disable,
-+	.is_enabled = clk_regmap_vclk_is_enabled,
-+};
-+EXPORT_SYMBOL_GPL(clk_regmap_vclk_ops);
-+
-+/* The VCLK Divider has supplementary reset & enable bits */
-+
-+static inline struct clk_regmap_vclk_div_data *
-+clk_get_regmap_vclk_div_data(struct clk_regmap *clk)
-+{
-+	return (struct clk_regmap_vclk_div_data *)clk->data;
-+}
-+
-+static unsigned long clk_regmap_vclk_div_recalc_rate(struct clk_hw *hw,
-+						     unsigned long prate)
-+{
-+	struct clk_regmap *clk = to_clk_regmap(hw);
-+	struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
-+
-+	return divider_recalc_rate(hw, prate, meson_parm_read(clk->map, &vclk->div),
-+				   vclk->table, vclk->flags, vclk->div.width);
-+}
-+
-+static int clk_regmap_vclk_div_determine_rate(struct clk_hw *hw,
-+					      struct clk_rate_request *req)
-+{
-+	struct clk_regmap *clk = to_clk_regmap(hw);
-+	struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
-+
-+	return divider_determine_rate(hw, req, vclk->table, vclk->div.width,
-+				      vclk->flags);
-+}
-+
-+static int clk_regmap_vclk_div_set_rate(struct clk_hw *hw, unsigned long rate,
-+					unsigned long parent_rate)
-+{
-+	struct clk_regmap *clk = to_clk_regmap(hw);
-+	struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
-+	int ret;
-+
-+	ret = divider_get_val(rate, parent_rate, vclk->table, vclk->div.width,
-+			      vclk->flags);
-+	if (ret < 0)
-+		return ret;
-+
-+	meson_parm_write(clk->map, &vclk->div, ret);
-+
-+	return 0;
-+};
-+
-+static int clk_regmap_vclk_div_enable(struct clk_hw *hw)
-+{
-+	struct clk_regmap *clk = to_clk_regmap(hw);
-+	struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
-+
-+	/* Unreset the divider when ungating */
-+	meson_parm_write(clk->map, &vclk->reset, 0);
-+	meson_parm_write(clk->map, &vclk->enable, 1);
-+
-+	return 0;
-+}
-+
-+static void clk_regmap_vclk_div_disable(struct clk_hw *hw)
-+{
-+	struct clk_regmap *clk = to_clk_regmap(hw);
-+	struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
-+
-+	/* Reset the divider when gating */
-+	meson_parm_write(clk->map, &vclk->enable, 0);
-+	meson_parm_write(clk->map, &vclk->reset, 1);
-+}
-+
-+static int clk_regmap_vclk_div_is_enabled(struct clk_hw *hw)
-+{
-+	struct clk_regmap *clk = to_clk_regmap(hw);
-+	struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
-+
-+	return meson_parm_read(clk->map, &vclk->enable);
-+}
-+
-+const struct clk_ops clk_regmap_vclk_div_ops = {
-+	.recalc_rate = clk_regmap_vclk_div_recalc_rate,
-+	.determine_rate = clk_regmap_vclk_div_determine_rate,
-+	.set_rate = clk_regmap_vclk_div_set_rate,
-+	.enable = clk_regmap_vclk_div_enable,
-+	.disable = clk_regmap_vclk_div_disable,
-+	.is_enabled = clk_regmap_vclk_div_is_enabled,
-+};
-+EXPORT_SYMBOL_GPL(clk_regmap_vclk_div_ops);
-+
-+MODULE_DESCRIPTION("Amlogic vclk clock driver");
-+MODULE_AUTHOR("Neil Armstrong <neil.armstrong@linaro.org>");
-+MODULE_LICENSE("GPL v2");
-diff --git a/drivers/clk/meson/vclk.h b/drivers/clk/meson/vclk.h
-new file mode 100644
-index 000000000000..4f25d7ad2717
---- /dev/null
-+++ b/drivers/clk/meson/vclk.h
-@@ -0,0 +1,51 @@
-+/* SPDX-License-Identifier: GPL-2.0 */
-+/*
-+ * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
-+ */
-+
-+#ifndef __VCLK_H
-+#define __VCLK_H
-+
-+#include "clk-regmap.h"
-+#include "parm.h"
-+
-+/**
-+ * struct clk_regmap_vclk_data - vclk regmap backed specific data
-+ *
-+ * @enable:	vclk enable field
-+ * @reset:	vclk reset field
-+ * @flags:	hardware-specific flags
-+ *
-+ * Flags:
-+ * Same as clk_gate except CLK_GATE_HIWORD_MASK which is ignored
-+ */
-+struct clk_regmap_vclk_data {
-+	struct parm enable;
-+	struct parm reset;
-+	u8 flags;
-+};
-+
-+extern const struct clk_ops clk_regmap_vclk_ops;
-+
-+/**
-+ * struct clk_regmap_vclk_div_data - vclk_div regmap back specific data
-+ *
-+ * @div:	divider field
-+ * @enable:	vclk divider enable field
-+ * @reset:	vclk divider reset field
-+ * @table:	array of value/divider pairs, last entry should have div = 0
-+ *
-+ * Flags:
-+ * Same as clk_divider except CLK_DIVIDER_HIWORD_MASK which is ignored
-+ */
-+struct clk_regmap_vclk_div_data {
-+	struct parm div;
-+	struct parm enable;
-+	struct parm reset;
-+	const struct clk_div_table *table;
-+	u8 flags;
-+};
-+
-+extern const struct clk_ops clk_regmap_vclk_div_ops;
-+
-+#endif /* __VCLK_H */
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-FROMLIST-v1-ASoC-meson-axg-tdm-interface-update-erro.patch

@@ -0,0 +1,32 @@
+From 9b3d51967fcfe47d82f280e8030aa3dc5fcc5c02 Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Fri, 23 Feb 2024 18:51:09 +0100
+Subject: [PATCH 31/53] FROMLIST(v1): ASoC: meson: axg-tdm-interface: update
+ error format error traces
+
+ASoC stopped using CBS_CFS and CBM_CFM a few years ago but the traces in
+the amlogic tdm interface driver did not follow.
+
+Update this to match the new format names
+
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+---
+ sound/soc/meson/axg-tdm-interface.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/sound/soc/meson/axg-tdm-interface.c b/sound/soc/meson/axg-tdm-interface.c
+index 2cedbce73837..bf708717635b 100644
+--- a/sound/soc/meson/axg-tdm-interface.c
++++ b/sound/soc/meson/axg-tdm-interface.c
+@@ -133,7 +133,7 @@ static int axg_tdm_iface_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
+ 
+ 	case SND_SOC_DAIFMT_BP_FC:
+ 	case SND_SOC_DAIFMT_BC_FP:
+-		dev_err(dai->dev, "only CBS_CFS and CBM_CFM are supported\n");
++		dev_err(dai->dev, "only BP_FP and BC_FC are supported\n");
+ 		fallthrough;
+ 	default:
+ 		return -EINVAL;
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-FROMLIST-v8-clk-meson-g12a-make-VCLK2-and-ENCL-clock.patch

@@ -1,264 +0,0 @@
-From a947da42547598dc8c44569cd55eda49c1c7f064 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:09 +0100
-Subject: [PATCH 31/64] FROMLIST(v8): clk: meson: g12a: make VCLK2 and ENCL
- clock path configurable by CCF
-
-In order to setup the DSI clock, let's make the unused VCLK2 clock path
-configuration via CCF.
-
-The nocache option is removed from following clocks:
-- vclk2_sel
-- vclk2_input
-- vclk2_div
-- vclk2
-- vclk_div1
-- vclk2_div2_en
-- vclk2_div4_en
-- vclk2_div6_en
-- vclk2_div12_en
-- vclk2_div2
-- vclk2_div4
-- vclk2_div6
-- vclk2_div12
-- cts_encl_sel
-
-vclk2 and vclk2_div uses the newly introduced vclk regmap driver
-to handle the enable and reset bits.
-
-In order to set a rate on cts_encl via the vclk2 clock path,
-the NO_REPARENT flag is set on cts_encl_sel & vclk2_sel in order
-to keep CCF from selection a parent.
-The parents of cts_encl_sel & vclk2_sel are expected to be defined
-in DT.
-
-The following clock scheme is to be used for DSI:
-
-xtal
-\_ gp0_pll_dco
-   \_ gp0_pll
-      |- vclk2_sel
-      |  \_ vclk2_input
-      |     \_ vclk2_div
-      |        \_ vclk2
-      |           \_ vclk2_div1
-      |              \_ cts_encl_sel
-      |                 \_ cts_encl	-> to VPU LCD Encoder
-      |- mipi_dsi_pxclk_sel
-      \_ mipi_dsi_pxclk_div
-         \_ mipi_dsi_pxclk		-> to DSI controller
-
-The mipi_dsi_pxclk_div is set as RO in order to use the same GP0
-for mipi_dsi_pxclk and vclk2_input.
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- drivers/clk/meson/g12a.c | 68 +++++++++++++++++++++++++++-------------
- 1 file changed, 47 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
-index cadd824336ad..fb3d9196a1fd 100644
---- a/drivers/clk/meson/g12a.c
-+++ b/drivers/clk/meson/g12a.c
-@@ -22,6 +22,7 @@
- #include "clk-regmap.h"
- #include "clk-cpu-dyndiv.h"
- #include "vid-pll-div.h"
-+#include "vclk.h"
- #include "meson-eeclk.h"
- #include "g12a.h"
- 
-@@ -3165,7 +3166,7 @@ static struct clk_regmap g12a_vclk2_sel = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_hws = g12a_vclk_parent_hws,
- 		.num_parents = ARRAY_SIZE(g12a_vclk_parent_hws),
--		.flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
- 	},
- };
- 
-@@ -3193,7 +3194,7 @@ static struct clk_regmap g12a_vclk2_input = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2_sel.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3215,19 +3216,32 @@ static struct clk_regmap g12a_vclk_div = {
- };
- 
- static struct clk_regmap g12a_vclk2_div = {
--	.data = &(struct clk_regmap_div_data){
--		.offset = HHI_VIID_CLK_DIV,
--		.shift = 0,
--		.width = 8,
-+	.data = &(struct clk_regmap_vclk_div_data){
-+		.div = {
-+			.reg_off = HHI_VIID_CLK_DIV,
-+			.shift   = 0,
-+			.width   = 8,
-+		},
-+		.enable = {
-+			.reg_off = HHI_VIID_CLK_DIV,
-+			.shift   = 16,
-+			.width   = 1,
-+		},
-+		.reset = {
-+			.reg_off = HHI_VIID_CLK_DIV,
-+			.shift   = 17,
-+			.width   = 1,
-+		},
-+		.flags = CLK_DIVIDER_ROUND_CLOSEST,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "vclk2_div",
--		.ops = &clk_regmap_divider_ops,
-+		.ops = &clk_regmap_vclk_div_ops,
- 		.parent_hws = (const struct clk_hw *[]) {
- 			&g12a_vclk2_input.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_GET_RATE_NOCACHE,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -3246,16 +3260,24 @@ static struct clk_regmap g12a_vclk = {
- };
- 
- static struct clk_regmap g12a_vclk2 = {
--	.data = &(struct clk_regmap_gate_data){
--		.offset = HHI_VIID_CLK_CNTL,
--		.bit_idx = 19,
-+	.data = &(struct clk_regmap_vclk_data){
-+		.enable = {
-+			.reg_off = HHI_VIID_CLK_CNTL,
-+			.shift   = 19,
-+			.width   = 1,
-+		},
-+		.reset = {
-+			.reg_off = HHI_VIID_CLK_CNTL,
-+			.shift   = 15,
-+			.width   = 1,
-+		},
- 	},
- 	.hw.init = &(struct clk_init_data) {
- 		.name = "vclk2",
--		.ops = &clk_regmap_gate_ops,
-+		.ops = &clk_regmap_vclk_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2_div.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -3339,7 +3361,7 @@ static struct clk_regmap g12a_vclk2_div1 = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3353,7 +3375,7 @@ static struct clk_regmap g12a_vclk2_div2_en = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3367,7 +3389,7 @@ static struct clk_regmap g12a_vclk2_div4_en = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3381,7 +3403,7 @@ static struct clk_regmap g12a_vclk2_div6_en = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3395,7 +3417,7 @@ static struct clk_regmap g12a_vclk2_div12_en = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3461,6 +3483,7 @@ static struct clk_fixed_factor g12a_vclk2_div2 = {
- 			&g12a_vclk2_div2_en.hw
- 		},
- 		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3474,6 +3497,7 @@ static struct clk_fixed_factor g12a_vclk2_div4 = {
- 			&g12a_vclk2_div4_en.hw
- 		},
- 		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3487,6 +3511,7 @@ static struct clk_fixed_factor g12a_vclk2_div6 = {
- 			&g12a_vclk2_div6_en.hw
- 		},
- 		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3500,6 +3525,7 @@ static struct clk_fixed_factor g12a_vclk2_div12 = {
- 			&g12a_vclk2_div12_en.hw
- 		},
- 		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT,
- 	},
- };
- 
-@@ -3561,7 +3587,7 @@ static struct clk_regmap g12a_cts_encl_sel = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_hws = g12a_cts_parent_hws,
- 		.num_parents = ARRAY_SIZE(g12a_cts_parent_hws),
--		.flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
- 	},
- };
- 
-@@ -3717,7 +3743,7 @@ static struct clk_regmap g12a_mipi_dsi_pxclk_sel = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_hws = g12a_mipi_dsi_pxclk_parent_hws,
- 		.num_parents = ARRAY_SIZE(g12a_mipi_dsi_pxclk_parent_hws),
--		.flags = CLK_SET_RATE_NO_REPARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
- 	},
- };
- 
-@@ -3729,7 +3755,7 @@ static struct clk_regmap g12a_mipi_dsi_pxclk_div = {
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "mipi_dsi_pxclk_div",
--		.ops = &clk_regmap_divider_ops,
-+		.ops = &clk_regmap_divider_ro_ops,
- 		.parent_hws = (const struct clk_hw *[]) {
- 			&g12a_mipi_dsi_pxclk_sel.hw
- 		},
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-FROMLIST-v1-ASoC-meson-axg-spdifin-use-max-width-for.patch

@@ -0,0 +1,47 @@
+From b399257ec04a93856fd0f1ebf5b6060dddf6aaed Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Fri, 23 Feb 2024 18:51:10 +0100
+Subject: [PATCH 32/53] FROMLIST(v1): ASoC: meson: axg-spdifin: use max width
+ for rate detection
+
+Use maximum width between 2 edges to setup spdifin thresholds
+and detect the input sample rate. This comes from Amlogic SDK and
+seems to be marginally more reliable than minimum width.
+
+This is done to align with a future eARC support.
+No issue was reported with minimum width so far, this is considered
+to be an update so no Fixes tag is set.
+
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+---
+ sound/soc/meson/axg-spdifin.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/sound/soc/meson/axg-spdifin.c b/sound/soc/meson/axg-spdifin.c
+index bc2f2849ecfb..e721f579321e 100644
+--- a/sound/soc/meson/axg-spdifin.c
++++ b/sound/soc/meson/axg-spdifin.c
+@@ -179,9 +179,9 @@ static int axg_spdifin_sample_mode_config(struct snd_soc_dai *dai,
+ 			   SPDIFIN_CTRL1_BASE_TIMER,
+ 			   FIELD_PREP(SPDIFIN_CTRL1_BASE_TIMER, rate / 1000));
+ 
+-	/* Threshold based on the minimum width between two edges */
++	/* Threshold based on the maximum width between two edges */
+ 	regmap_update_bits(priv->map, SPDIFIN_CTRL0,
+-			   SPDIFIN_CTRL0_WIDTH_SEL, SPDIFIN_CTRL0_WIDTH_SEL);
++			   SPDIFIN_CTRL0_WIDTH_SEL, 0);
+ 
+ 	/* Calculate the last timer which has no threshold */
+ 	t_next = axg_spdifin_mode_timer(priv, i, rate);
+@@ -199,7 +199,7 @@ static int axg_spdifin_sample_mode_config(struct snd_soc_dai *dai,
+ 		axg_spdifin_write_timer(priv->map, i, t);
+ 
+ 		/* Set the threshold value */
+-		axg_spdifin_write_threshold(priv->map, i, t + t_next);
++		axg_spdifin_write_threshold(priv->map, i, 3 * (t + t_next));
+ 
+ 		/* Save the current timer for the next threshold calculation */
+ 		t_next = t;
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-FROMLIST-v8-drm-meson-gate-px_clk-when-setting-rate.patch

@@ -1,43 +0,0 @@
-From e2dfeecc7473e47a20c14814ff4d0cfdcb85fea3 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:10 +0100
-Subject: [PATCH 32/64] FROMLIST(v8): drm/meson: gate px_clk when setting rate
-
-Disable the px_clk when setting the rate to recover a fully
-configured and correctly reset VCLK clock tree after the rate
-is set.
-
-Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver")
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
-index e5fe4e994f43..72abe2057ec3 100644
---- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
-+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
-@@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
- 		return ret;
- 	}
- 
-+	clk_disable_unprepare(mipi_dsi->px_clk);
- 	ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000);
- 
- 	if (ret) {
-@@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
- 		return ret;
- 	}
- 
-+	ret = clk_prepare_enable(mipi_dsi->px_clk);
-+	if (ret) {
-+		dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret);
-+		return ret;
-+	}
-+
- 	switch (mipi_dsi->dsi_device->format) {
- 	case MIPI_DSI_FMT_RGB888:
- 		dpi_data_format = DPI_COLOR_24BIT;
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-FROMLIST-v1-ASoC-meson-axg-fifo-take-continuous-rate.patch

@@ -0,0 +1,90 @@
+From 453af3a1ee8cea68dfdbdaed7a0a41f4a3743c76 Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Fri, 23 Feb 2024 18:51:11 +0100
+Subject: [PATCH 33/53] FROMLIST(v1): ASoC: meson: axg-fifo: take continuous
+ rates
+
+The rate of the stream does not matter for the fifos of the axg family.
+Fifos will just push or pull data to/from the DDR according to consumption
+or production of the downstream element, which is the DPCM backend.
+
+Drop the rate list and allow continuous rates. The lower and upper rate are
+set according what is known to work with the different backends
+
+This allows the PDM input backend to also use continuous rates.
+
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+---
+ sound/soc/meson/axg-fifo.h  | 2 --
+ sound/soc/meson/axg-frddr.c | 8 ++++++--
+ sound/soc/meson/axg-toddr.c | 8 ++++++--
+ 3 files changed, 12 insertions(+), 6 deletions(-)
+
+diff --git a/sound/soc/meson/axg-fifo.h b/sound/soc/meson/axg-fifo.h
+index df528e8cb7c9..a14c31eb06d8 100644
+--- a/sound/soc/meson/axg-fifo.h
++++ b/sound/soc/meson/axg-fifo.h
+@@ -21,8 +21,6 @@ struct snd_soc_dai_driver;
+ struct snd_soc_pcm_runtime;
+ 
+ #define AXG_FIFO_CH_MAX			128
+-#define AXG_FIFO_RATES			(SNDRV_PCM_RATE_5512 |		\
+-					 SNDRV_PCM_RATE_8000_384000)
+ #define AXG_FIFO_FORMATS		(SNDRV_PCM_FMTBIT_S8 |		\
+ 					 SNDRV_PCM_FMTBIT_S16_LE |	\
+ 					 SNDRV_PCM_FMTBIT_S20_LE |	\
+diff --git a/sound/soc/meson/axg-frddr.c b/sound/soc/meson/axg-frddr.c
+index 8c166a5f338c..98140f449eb3 100644
+--- a/sound/soc/meson/axg-frddr.c
++++ b/sound/soc/meson/axg-frddr.c
+@@ -109,7 +109,9 @@ static struct snd_soc_dai_driver axg_frddr_dai_drv = {
+ 		.stream_name	= "Playback",
+ 		.channels_min	= 1,
+ 		.channels_max	= AXG_FIFO_CH_MAX,
+-		.rates		= AXG_FIFO_RATES,
++		.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++		.rate_min	= 5515,
++		.rate_max	= 384000,
+ 		.formats	= AXG_FIFO_FORMATS,
+ 	},
+ 	.ops		= &axg_frddr_ops,
+@@ -184,7 +186,9 @@ static struct snd_soc_dai_driver g12a_frddr_dai_drv = {
+ 		.stream_name	= "Playback",
+ 		.channels_min	= 1,
+ 		.channels_max	= AXG_FIFO_CH_MAX,
+-		.rates		= AXG_FIFO_RATES,
++		.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++		.rate_min	= 5515,
++		.rate_max	= 384000,
+ 		.formats	= AXG_FIFO_FORMATS,
+ 	},
+ 	.ops		= &g12a_frddr_ops,
+diff --git a/sound/soc/meson/axg-toddr.c b/sound/soc/meson/axg-toddr.c
+index 1a0be177b8fe..32ee45cce7f8 100644
+--- a/sound/soc/meson/axg-toddr.c
++++ b/sound/soc/meson/axg-toddr.c
+@@ -131,7 +131,9 @@ static struct snd_soc_dai_driver axg_toddr_dai_drv = {
+ 		.stream_name	= "Capture",
+ 		.channels_min	= 1,
+ 		.channels_max	= AXG_FIFO_CH_MAX,
+-		.rates		= AXG_FIFO_RATES,
++		.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++		.rate_min	= 5515,
++		.rate_max	= 384000,
+ 		.formats	= AXG_FIFO_FORMATS,
+ 	},
+ 	.ops		= &axg_toddr_ops,
+@@ -226,7 +228,9 @@ static struct snd_soc_dai_driver g12a_toddr_dai_drv = {
+ 		.stream_name	= "Capture",
+ 		.channels_min	= 1,
+ 		.channels_max	= AXG_FIFO_CH_MAX,
+-		.rates		= AXG_FIFO_RATES,
++		.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++		.rate_min	= 5515,
++		.rate_max	= 384000,
+ 		.formats	= AXG_FIFO_FORMATS,
+ 	},
+ 	.ops		= &g12a_toddr_ops,
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-FROMLIST-v8-arm64-meson-g12-common-add-the-MIPI-DSI-.patch

@@ -1,115 +0,0 @@
-From b619319aa02b96b8a7271885066da15b5d3b6578 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Thu, 9 Nov 2023 10:00:11 +0100
-Subject: [PATCH 33/64] FROMLIST(v8): arm64: meson: g12-common: add the MIPI
- DSI nodes
-
-Add the MIPI DSI Analog & Digital PHY nodes and the DSI control
-nodes with proper port endpoint to the VPU.
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- .../boot/dts/amlogic/meson-g12-common.dtsi    | 70 +++++++++++++++++++
- 1 file changed, 70 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-index a960d07f9af3..ad0bfc8f1db6 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-@@ -1663,9 +1663,28 @@ pwrc: power-controller {
- 								       <250000000>,
- 								       <0>; /* Do Nothing */
- 					};
-+
-+					mipi_analog_dphy: phy {
-+						compatible = "amlogic,g12a-mipi-dphy-analog";
-+						#phy-cells = <0>;
-+						status = "disabled";
-+					};
- 				};
- 			};
- 
-+			mipi_dphy: phy@44000 {
-+				compatible = "amlogic,axg-mipi-dphy";
-+				reg = <0x0 0x44000 0x0 0x2000>;
-+				clocks = <&clkc CLKID_MIPI_DSI_PHY>;
-+				clock-names = "pclk";
-+				resets = <&reset RESET_MIPI_DSI_PHY>;
-+				reset-names = "phy";
-+				phys = <&mipi_analog_dphy>;
-+				phy-names = "analog";
-+				#phy-cells = <0>;
-+				status = "disabled";
-+			};
-+
- 			usb3_pcie_phy: phy@46000 {
- 				compatible = "amlogic,g12a-usb3-pcie-phy";
- 				reg = <0x0 0x46000 0x0 0x2000>;
-@@ -2152,6 +2171,15 @@ hdmi_tx_out: endpoint {
- 					remote-endpoint = <&hdmi_tx_in>;
- 				};
- 			};
-+
-+			/* DPI output port */
-+			dpi_port: port@2 {
-+				reg = <2>;
-+
-+				dpi_out: endpoint {
-+					remote-endpoint = <&mipi_dsi_in>;
-+				};
-+			};
- 		};
- 
- 		gic: interrupt-controller@ffc01000 {
-@@ -2189,6 +2217,48 @@ gpio_intc: interrupt-controller@f080 {
- 				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
- 			};
- 
-+			mipi_dsi: dsi@7000 {
-+				compatible = "amlogic,meson-g12a-dw-mipi-dsi";
-+				reg = <0x0 0x7000 0x0 0x1000>;
-+				resets = <&reset RESET_MIPI_DSI_HOST>;
-+				reset-names = "top";
-+				clocks = <&clkc CLKID_MIPI_DSI_HOST>,
-+					 <&clkc CLKID_MIPI_DSI_PXCLK>,
-+					 <&clkc CLKID_CTS_ENCL>;
-+				clock-names = "pclk", "bit", "px";
-+				phys = <&mipi_dphy>;
-+				phy-names = "dphy";
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+				status = "disabled";
-+
-+				assigned-clocks = <&clkc CLKID_MIPI_DSI_PXCLK_SEL>,
-+					 <&clkc CLKID_CTS_ENCL_SEL>,
-+					 <&clkc CLKID_VCLK2_SEL>;
-+				assigned-clock-parents = <&clkc CLKID_GP0_PLL>,
-+					 <&clkc CLKID_VCLK2_DIV1>,
-+					 <&clkc CLKID_GP0_PLL>;
-+
-+				ports {
-+					#address-cells = <1>;
-+					#size-cells = <0>;
-+
-+					/* VPU VENC Input */
-+					mipi_dsi_venc_port: port@0 {
-+						reg = <0>;
-+
-+						mipi_dsi_in: endpoint {
-+							remote-endpoint = <&dpi_out>;
-+						};
-+					};
-+
-+					/* DSI Output */
-+					mipi_dsi_panel_port: port@1 {
-+						reg = <1>;
-+					};
-+				};
-+			};
-+
- 			watchdog: watchdog@f0d0 {
- 				compatible = "amlogic,meson-gxbb-wdt";
- 				reg = <0x0 0xf0d0 0x0 0x10>;
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-FROMLIST-v1-ASoC-meson-axg-fifo-use-FIELD-helpers.patch

@@ -0,0 +1,176 @@
+From 3e72fee0fba2026ba5c16a4a3f329fc04fcce310 Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Fri, 23 Feb 2024 18:51:12 +0100
+Subject: [PATCH 34/53] FROMLIST(v1): ASoC: meson: axg-fifo: use FIELD helpers
+
+Use FIELD_GET() and FIELD_PREP() helpers instead of doing it manually.
+
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+---
+ sound/soc/meson/axg-fifo.c  | 24 ++++++++++++------------
+ sound/soc/meson/axg-fifo.h  | 12 +++++-------
+ sound/soc/meson/axg-frddr.c |  4 ++--
+ sound/soc/meson/axg-toddr.c | 21 +++++++++------------
+ 4 files changed, 28 insertions(+), 33 deletions(-)
+
+diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
+index 65541fdb0038..597fd39e6e48 100644
+--- a/sound/soc/meson/axg-fifo.c
++++ b/sound/soc/meson/axg-fifo.c
+@@ -145,8 +145,8 @@ int axg_fifo_pcm_hw_params(struct snd_soc_component *component,
+ 	/* Enable irq if necessary  */
+ 	irq_en = runtime->no_period_wakeup ? 0 : FIFO_INT_COUNT_REPEAT;
+ 	regmap_update_bits(fifo->map, FIFO_CTRL0,
+-			   CTRL0_INT_EN(FIFO_INT_COUNT_REPEAT),
+-			   CTRL0_INT_EN(irq_en));
++			   CTRL0_INT_EN,
++			   FIELD_PREP(CTRL0_INT_EN, irq_en));
+ 
+ 	return 0;
+ }
+@@ -176,9 +176,9 @@ int axg_fifo_pcm_hw_free(struct snd_soc_component *component,
+ {
+ 	struct axg_fifo *fifo = axg_fifo_data(ss);
+ 
+-	/* Disable the block count irq */
++	/* Disable irqs */
+ 	regmap_update_bits(fifo->map, FIFO_CTRL0,
+-			   CTRL0_INT_EN(FIFO_INT_COUNT_REPEAT), 0);
++			   CTRL0_INT_EN, 0);
+ 
+ 	return 0;
+ }
+@@ -187,13 +187,13 @@ EXPORT_SYMBOL_GPL(axg_fifo_pcm_hw_free);
+ static void axg_fifo_ack_irq(struct axg_fifo *fifo, u8 mask)
+ {
+ 	regmap_update_bits(fifo->map, FIFO_CTRL1,
+-			   CTRL1_INT_CLR(FIFO_INT_MASK),
+-			   CTRL1_INT_CLR(mask));
++			   CTRL1_INT_CLR,
++			   FIELD_PREP(CTRL1_INT_CLR, mask));
+ 
+ 	/* Clear must also be cleared */
+ 	regmap_update_bits(fifo->map, FIFO_CTRL1,
+-			   CTRL1_INT_CLR(FIFO_INT_MASK),
+-			   0);
++			   CTRL1_INT_CLR,
++			   FIELD_PREP(CTRL1_INT_CLR, 0));
+ }
+ 
+ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id)
+@@ -204,7 +204,7 @@ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id)
+ 
+ 	regmap_read(fifo->map, FIFO_STATUS1, &status);
+ 
+-	status = STATUS1_INT_STS(status) & FIFO_INT_MASK;
++	status = FIELD_GET(STATUS1_INT_STS, status);
+ 	if (status & FIFO_INT_COUNT_REPEAT)
+ 		snd_pcm_period_elapsed(ss);
+ 	else
+@@ -254,15 +254,15 @@ int axg_fifo_pcm_open(struct snd_soc_component *component,
+ 
+ 	/* Setup status2 so it reports the memory pointer */
+ 	regmap_update_bits(fifo->map, FIFO_CTRL1,
+-			   CTRL1_STATUS2_SEL_MASK,
+-			   CTRL1_STATUS2_SEL(STATUS2_SEL_DDR_READ));
++			   CTRL1_STATUS2_SEL,
++			   FIELD_PREP(CTRL1_STATUS2_SEL, STATUS2_SEL_DDR_READ));
+ 
+ 	/* Make sure the dma is initially disabled */
+ 	__dma_enable(fifo, false);
+ 
+ 	/* Disable irqs until params are ready */
+ 	regmap_update_bits(fifo->map, FIFO_CTRL0,
+-			   CTRL0_INT_EN(FIFO_INT_MASK), 0);
++			   CTRL0_INT_EN, 0);
+ 
+ 	/* Clear any pending interrupt */
+ 	axg_fifo_ack_irq(fifo, FIFO_INT_MASK);
+diff --git a/sound/soc/meson/axg-fifo.h b/sound/soc/meson/axg-fifo.h
+index a14c31eb06d8..4c48c0a08481 100644
+--- a/sound/soc/meson/axg-fifo.h
++++ b/sound/soc/meson/axg-fifo.h
+@@ -40,21 +40,19 @@ struct snd_soc_pcm_runtime;
+ 
+ #define FIFO_CTRL0			0x00
+ #define  CTRL0_DMA_EN			BIT(31)
+-#define  CTRL0_INT_EN(x)		((x) << 16)
++#define  CTRL0_INT_EN			GENMASK(23, 16)
+ #define  CTRL0_SEL_MASK			GENMASK(2, 0)
+ #define  CTRL0_SEL_SHIFT		0
+ #define FIFO_CTRL1			0x04
+-#define  CTRL1_INT_CLR(x)		((x) << 0)
+-#define  CTRL1_STATUS2_SEL_MASK		GENMASK(11, 8)
+-#define  CTRL1_STATUS2_SEL(x)		((x) << 8)
++#define  CTRL1_INT_CLR			GENMASK(7, 0)
++#define  CTRL1_STATUS2_SEL		GENMASK(11, 8)
+ #define   STATUS2_SEL_DDR_READ		0
+-#define  CTRL1_FRDDR_DEPTH_MASK		GENMASK(31, 24)
+-#define  CTRL1_FRDDR_DEPTH(x)		((x) << 24)
++#define  CTRL1_FRDDR_DEPTH		GENMASK(31, 24)
+ #define FIFO_START_ADDR			0x08
+ #define FIFO_FINISH_ADDR		0x0c
+ #define FIFO_INT_ADDR			0x10
+ #define FIFO_STATUS1			0x14
+-#define  STATUS1_INT_STS(x)		((x) << 0)
++#define  STATUS1_INT_STS		GENMASK(7, 0)
+ #define FIFO_STATUS2			0x18
+ #define FIFO_INIT_ADDR			0x24
+ #define FIFO_CTRL2			0x28
+diff --git a/sound/soc/meson/axg-frddr.c b/sound/soc/meson/axg-frddr.c
+index 98140f449eb3..97ca0ea5faa5 100644
+--- a/sound/soc/meson/axg-frddr.c
++++ b/sound/soc/meson/axg-frddr.c
+@@ -59,8 +59,8 @@ static int axg_frddr_dai_hw_params(struct snd_pcm_substream *substream,
+ 	/* Trim the FIFO depth if the period is small to improve latency */
+ 	depth = min(period, fifo->depth);
+ 	val = (depth / AXG_FIFO_BURST) - 1;
+-	regmap_update_bits(fifo->map, FIFO_CTRL1, CTRL1_FRDDR_DEPTH_MASK,
+-			   CTRL1_FRDDR_DEPTH(val));
++	regmap_update_bits(fifo->map, FIFO_CTRL1, CTRL1_FRDDR_DEPTH,
++			   FIELD_PREP(CTRL1_FRDDR_DEPTH, val));
+ 
+ 	return 0;
+ }
+diff --git a/sound/soc/meson/axg-toddr.c b/sound/soc/meson/axg-toddr.c
+index 32ee45cce7f8..5b08b4e841ad 100644
+--- a/sound/soc/meson/axg-toddr.c
++++ b/sound/soc/meson/axg-toddr.c
+@@ -19,12 +19,9 @@
+ #define CTRL0_TODDR_EXT_SIGNED		BIT(29)
+ #define CTRL0_TODDR_PP_MODE		BIT(28)
+ #define CTRL0_TODDR_SYNC_CH		BIT(27)
+-#define CTRL0_TODDR_TYPE_MASK		GENMASK(15, 13)
+-#define CTRL0_TODDR_TYPE(x)		((x) << 13)
+-#define CTRL0_TODDR_MSB_POS_MASK	GENMASK(12, 8)
+-#define CTRL0_TODDR_MSB_POS(x)		((x) << 8)
+-#define CTRL0_TODDR_LSB_POS_MASK	GENMASK(7, 3)
+-#define CTRL0_TODDR_LSB_POS(x)		((x) << 3)
++#define CTRL0_TODDR_TYPE		GENMASK(15, 13)
++#define CTRL0_TODDR_MSB_POS		GENMASK(12, 8)
++#define CTRL0_TODDR_LSB_POS		GENMASK(7, 3)
+ #define CTRL1_TODDR_FORCE_FINISH	BIT(25)
+ #define CTRL1_SEL_SHIFT			28
+ 
+@@ -76,12 +73,12 @@ static int axg_toddr_dai_hw_params(struct snd_pcm_substream *substream,
+ 	width = params_width(params);
+ 
+ 	regmap_update_bits(fifo->map, FIFO_CTRL0,
+-			   CTRL0_TODDR_TYPE_MASK |
+-			   CTRL0_TODDR_MSB_POS_MASK |
+-			   CTRL0_TODDR_LSB_POS_MASK,
+-			   CTRL0_TODDR_TYPE(type) |
+-			   CTRL0_TODDR_MSB_POS(TODDR_MSB_POS) |
+-			   CTRL0_TODDR_LSB_POS(TODDR_MSB_POS - (width - 1)));
++			   CTRL0_TODDR_TYPE |
++			   CTRL0_TODDR_MSB_POS |
++			   CTRL0_TODDR_LSB_POS,
++			   FIELD_PREP(CTRL0_TODDR_TYPE, type) |
++			   FIELD_PREP(CTRL0_TODDR_MSB_POS, TODDR_MSB_POS) |
++			   FIELD_PREP(CTRL0_TODDR_LSB_POS, TODDR_MSB_POS - (width - 1)));
+ 
+ 	return 0;
+ }
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-FROMLIST-v1-dt-bindings-clock-g12a-clkc-add-MIPI-ISP.patch

@@ -1,32 +0,0 @@
-From 61521f25f94a41ca43a822838ba006f3cf98a22b Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Tue, 14 Nov 2023 11:14:43 +0100
-Subject: [PATCH 34/64] FROMLIST(v1): dt-bindings: clock: g12a-clkc: add MIPI
- ISP & CSI PHY clock ids
-
-Add MIPI ISP & CSI PHY clock ids to G12A clock bindings header
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- include/dt-bindings/clock/g12a-clkc.h | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h
-index 636d713f95ff..fd09819da2ec 100644
---- a/include/dt-bindings/clock/g12a-clkc.h
-+++ b/include/dt-bindings/clock/g12a-clkc.h
-@@ -281,5 +281,11 @@
- #define CLKID_MIPI_DSI_PXCLK			270
- #define CLKID_CTS_ENCL				271
- #define CLKID_CTS_ENCL_SEL			272
-+#define CLKID_MIPI_ISP_DIV			273
-+#define CLKID_MIPI_ISP_SEL			274
-+#define CLKID_MIPI_ISP				275
-+#define CLKID_MIPI_ISP_GATE			276
-+#define CLKID_MIPI_ISP_CSI_PHY0			277
-+#define CLKID_MIPI_ISP_CSI_PHY1			278
- 
- #endif /* __G12A_CLKC_H */
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-FROMLIST-v1-clk-meson-g12a-add-MIPI-ISP-clocks.patch

@@ -1,120 +0,0 @@
-From 075caf89c3400340b8b8396bdf4f8dd8bf09ca45 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Tue, 14 Nov 2023 11:14:44 +0100
-Subject: [PATCH 35/64] FROMLIST(v1): clk: meson: g12a: add MIPI ISP clocks
-
-Add the MIPI ISP gate, divider and mux used to feed the MIPI CSI ISP
-(Image Signal Processor) IP on the Amlogic G12B SoC.
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- drivers/clk/meson/g12a.c | 66 ++++++++++++++++++++++++++++++++++++++++
- drivers/clk/meson/g12a.h |  1 +
- 2 files changed, 67 insertions(+)
-
-diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
-index fb3d9196a1fd..b32812bf6d8d 100644
---- a/drivers/clk/meson/g12a.c
-+++ b/drivers/clk/meson/g12a.c
-@@ -3780,6 +3780,66 @@ static struct clk_regmap g12a_mipi_dsi_pxclk = {
- 	},
- };
- 
-+/* MIPI ISP Clocks */
-+
-+static const struct clk_parent_data g12b_mipi_isp_parent_data[] = {
-+	{ .fw_name = "xtal", },
-+	{ .hw = &g12a_gp0_pll.hw },
-+	{ .hw = &g12a_hifi_pll.hw },
-+	{ .hw = &g12a_fclk_div2p5.hw },
-+	{ .hw = &g12a_fclk_div3.hw },
-+	{ .hw = &g12a_fclk_div4.hw },
-+	{ .hw = &g12a_fclk_div5.hw },
-+	{ .hw = &g12a_fclk_div7.hw },
-+};
-+
-+static struct clk_regmap g12b_mipi_isp_sel = {
-+	.data = &(struct clk_regmap_mux_data){
-+		.offset = HHI_ISP_CLK_CNTL,
-+		.mask = 7,
-+		.shift = 9,
-+	},
-+	.hw.init = &(struct clk_init_data){
-+		.name = "mipi_isp_sel",
-+		.ops = &clk_regmap_mux_ops,
-+		.parent_data = g12b_mipi_isp_parent_data,
-+		.num_parents = ARRAY_SIZE(g12b_mipi_isp_parent_data),
-+	},
-+};
-+
-+static struct clk_regmap g12b_mipi_isp_div = {
-+	.data = &(struct clk_regmap_div_data){
-+		.offset = HHI_ISP_CLK_CNTL,
-+		.shift = 0,
-+		.width = 7,
-+	},
-+	.hw.init = &(struct clk_init_data){
-+		.name = "mipi_isp_div",
-+		.ops = &clk_regmap_divider_ops,
-+		.parent_hws = (const struct clk_hw *[]) {
-+			&g12b_mipi_isp_sel.hw
-+		},
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT,
-+	},
-+};
-+
-+static struct clk_regmap g12b_mipi_isp = {
-+	.data = &(struct clk_regmap_gate_data){
-+		.offset = HHI_ISP_CLK_CNTL,
-+		.bit_idx = 8,
-+	},
-+	.hw.init = &(struct clk_init_data) {
-+		.name = "mipi_isp",
-+		.ops = &clk_regmap_gate_ops,
-+		.parent_hws = (const struct clk_hw *[]) {
-+			&g12b_mipi_isp_div.hw
-+		},
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT,
-+	},
-+};
-+
- /* HDMI Clocks */
- 
- static const struct clk_parent_data g12a_hdmi_parent_data[] = {
-@@ -4791,6 +4851,9 @@ static struct clk_hw *g12b_hw_clks[] = {
- 	[CLKID_MIPI_DSI_PXCLK_SEL]	= &g12a_mipi_dsi_pxclk_sel.hw,
- 	[CLKID_MIPI_DSI_PXCLK_DIV]	= &g12a_mipi_dsi_pxclk_div.hw,
- 	[CLKID_MIPI_DSI_PXCLK]		= &g12a_mipi_dsi_pxclk.hw,
-+	[CLKID_MIPI_ISP_SEL]		= &g12b_mipi_isp_sel.hw,
-+	[CLKID_MIPI_ISP_DIV]		= &g12b_mipi_isp_div.hw,
-+	[CLKID_MIPI_ISP]		= &g12b_mipi_isp.hw,
- };
- 
- static struct clk_hw *sm1_hw_clks[] = {
-@@ -5287,6 +5350,9 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
- 	&g12a_mipi_dsi_pxclk_sel,
- 	&g12a_mipi_dsi_pxclk_div,
- 	&g12a_mipi_dsi_pxclk,
-+	&g12b_mipi_isp_sel,
-+	&g12b_mipi_isp_div,
-+	&g12b_mipi_isp,
- };
- 
- static const struct reg_sequence g12a_init_regs[] = {
-diff --git a/drivers/clk/meson/g12a.h b/drivers/clk/meson/g12a.h
-index f11ee3c59849..27df99c4565a 100644
---- a/drivers/clk/meson/g12a.h
-+++ b/drivers/clk/meson/g12a.h
-@@ -70,6 +70,7 @@
- #define HHI_MALI_CLK_CNTL		0x1b0
- #define HHI_VPU_CLKC_CNTL		0x1b4
- #define HHI_VPU_CLK_CNTL		0x1bC
-+#define HHI_ISP_CLK_CNTL		0x1C0
- #define HHI_NNA_CLK_CNTL		0x1C8
- #define HHI_HDMI_CLK_CNTL		0x1CC
- #define HHI_VDEC_CLK_CNTL		0x1E0
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-FROMLIST-v1-drm-panfrost-fix-power-transition-timeou.patch

@@ -0,0 +1,58 @@
+From 75a8df6a4644ae9399d277c164e591130ee1c776 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Wed, 20 Mar 2024 13:28:08 +0000
+Subject: [PATCH 35/53] FROMLIST(v1): drm/panfrost: fix power transition
+ timeout warnings
+
+Increase the timeout value to prevent system logs on Amlogic boards flooding
+with power transition warnings:
+
+[   13.047638] panfrost ffe40000.gpu: shader power transition timeout
+[   13.048674] panfrost ffe40000.gpu: l2 power transition timeout
+[   13.937324] panfrost ffe40000.gpu: shader power transition timeout
+[   13.938351] panfrost ffe40000.gpu: l2 power transition timeout
+...
+[39829.506904] panfrost ffe40000.gpu: shader power transition timeout
+[39829.507938] panfrost ffe40000.gpu: l2 power transition timeout
+[39949.508369] panfrost ffe40000.gpu: shader power transition timeout
+[39949.509405] panfrost ffe40000.gpu: l2 power transition timeout
+
+The 2000 value has been found through trial and error testing on Amlogic boards
+with G52 and G31 GPU's.
+
+Fixes: 22aa1a209018 ("drm/panfrost: Really power off GPU cores in panfrost_gpu_power_off()")
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ drivers/gpu/drm/panfrost/panfrost_gpu.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c
+index 9063ce254642..fd8e44992184 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_gpu.c
++++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c
+@@ -441,19 +441,19 @@ void panfrost_gpu_power_off(struct panfrost_device *pfdev)
+ 
+ 	gpu_write(pfdev, SHADER_PWROFF_LO, pfdev->features.shader_present);
+ 	ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_PWRTRANS_LO,
+-					 val, !val, 1, 1000);
++					 val, !val, 1, 2000);
+ 	if (ret)
+ 		dev_err(pfdev->dev, "shader power transition timeout");
+ 
+ 	gpu_write(pfdev, TILER_PWROFF_LO, pfdev->features.tiler_present);
+ 	ret = readl_relaxed_poll_timeout(pfdev->iomem + TILER_PWRTRANS_LO,
+-					 val, !val, 1, 1000);
++					 val, !val, 1, 2000);
+ 	if (ret)
+ 		dev_err(pfdev->dev, "tiler power transition timeout");
+ 
+ 	gpu_write(pfdev, L2_PWROFF_LO, pfdev->features.l2_present);
+ 	ret = readl_poll_timeout(pfdev->iomem + L2_PWRTRANS_LO,
+-				 val, !val, 0, 1000);
++				 val, !val, 0, 2000);
+ 	if (ret)
+ 		dev_err(pfdev->dev, "l2 power transition timeout");
+ }
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-FROMLIST-v1-clk-meson-g12a-add-CSI-ISP-gates-clocks.patch

@@ -1,53 +0,0 @@
-From 9a03043242074b17f7fcd90ef3e49647eea67032 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Tue, 14 Nov 2023 11:14:45 +0100
-Subject: [PATCH 36/64] FROMLIST(v1): clk: meson: g12a: add CSI & ISP gates
- clocks
-
-Add the gates entires for the CSI ISP domain and CSI PHYs.
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- drivers/clk/meson/g12a.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
-index b32812bf6d8d..078ef5cd026c 100644
---- a/drivers/clk/meson/g12a.c
-+++ b/drivers/clk/meson/g12a.c
-@@ -4332,9 +4332,12 @@ static MESON_GATE(g12a_htx_hdcp22,		HHI_GCLK_MPEG2,	3);
- static MESON_GATE(g12a_htx_pclk,		HHI_GCLK_MPEG2,	4);
- static MESON_GATE(g12a_bt656,			HHI_GCLK_MPEG2,	6);
- static MESON_GATE(g12a_usb1_to_ddr,		HHI_GCLK_MPEG2,	8);
-+static MESON_GATE(g12b_mipi_isp_gate,		HHI_GCLK_MPEG2,	17);
- static MESON_GATE(g12a_mmc_pclk,		HHI_GCLK_MPEG2,	11);
- static MESON_GATE(g12a_uart2,			HHI_GCLK_MPEG2,	15);
- static MESON_GATE(g12a_vpu_intr,		HHI_GCLK_MPEG2,	25);
-+static MESON_GATE(g12b_csi_phy1,		HHI_GCLK_MPEG2,	28);
-+static MESON_GATE(g12b_csi_phy0,		HHI_GCLK_MPEG2,	29);
- static MESON_GATE(g12a_gic,			HHI_GCLK_MPEG2,	30);
- 
- static MESON_GATE(g12a_vclk2_venci0,		HHI_GCLK_OTHER,	1);
-@@ -4854,6 +4857,9 @@ static struct clk_hw *g12b_hw_clks[] = {
- 	[CLKID_MIPI_ISP_SEL]		= &g12b_mipi_isp_sel.hw,
- 	[CLKID_MIPI_ISP_DIV]		= &g12b_mipi_isp_div.hw,
- 	[CLKID_MIPI_ISP]		= &g12b_mipi_isp.hw,
-+	[CLKID_MIPI_ISP_GATE]		= &g12b_mipi_isp_gate.hw,
-+	[CLKID_MIPI_ISP_CSI_PHY0]	= &g12b_csi_phy0.hw,
-+	[CLKID_MIPI_ISP_CSI_PHY1]	= &g12b_csi_phy1.hw,
- };
- 
- static struct clk_hw *sm1_hw_clks[] = {
-@@ -5353,6 +5359,9 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
- 	&g12b_mipi_isp_sel,
- 	&g12b_mipi_isp_div,
- 	&g12b_mipi_isp,
-+	&g12b_mipi_isp_gate,
-+	&g12b_csi_phy1,
-+	&g12b_csi_phy0,
- };
- 
- static const struct reg_sequence g12a_init_regs[] = {
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-FROMLIST-v1-iio-adc-meson-fix-voltage-reference-sele.patch

@@ -0,0 +1,66 @@
+From ff1b40e46c3498843e616b364e8f985b0146255f Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Sat, 23 Mar 2024 20:04:49 +0100
+Subject: [PATCH 36/53] FROMLIST(v1): iio: adc: meson: fix voltage reference
+ selection field name typo
+
+The field should be called "vref_voltage", without a typo in the word
+voltage. No functional changes intended.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ drivers/iio/adc/meson_saradc.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
+index 13b473d8c6c7..2615d74534df 100644
+--- a/drivers/iio/adc/meson_saradc.c
++++ b/drivers/iio/adc/meson_saradc.c
+@@ -327,7 +327,7 @@ struct meson_sar_adc_param {
+ 	u8					vref_select;
+ 	u8					cmv_select;
+ 	u8					adc_eoc;
+-	enum meson_sar_adc_vref_sel		vref_volatge;
++	enum meson_sar_adc_vref_sel		vref_voltage;
+ };
+ 
+ struct meson_sar_adc_data {
+@@ -1001,7 +1001,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
+ 		}
+ 
+ 		regval = FIELD_PREP(MESON_SAR_ADC_REG11_VREF_VOLTAGE,
+-				    priv->param->vref_volatge);
++				    priv->param->vref_voltage);
+ 		regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
+ 				   MESON_SAR_ADC_REG11_VREF_VOLTAGE, regval);
+ 
+@@ -1225,7 +1225,7 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
+ 	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
+ 	.resolution = 10,
+ 	.has_reg11 = true,
+-	.vref_volatge = 1,
++	.vref_voltage = 1,
+ 	.cmv_select = 1,
+ };
+ 
+@@ -1237,7 +1237,7 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
+ 	.resolution = 12,
+ 	.disable_ring_counter = 1,
+ 	.has_reg11 = true,
+-	.vref_volatge = 1,
++	.vref_voltage = 1,
+ 	.cmv_select = 1,
+ };
+ 
+@@ -1249,7 +1249,7 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
+ 	.resolution = 12,
+ 	.disable_ring_counter = 1,
+ 	.has_reg11 = true,
+-	.vref_volatge = 1,
++	.vref_voltage = 1,
+ 	.has_vref_select = true,
+ 	.vref_select = VREF_VDDA,
+ 	.cmv_select = 1,
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-FROMLIST-v1-dt-bindings-power-meson-g12a-power-docum.patch

@@ -1,27 +0,0 @@
-From 71004ec4f352989cddfc3e119d100b74cbc79a58 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Tue, 14 Nov 2023 11:19:50 +0100
-Subject: [PATCH 37/64] FROMLIST(v1): dt-bindings: power: meson-g12a-power:
- document ISP power domain
-
-Add MIPI ISP power domain ID to the G12A Power domains bindings header
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- include/dt-bindings/power/meson-g12a-power.h | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
-index 44ec0c50e340..01fd0ac4dd08 100644
---- a/include/dt-bindings/power/meson-g12a-power.h
-+++ b/include/dt-bindings/power/meson-g12a-power.h
-@@ -10,5 +10,6 @@
- #define PWRC_G12A_VPU_ID		0
- #define PWRC_G12A_ETH_ID		1
- #define PWRC_G12A_NNA_ID		2
-+#define PWRC_G12A_ISP_ID		3
- 
- #endif
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-FROMLIST-v1-iio-adc-consistently-use-bool-and-enum-i.patch

@@ -0,0 +1,142 @@
+From e75fe79643d8d1be19c91d195b9fa1cc16bfffa8 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Sat, 23 Mar 2024 20:30:02 +0100
+Subject: [PATCH 37/53] FROMLIST(v1): iio: adc: consistently use bool and enum
+ in struct meson_sar_adc_param
+
+Consistently use bool for any register bit that enables/disables
+functionality and enum for register values where there's a choice
+between different settings. The aim is to make the code easier to read
+and understand by being more consistent. No functional changes intended.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ drivers/iio/adc/meson_saradc.c | 47 +++++++++++++++++++---------------
+ 1 file changed, 27 insertions(+), 20 deletions(-)
+
+diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
+index 2615d74534df..6b2af0c2bbc7 100644
+--- a/drivers/iio/adc/meson_saradc.c
++++ b/drivers/iio/adc/meson_saradc.c
+@@ -156,9 +156,9 @@
+ #define MESON_SAR_ADC_REG11					0x2c
+ 	#define MESON_SAR_ADC_REG11_BANDGAP_EN			BIT(13)
+ 	#define MESON_SAR_ADC_REG11_CMV_SEL                     BIT(6)
+-	#define MESON_SAR_ADC_REG11_VREF_VOLTAGE                BIT(5)
+-	#define MESON_SAR_ADC_REG11_EOC                         BIT(1)
+-	#define MESON_SAR_ADC_REG11_VREF_SEL                    BIT(0)
++	#define MESON_SAR_ADC_REG11_VREF_VOLTAGE		BIT(5)
++	#define MESON_SAR_ADC_REG11_EOC				BIT(1)
++	#define MESON_SAR_ADC_REG11_VREF_SEL			BIT(0)
+ 
+ #define MESON_SAR_ADC_REG13					0x34
+ 	#define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK	GENMASK(13, 8)
+@@ -224,6 +224,11 @@ enum meson_sar_adc_vref_sel {
+ 	VREF_VDDA = 1,
+ };
+ 
++enum meson_sar_adc_vref_voltage {
++	VREF_VOLTAGE_0V9 = 0,
++	VREF_VOLTAGE_1V8 = 1,
++};
++
+ enum meson_sar_adc_avg_mode {
+ 	NO_AVERAGING = 0x0,
+ 	MEAN_AVERAGING = 0x1,
+@@ -321,13 +326,13 @@ struct meson_sar_adc_param {
+ 	u8					temperature_trimming_bits;
+ 	unsigned int				temperature_multiplier;
+ 	unsigned int				temperature_divider;
+-	u8					disable_ring_counter;
++	bool					disable_ring_counter;
+ 	bool					has_reg11;
+ 	bool					has_vref_select;
+-	u8					vref_select;
+-	u8					cmv_select;
+-	u8					adc_eoc;
+-	enum meson_sar_adc_vref_sel		vref_voltage;
++	bool					cmv_select;
++	bool					adc_eoc;
++	enum meson_sar_adc_vref_sel		vref_select;
++	enum meson_sar_adc_vref_voltage		vref_voltage;
+ };
+ 
+ struct meson_sar_adc_data {
+@@ -982,14 +987,16 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
+ 				   MESON_SAR_ADC_DELTA_10_TS_REVE0, 0);
+ 	}
+ 
+-	regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,
+-			    priv->param->disable_ring_counter);
++	if (priv->param->disable_ring_counter)
++		regval = MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN;
++	else
++		regval = 0;
+ 	regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
+ 			   MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,
+ 			   regval);
+ 
+ 	if (priv->param->has_reg11) {
+-		regval = FIELD_PREP(MESON_SAR_ADC_REG11_EOC, priv->param->adc_eoc);
++		regval = priv->param->adc_eoc ? MESON_SAR_ADC_REG11_EOC : 0;
+ 		regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
+ 				   MESON_SAR_ADC_REG11_EOC, regval);
+ 
+@@ -1005,8 +1012,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
+ 		regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
+ 				   MESON_SAR_ADC_REG11_VREF_VOLTAGE, regval);
+ 
+-		regval = FIELD_PREP(MESON_SAR_ADC_REG11_CMV_SEL,
+-				    priv->param->cmv_select);
++		regval = priv->param->cmv_select ? MESON_SAR_ADC_REG11_CMV_SEL : 0;
+ 		regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
+ 				   MESON_SAR_ADC_REG11_CMV_SEL, regval);
+ 	}
+@@ -1225,8 +1231,8 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
+ 	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
+ 	.resolution = 10,
+ 	.has_reg11 = true,
+-	.vref_voltage = 1,
+-	.cmv_select = 1,
++	.vref_voltage = VREF_VOLTAGE_1V8,
++	.cmv_select = true,
+ };
+ 
+ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
+@@ -1237,8 +1243,8 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
+ 	.resolution = 12,
+ 	.disable_ring_counter = 1,
+ 	.has_reg11 = true,
+-	.vref_voltage = 1,
+-	.cmv_select = 1,
++	.vref_voltage = VREF_VOLTAGE_1V8,
++	.cmv_select = true,
+ };
+ 
+ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
+@@ -1249,10 +1255,10 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
+ 	.resolution = 12,
+ 	.disable_ring_counter = 1,
+ 	.has_reg11 = true,
+-	.vref_voltage = 1,
++	.vref_voltage = VREF_VOLTAGE_1V8,
+ 	.has_vref_select = true,
+ 	.vref_select = VREF_VDDA,
+-	.cmv_select = 1,
++	.cmv_select = true,
+ };
+ 
+ static const struct meson_sar_adc_param meson_sar_adc_g12a_param = {
+@@ -1263,7 +1269,8 @@ static const struct meson_sar_adc_param meson_sar_adc_g12a_param = {
+ 	.resolution = 12,
+ 	.disable_ring_counter = 1,
+ 	.has_reg11 = true,
+-	.adc_eoc = 1,
++	.vref_voltage = VREF_VOLTAGE_0V9,
++	.adc_eoc = true,
+ 	.has_vref_select = true,
+ 	.vref_select = VREF_VDDA,
+ };
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0038-FROMLIST-v1-iio-adc-meson-simplify-MESON_SAR_ADC_REG.patch

@@ -0,0 +1,135 @@
+From c6a0829ea93c2460d1fcc79eb59f9704832a073c Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Sat, 23 Mar 2024 20:35:58 +0100
+Subject: [PATCH 38/53] FROMLIST(v1): iio: adc: meson: simplify
+ MESON_SAR_ADC_REG11 register access
+
+Simply check the max_register value to decide whether
+MESON_SAR_ADC_REG11 is present on the current IP revision. This allows
+dropping two additional bool fields from struct meson_sar_adc_param
+which previously had to be manually kept in sync. No functional changes
+intended.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ drivers/iio/adc/meson_saradc.c | 29 ++++++++---------------------
+ 1 file changed, 8 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
+index 6b2af0c2bbc7..8c1e542c0ab7 100644
+--- a/drivers/iio/adc/meson_saradc.c
++++ b/drivers/iio/adc/meson_saradc.c
+@@ -320,14 +320,12 @@ static const struct iio_chan_spec meson_sar_adc_and_temp_iio_channels[] = {
+ struct meson_sar_adc_param {
+ 	bool					has_bl30_integration;
+ 	unsigned long				clock_rate;
+-	u32					bandgap_reg;
+ 	unsigned int				resolution;
+ 	const struct regmap_config		*regmap_config;
+ 	u8					temperature_trimming_bits;
+ 	unsigned int				temperature_multiplier;
+ 	unsigned int				temperature_divider;
+ 	bool					disable_ring_counter;
+-	bool					has_reg11;
+ 	bool					has_vref_select;
+ 	bool					cmv_select;
+ 	bool					adc_eoc;
+@@ -995,7 +993,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
+ 			   MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,
+ 			   regval);
+ 
+-	if (priv->param->has_reg11) {
++	if (priv->param->regmap_config->max_register >= MESON_SAR_ADC_REG11) {
+ 		regval = priv->param->adc_eoc ? MESON_SAR_ADC_REG11_EOC : 0;
+ 		regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
+ 				   MESON_SAR_ADC_REG11_EOC, regval);
+@@ -1031,16 +1029,15 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
+ static void meson_sar_adc_set_bandgap(struct iio_dev *indio_dev, bool on_off)
+ {
+ 	struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
+-	const struct meson_sar_adc_param *param = priv->param;
+-	u32 enable_mask;
+ 
+-	if (param->bandgap_reg == MESON_SAR_ADC_REG11)
+-		enable_mask = MESON_SAR_ADC_REG11_BANDGAP_EN;
++	if (priv->param->regmap_config->max_register >= MESON_SAR_ADC_REG11)
++		regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
++				   MESON_SAR_ADC_REG11_BANDGAP_EN,
++				   on_off ? MESON_SAR_ADC_REG11_BANDGAP_EN : 0);
+ 	else
+-		enable_mask = MESON_SAR_ADC_DELTA_10_TS_VBG_EN;
+-
+-	regmap_update_bits(priv->regmap, param->bandgap_reg, enable_mask,
+-			   on_off ? enable_mask : 0);
++		regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELTA_10,
++				   MESON_SAR_ADC_DELTA_10_TS_VBG_EN,
++				   on_off ? MESON_SAR_ADC_DELTA_10_TS_VBG_EN : 0);
+ }
+ 
+ static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev)
+@@ -1205,7 +1202,6 @@ static const struct iio_info meson_sar_adc_iio_info = {
+ static const struct meson_sar_adc_param meson_sar_adc_meson8_param = {
+ 	.has_bl30_integration = false,
+ 	.clock_rate = 1150000,
+-	.bandgap_reg = MESON_SAR_ADC_DELTA_10,
+ 	.regmap_config = &meson_sar_adc_regmap_config_meson8,
+ 	.resolution = 10,
+ 	.temperature_trimming_bits = 4,
+@@ -1216,7 +1212,6 @@ static const struct meson_sar_adc_param meson_sar_adc_meson8_param = {
+ static const struct meson_sar_adc_param meson_sar_adc_meson8b_param = {
+ 	.has_bl30_integration = false,
+ 	.clock_rate = 1150000,
+-	.bandgap_reg = MESON_SAR_ADC_DELTA_10,
+ 	.regmap_config = &meson_sar_adc_regmap_config_meson8,
+ 	.resolution = 10,
+ 	.temperature_trimming_bits = 5,
+@@ -1227,10 +1222,8 @@ static const struct meson_sar_adc_param meson_sar_adc_meson8b_param = {
+ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
+ 	.has_bl30_integration = true,
+ 	.clock_rate = 1200000,
+-	.bandgap_reg = MESON_SAR_ADC_REG11,
+ 	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
+ 	.resolution = 10,
+-	.has_reg11 = true,
+ 	.vref_voltage = VREF_VOLTAGE_1V8,
+ 	.cmv_select = true,
+ };
+@@ -1238,11 +1231,9 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
+ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
+ 	.has_bl30_integration = true,
+ 	.clock_rate = 1200000,
+-	.bandgap_reg = MESON_SAR_ADC_REG11,
+ 	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
+ 	.resolution = 12,
+ 	.disable_ring_counter = 1,
+-	.has_reg11 = true,
+ 	.vref_voltage = VREF_VOLTAGE_1V8,
+ 	.cmv_select = true,
+ };
+@@ -1250,11 +1241,9 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
+ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
+ 	.has_bl30_integration = true,
+ 	.clock_rate = 1200000,
+-	.bandgap_reg = MESON_SAR_ADC_REG11,
+ 	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
+ 	.resolution = 12,
+ 	.disable_ring_counter = 1,
+-	.has_reg11 = true,
+ 	.vref_voltage = VREF_VOLTAGE_1V8,
+ 	.has_vref_select = true,
+ 	.vref_select = VREF_VDDA,
+@@ -1264,11 +1253,9 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
+ static const struct meson_sar_adc_param meson_sar_adc_g12a_param = {
+ 	.has_bl30_integration = false,
+ 	.clock_rate = 1200000,
+-	.bandgap_reg = MESON_SAR_ADC_REG11,
+ 	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
+ 	.resolution = 12,
+ 	.disable_ring_counter = 1,
+-	.has_reg11 = true,
+ 	.vref_voltage = VREF_VOLTAGE_0V9,
+ 	.adc_eoc = true,
+ 	.has_vref_select = true,
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0038-FROMLIST-v1-pmdomain-amlogic-meson-ee-pwrc-add-suppo.patch

@@ -1,64 +0,0 @@
-From 34bb3dd9fabe0a5680368d093c7993d213106bc1 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <neil.armstrong@linaro.org>
-Date: Tue, 14 Nov 2023 11:19:51 +0100
-Subject: [PATCH 38/64] FROMLIST(v1): pmdomain: amlogic: meson-ee-pwrc: add
- support for G12A ISP power domain
-
-Add entries for the ISP power domain found in the Amlogic G12B SoC
-
-Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
----
- drivers/pmdomain/amlogic/meson-ee-pwrc.c | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/drivers/pmdomain/amlogic/meson-ee-pwrc.c b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
-index 0dd71cd814c5..cba216a2175e 100644
---- a/drivers/pmdomain/amlogic/meson-ee-pwrc.c
-+++ b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
-@@ -47,6 +47,8 @@
- 
- #define G12A_HHI_NANOQ_MEM_PD_REG0	(0x43 << 2)
- #define G12A_HHI_NANOQ_MEM_PD_REG1	(0x44 << 2)
-+#define G12A_HHI_ISP_MEM_PD_REG0	(0x45 << 2)
-+#define G12A_HHI_ISP_MEM_PD_REG1	(0x46 << 2)
- 
- struct meson_ee_pwrc;
- struct meson_ee_pwrc_domain;
-@@ -115,6 +117,13 @@ static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = {
- 	.iso_mask = BIT(16) | BIT(17),
- };
- 
-+static struct meson_ee_pwrc_top_domain g12a_pwrc_isp = {
-+	.sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0,
-+	.sleep_mask = BIT(18) | BIT(19),
-+	.iso_reg = GX_AO_RTI_GEN_PWR_ISO0,
-+	.iso_mask = BIT(18) | BIT(19),
-+};
-+
- /* Memory PD Domains */
- 
- #define VPU_MEMPD(__reg)					\
-@@ -231,6 +240,11 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {
- 	{ G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(31, 0) },
- };
- 
-+static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_isp[] = {
-+	{ G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
-+	{ G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
-+};
-+
- #define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks)	\
- 	{								\
- 		.name = __name,						\
-@@ -269,6 +283,8 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
- 	[PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
- 	[PWRC_G12A_NNA_ID] = TOP_PD("NNA", &g12a_pwrc_nna, g12a_pwrc_mem_nna,
- 				    pwrc_ee_is_powered_off),
-+	[PWRC_G12A_ISP_ID] = TOP_PD("ISP", &g12a_pwrc_isp, g12a_pwrc_mem_isp,
-+				    pwrc_ee_is_powered_off),
- };
- 
- static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0039-FROMLIST-v1-arm64-dts-amlogic-minor-whitespace-clean.patch

@@ -1,59 +0,0 @@
-From 97012c291c705261fa0931a2ed1590d5aa1c60b0 Mon Sep 17 00:00:00 2001
-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-Date: Fri, 24 Nov 2023 10:47:00 +0100
-Subject: [PATCH 39/64] FROMLIST(v1): arm64: dts: amlogic: minor whitespace
- cleanup around '='
-
-The DTS code coding style expects exactly one space before and after '='
-sign.
-
-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-Reviewed-by: Viacheslav Bocharov<adeep@lexina.in>
----
- .../boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts    | 2 +-
- arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi        | 2 +-
- arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi            | 2 +-
- 3 files changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts
-index 0062667c4f65..c9e84db0831a 100644
---- a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts
-@@ -30,7 +30,7 @@ &sd_emmc_b {
- &uart_B {
- 	bluetooth {
- 		compatible = "realtek,rtl8822cs-bt";
--		enable-gpios  = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
-+		enable-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
- 		host-wake-gpios = <&gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
- 		device-wake-gpios = <&gpio GPIOZ_6 GPIO_ACTIVE_HIGH>;
- 	};
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
-index 995ce10d5c81..08c33ec7e9f1 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
-@@ -369,7 +369,7 @@ &uart_A {
- 
- 	bluetooth {
- 		compatible = "realtek,rtl8822cs-bt";
--		enable-gpios  = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
-+		enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- 		host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
- 		device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
- 	};
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
-index 0a6a12808568..4b8db872bbf3 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
-@@ -487,7 +487,7 @@ &uart_A {
- 
- 	bluetooth {
- 		compatible = "realtek,rtl8822cs-bt";
--		enable-gpios  = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
-+		enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- 		host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
- 		device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
- 	};
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0039-WIP-dt-bindings-arm-amlogic-add-support-for-Dreambox.patch

@@ -1,7 +1,7 @@
-From ac4472cdd67f2d161991c7a386e6b06115e45bb7 Mon Sep 17 00:00:00 2001
+From 8d6f4eb8a8a7bd35dd10bb4d942b0e3182042ac1 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 5 Apr 2021 13:48:34 +0000
-Subject: [PATCH 49/64] WIP: dt-bindings: arm: amlogic: add support for
+Subject: [PATCH 39/53] WIP: dt-bindings: arm: amlogic: add support for
  Dreambox One/Two
 
 The Dreambox One and Dreambox Two are DVBS/T2 receiver boxes based
@@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 2 insertions(+)
 
 diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
-index 2154a4614fda..112f4c17e219 100644
+index caab7ceeda45..922380d6139e 100644
 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml
 +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
-@@ -176,6 +176,8 @@ properties:
+@@ -175,6 +175,8 @@ properties:
                - azw,gtking
                - azw,gtking-pro
                - bananapi,bpi-m2s

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0040-WIP-arm64-dts-meson-add-initial-device-trees-for-Dre.patch

@@ -1,7 +1,7 @@
-From f8ed5f43c6bc2cfcb5b9d6bb4ebfca2b9bbde896 Mon Sep 17 00:00:00 2001
+From ffbb462ad7261792d8642717b1d17407afe81d94 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 5 Apr 2021 13:51:20 +0000
-Subject: [PATCH 50/64] WIP: arm64: dts: meson: add initial device-trees for
+Subject: [PATCH 40/53] WIP: arm64: dts: meson: add initial device-trees for
  Dreambox One/Two
 
 Dreambox One and Dreambox Two are based on the Amlogic W400 reference

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0041-WIP-arm64-dts-meson-increase-SD-speeds-on-Minix-Neo-.patch

@@ -1,7 +1,7 @@
-From 10eff8ca7236d75c1aecc427675865d17d421e3f Mon Sep 17 00:00:00 2001
+From 2fa9dc2253ed3266db28b0a3ebb5d942427ef7a9 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 1 Jan 2024 06:15:40 +0000
-Subject: [PATCH 55/64] WIP: arm64: dts: meson: increase SD speeds on Minix Neo
+Subject: [PATCH 41/53] WIP: arm64: dts: meson: increase SD speeds on Minix Neo
  U9-H
 
 Lets see what happens/breaks when all the fancy modes are added

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0042-WIP-arm64-dts-meson-fixup-Minix-U9-H-wifi.patch

@@ -1,7 +1,7 @@
-From 2845d329ab30d3d9ef32bc52b46933c9d92da08c Mon Sep 17 00:00:00 2001
+From 6302dc4b0ec1ce8d343ca620f1fc82e8fa5e1dda Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Fri, 5 Jan 2024 03:07:58 +0000
-Subject: [PATCH 64/64] WIP: arm64: dts: meson: fixup Minix U9-H wifi
+Subject: [PATCH 42/53] WIP: arm64: dts: meson: fixup Minix U9-H wifi
 
 I think the 'drop compatible' change conflicted so remove this too.
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0043-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch

@@ -1,7 +1,7 @@
-From 58786177fc62e50be1c7f5dc703db0fa6a751ea7 Mon Sep 17 00:00:00 2001
+From 7354c155f1956487683a192e629cda68bcd38bd8 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Tue, 18 Jan 2022 15:09:12 +0000
-Subject: [PATCH 43/64] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
+Subject: [PATCH 43/53] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
  100MHz
 
 Amlogic datasheets describe 50MHz max-frequency for SDIO on GXL/GXM but
@@ -79,10 +79,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  2 files changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-index 18f7b730289e..417c6c535325 100644
+index 08d6b69ba469..9ac5079019fa 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-@@ -257,7 +257,7 @@ &sd_emmc_a {
+@@ -256,7 +256,7 @@ &sd_emmc_a {
  
  	bus-width = <4>;
  	cap-sd-highspeed;
@@ -92,7 +92,7 @@ index 18f7b730289e..417c6c535325 100644
  	non-removable;
  	disable-wp;
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
-index a150cc0e18ff..b3d7b8613d6d 100644
+index 7e7dc87ede2d..1c64b2d64ae8 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
 @@ -121,7 +121,7 @@ &sd_emmc_a {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0044-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch

@@ -1,7 +1,7 @@
-From 6b18138cdb3af412733e4f77db111d7e72d8d004 Mon Sep 17 00:00:00 2001
+From fb6de4d2453abb6e9ff8f0b653eb12e94156958c Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Wed, 19 Jan 2022 06:45:06 +0000
-Subject: [PATCH 44/64] WIP: arm64: dts: meson: add UHS SDIO capabilities to
+Subject: [PATCH 44/53] WIP: arm64: dts: meson: add UHS SDIO capabilities to
  p212/p23x/q20x
 
 Add UHS capabilities to the SDIO node to enable 100MHz speeds.
@@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  2 files changed, 8 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-index 417c6c535325..59f7b51598b5 100644
+index 9ac5079019fa..e6f88ec58869 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-@@ -257,6 +257,10 @@ &sd_emmc_a {
+@@ -256,6 +256,10 @@ &sd_emmc_a {
  
  	bus-width = <4>;
  	cap-sd-highspeed;
@@ -28,7 +28,7 @@ index 417c6c535325..59f7b51598b5 100644
  
  	non-removable;
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
-index b3d7b8613d6d..6eec4e81592b 100644
+index 1c64b2d64ae8..b83b38b2d9e1 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
 @@ -121,6 +121,10 @@ &sd_emmc_a {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0045-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch

@@ -1,7 +1,7 @@
-From cde2b45ce0d675b4ef40621268cfbdcd738799b5 Mon Sep 17 00:00:00 2001
+From 5661824fa83b4eeb182286aa8ad3b97d1025852c Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Tue, 18 Jan 2022 15:18:32 +0000
-Subject: [PATCH 45/64] WIP: arm64: dts: meson: remove SDIO node from Khadas
+Subject: [PATCH 45/53] WIP: arm64: dts: meson: remove SDIO node from Khadas
  VIM1
 
 Now that SDIO 100MHz max-frequency is inherited from the p212 dtsi we

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0046-WIP-arm64-dts-meson-drop-broadcom-compatible-from-re.patch

@@ -1,25 +1,27 @@
-From f8c00dd2bf6ea3414e65a3fb3be96d3d7c13ae0b Mon Sep 17 00:00:00 2001
+From e77b259c064cd7b8c672c96834fdb1c4d2a98ff4 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Wed, 3 Jan 2024 03:14:06 +0000
-Subject: [PATCH 46/64] WIP: arm64: dts: meson: drop broadcom compatible from
+Subject: [PATCH 46/53] WIP: arm64: dts: meson: drop broadcom compatible from
  reference board SDIO nodes
 
-Removing the Broadcom compatible from the SDIO node allows WiFi modules with QCA9377
-and Realtek WiFi chips to also probe (as SDIO supports discovery) resulting in wider
-compatibility with boards/boxes that follow the Amlogic reference designs.
+Remove the Broadcom compatible to allow Android STB boards using Qualcom QCA9377
+and Realtek RTL8189ES/FS SDIO modules to also have working WiFi when booting with
+the reference board device-tree(s). Also do the same to the Vega S95 dtsi as this
+is commonly used in the same way.
 
 Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
 ---
  arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi      | 3 +--
+ arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi  | 3 +--
  arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts  | 3 +--
  arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts  | 3 +--
  arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 3 +--
  arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts        | 3 +--
  arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts        | 3 +--
- 6 files changed, 6 insertions(+), 12 deletions(-)
+ 7 files changed, 7 insertions(+), 14 deletions(-)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
-index e803a466fe4e..5f24e83925a8 100644
+index 52d57773a77f..1736bd2e96e2 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
 @@ -178,9 +178,8 @@ &sd_emmc_a {
@@ -33,6 +35,21 @@ index e803a466fe4e..5f24e83925a8 100644
  	};
  };
  
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+index 255e93a0b36d..b5e8b1cbafa9 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+@@ -251,9 +251,8 @@ &sd_emmc_a {
+ 	vmmc-supply = <&vddao_3v3>;
+ 	vqmmc-supply = <&vddio_boot>;
+ 
+-	brcmf: wifi@1 {
++	sdio: wifi@1 {
+ 		reg = <1>;
+-		compatible = "brcm,bcm4329-fmac";
+ 	};
+ };
+ 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
 index c1470416faad..7dffeb5931c9 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
@@ -62,7 +79,7 @@ index 92c425d0259c..ff9145d49090 100644
  	};
  };
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
-index 6eec4e81592b..fb967f25cecc 100644
+index b83b38b2d9e1..c74308499786 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
 @@ -138,9 +138,8 @@ &sd_emmc_a {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0047-WIP-arm64-dts-meson-p23x-q20x-fix-usb-init-don-t-for.patch

@@ -1,42 +0,0 @@
-From 3be8ecaac4c22b8cd5d834ed43135a958111bf9b Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Tue, 14 Feb 2023 08:28:00 +0000
-Subject: [PATCH 47/64] WIP: arm64: dts: meson: p23x-q20x: fix usb init - don't
- force otg
-
-Forcing OTG in the p23x-q20x dtsi causes USB problems on multiple boards:
-
-[    1.246056] dwc2 c9100000.usb: supply vusb_d not found, using dummy regulator
-[    1.246442] dwc2 c9100000.usb: supply vusb_a not found, using dummy regulator
-[    1.258386] dwc2 c9100000.usb: dwc2_core_reset: HANG! Soft Reset timeout GRSTCTL_CSFTRST
-[    1.258404] dwc2: probe of c9100000.usb failed with error -16
-
-Using 'peripheral' mode clears the error but still leaves boards without working
-USB ports. Using 'host' mode results in working USB ports:
-
-[    1.760353] dwc2 c9100000.usb: supply vusb_d not found, using dummy regulator
-[    1.760706] dwc2 c9100000.usb: supply vusb_a not found, using dummy regulator
-[    1.761307] dwc2 c9100000.usb: EPs: 7, dedicated fifos, 712 entries in SPRAM
-
-Define 'host' dr_mode as a safer default for all GXL/GXM boards that
-consume the common dtsi.
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-index 59f7b51598b5..b8ffc0e014fb 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-@@ -322,5 +322,5 @@ &uart_AO {
- 
- &usb {
- 	status = "okay";
--	dr_mode = "otg";
-+	dr_mode = "host";
- };
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0047-WIP-dt-bindings-arm-amlogic-add-OSMC-Vero-4K.patch

@@ -1,9 +1,9 @@
-From 62f76cf72b0a8496ae63f68318016e6d65d9fb23 Mon Sep 17 00:00:00 2001
+From 642e23b3f8a96c89390eb0ff05a6e46e63f9a98f Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Sat, 9 Apr 2022 06:27:50 +0000
-Subject: [PATCH 61/64] WIP: dt-bindings: arm: amlogic: add Venz V10
+Date: Wed, 19 Jan 2022 02:40:20 +0000
+Subject: [PATCH 47/53] WIP: dt-bindings: arm: amlogic: add OSMC Vero 4K
 
-Add the Venz V10 (S905L) board.
+Add support for the OSMC Vero 4K
 
 Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
 ---
@@ -11,15 +11,15 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
-index 77e41410a966..adda90bd54e3 100644
+index 922380d6139e..73598f7992fd 100644
 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml
 +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
-@@ -86,6 +86,7 @@ properties:
-           - enum:
-               - amlogic,p261
-               - amlogic,p271
-+              - venz,v10
-           - const: amlogic,s905l
+@@ -99,6 +99,7 @@ properties:
+               - libretech,aml-s905x-cc
+               - libretech,aml-s905x-cc-v2
+               - nexbox,a95x
++              - osmc,vero4k
+           - const: amlogic,s905x
            - const: amlogic,meson-gxl
  
 -- 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0048-WIP-arm64-dts-meson-add-WiFi-BT-support-to-BananaPi-.patch

@@ -1,105 +0,0 @@
-From f9f4b1667c1343b6544e98f80268583a3579458a Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Tue, 7 Mar 2023 13:17:16 +0000
-Subject: [PATCH 48/64] WIP: arm64: dts: meson: add WiFi/BT support to BananaPi
- M5
-
-The BPI-M5 has an optional RTL8822CS WiFi/BT mezzanine board. Describe
-the board but mark the sd_mmc_a and uart_A nodes disabled so they can
-be enabled via overlay or fdtput when the baord is connected.
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- .../dts/amlogic/meson-sm1-bananapi-m5.dts     | 65 +++++++++++++++++++
- 1 file changed, 65 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
-index f045bf851638..90ef1f029ede 100644
---- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
-@@ -25,6 +25,20 @@ cvbs_connector_in: endpoint {
- 		};
- 	};
- 
-+	sdio_pwrseq: sdio-pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
-+		clocks = <&wifi32k>;
-+		clock-names = "ext_clock";
-+	};
-+
-+	wifi32k: wifi32k {
-+		compatible = "pwm-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <32768>;
-+		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
-+	};
-+
- 	sound {
- 		compatible = "amlogic,axg-sound-card";
- 		model = "BPI-M5";
-@@ -172,6 +186,42 @@ &frddr_c {
- 	status = "okay";
- };
- 
-+&pwm_ef {
-+	status = "okay";
-+	pinctrl-0 = <&pwm_e_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+/* SDIO */
-+&sd_emmc_a {
-+	/* enable if WiFi/BT board connected */
-+	status = "disabled";
-+	pinctrl-0 = <&sdio_pins>;
-+	pinctrl-1 = <&sdio_clk_gate_pins>;
-+	pinctrl-names = "default", "clk-gate";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	bus-width = <4>;
-+	sd-uhs-sdr104;
-+	max-frequency = <50000000>;
-+
-+	non-removable;
-+	disable-wp;
-+
-+	/* WiFi firmware requires power in suspend */
-+	keep-power-in-suspend;
-+
-+	mmc-pwrseq = <&sdio_pwrseq>;
-+
-+	vmmc-supply = <&vddao_3v3>;
-+	vqmmc-supply = <&vddao_1v8>;
-+
-+	rtl8822cs: wifi@1 {
-+		reg = <1>;
-+	};
-+};
-+
- &tdmif_b {
- 	status = "okay";
- };
-@@ -219,3 +269,18 @@ &toddr_b {
- &toddr_c {
- 	status = "okay";
- };
-+
-+&uart_A {
-+	/* enable if WiFi/BT board connected */
-+	status = "disabled";
-+	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
-+	pinctrl-names = "default";
-+	uart-has-rtscts;
-+
-+	bluetooth {
-+		compatible = "realtek,rtl8822cs-bt";
-+		enable-gpios  = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
-+		host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
-+		device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
-+	};
-+};
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0048-WIP-arm64-dts-meson-add-support-for-OSMC-Vero-4K.patch

@@ -0,0 +1,259 @@
+From e4062d9479c72b37e7093a424f969829018d5a48 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Wed, 19 Jan 2022 04:06:17 +0000
+Subject: [PATCH 48/53] WIP: arm64: dts: meson: add support for OSMC Vero 4K
+
+The OSMC Vero 4K device is based on the Amlogic S905X (P212) reference
+design with the following specifications:
+
+- 2GB DDR4 RAM
+- 16GB eMMC
+- HDMI 2.1 video
+- S/PDIF optical output
+- AV output
+- 10/100 Ethernet
+- AP6255 Wireless (802.11 a/b/g/n/ac, BT 4.2)
+- 2x USB 2.0 ports (1x OTG)
+- IR receiver (internal)
+- IR extender port (external)
+- 1x micro SD card slot
+- 1x Power LED (red)
+- 1x Reset button (in AV jack)
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/Makefile          |   8 +
+ .../dts/amlogic/meson-gxl-s905x-vero4k.dts    | 202 ++++++++++++++++++
+ 2 files changed, 210 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
+
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index edb22c57f11d..936cd1989463 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -49,6 +49,14 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-phicomm-n1.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-sml5442tw.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-vero4k-plus.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p271.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-hwacom-amazetv.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-khadas-vim.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-libretech-cc.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-libretech-cc-v2.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-vero4k.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-jethome-jethub-j80.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-p281.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-tx3-mini.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
+new file mode 100644
+index 000000000000..a2be35d63c96
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
+@@ -0,0 +1,202 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2024 Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "meson-gxl-s905x-p212.dtsi"
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/sound/meson-aiu.h>
++
++/ {
++	compatible = "osmc,vero4k", "amlogic,s905x", "amlogic,meson-gxl";
++	model = "OSMC Vero 4K";
++
++	reserved-memory {
++		/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
++		secmon_reserved_bl32: secmon@5300000 {
++			reg = <0x0 0x05300000 0x0 0x2000000>;
++			no-map;
++		};
++	};
++
++	gpio-keys-polled {
++		compatible = "gpio-keys-polled";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		poll-interval = <20>;
++
++		button@0 {
++			label = "power";
++			linux,code = <KEY_POWER>;
++			gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led-standby {
++			color = <LED_COLOR_ID_RED>;
++			function = LED_FUNCTION_POWER;
++			gpios = <&gpio GPIODV_24 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++			panic-indicator;
++		};
++	};
++
++	dio2133: analog-amplifier {
++		compatible = "simple-audio-amplifier";
++		sound-name-prefix = "AU2";
++		VCC-supply = <&hdmi_5v>;
++		enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
++	};
++
++	spdif_dit: audio-codec-0 {
++		#sound-dai-cells = <0>;
++		compatible = "linux,spdif-dit";
++		sound-name-prefix = "DIT";
++	};
++
++	cvbs-connector {
++		compatible = "composite-video-connector";
++
++		port {
++			cvbs_connector_in: endpoint {
++				remote-endpoint = <&cvbs_vdac_out>;
++			};
++		};
++	};
++
++	hdmi-connector {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi_connector_in: endpoint {
++				remote-endpoint = <&hdmi_tx_tmds_out>;
++			};
++		};
++	};
++
++	sound {
++		compatible = "amlogic,gx-sound-card";
++		model = "VERO4K";
++		audio-aux-devs = <&dio2133>;
++		audio-widgets = "Line", "Lineout";
++		audio-routing = "AU2 INL", "ACODEC LOLP",
++				"AU2 INR", "ACODEC LORP",
++				"AU2 INL", "ACODEC LOLN",
++				"AU2 INR", "ACODEC LORN",
++				"Lineout", "AU2 OUTL",
++				"Lineout", "AU2 OUTR";
++		assigned-clocks = <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>,
++				  <&clkc CLKID_MPLL2>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
++			dai-format = "i2s";
++			mclk-fs = <256>;
++
++			codec-0 {
++				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
++			};
++
++			codec-1 {
++				sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
++			};
++		};
++
++		dai-link-3 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
++
++			codec-0 {
++				sound-dai = <&spdif_dit>;
++			};
++		};
++
++		dai-link-4 {
++			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
++
++			codec-0 {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++
++		dai-link-5 {
++			sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
++
++			codec-0 {
++				sound-dai = <&acodec>;
++			};
++		};
++	};
++};
++
++&acodec {
++	AVDD-supply = <&vddio_ao18>;
++	status = "okay";
++};
++
++&aiu {
++	status = "okay";
++	pinctrl-0 = <&spdif_out_h_pins>;
++	pinctrl-names = "default";
++};
++
++&cec_AO {
++	status = "okay";
++	pinctrl-0 = <&ao_cec_pins>;
++	pinctrl-names = "default";
++	hdmi-phandle = <&hdmi_tx>;
++};
++
++&cvbs_vdac_port {
++	cvbs_vdac_out: endpoint {
++		remote-endpoint = <&cvbs_connector_in>;
++	};
++};
++
++&ethmac {
++        phy-mode = "rmii";
++        phy-handle = <&internal_phy>;
++};
++
++&hdmi_tx {
++	status = "okay";
++	pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
++	pinctrl-names = "default";
++	hdmi-supply = <&hdmi_5v>;
++};
++
++&hdmi_tx_tmds_port {
++	hdmi_tx_tmds_out: endpoint {
++		remote-endpoint = <&hdmi_connector_in>;
++	};
++};
++
++&internal_phy {
++        pinctrl-0 = <&eth_link_led_pins>, <&eth_act_led_pins>;
++        pinctrl-names = "default";
++};
++
++/* This UART is brought out to the DB9 connector */
++&uart_AO {
++	status = "okay";
++};
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0049-WIP-dt-bindings-arm-amlogic-add-S905L-and-p271-refer.patch

@@ -1,32 +1,29 @@
-From 3c5bbd567ecaafcf4f2294f0eb5ed84c728a24e1 Mon Sep 17 00:00:00 2001
+From 1d5c42d5f84a1b022365b4ae00c3c6325a4b8f16 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 1 Jan 2024 07:13:19 +0000
-Subject: [PATCH 56/64] WIP: dt-bindings: arm: amlogic: add S905L and p261/p271
- boards
+Subject: [PATCH 49/53] WIP: dt-bindings: arm: amlogic: add S905L and p271
+ reference board
 
-Add bindings for the Amlogic S905L SoC and P261/P271 reference design boards. Similar
-to P281/S905W the boards are derived from P212 (S905X) but with silicon differences:
-
-- P271 omits VP9 support and uses Mali 450-MP3
-- P261 omits VP9 support and uses Mali 450-MP2
+Add bindings for the Amlogic S905L SoC and reference design board. S905L is similar
+to P281 (S905W) and derived from P212 (S905X) but with silicon differences to omit
+VP9 codec support and using a Mali 450-MP2 (not MP3).
 
 Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
 ---
- Documentation/devicetree/bindings/arm/amlogic.yaml | 8 ++++++++
- 1 file changed, 8 insertions(+)
+ Documentation/devicetree/bindings/arm/amlogic.yaml | 7 +++++++
+ 1 file changed, 7 insertions(+)
 
 diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
-index 40cb96161f9d..77e41410a966 100644
+index 73598f7992fd..515d58587f7c 100644
 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml
 +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
-@@ -81,6 +81,14 @@ properties:
+@@ -81,6 +81,13 @@ properties:
            - const: amlogic,s805x
            - const: amlogic,meson-gxl
  
 +      - description: Boards with the Amlogic Meson GXL S905L SoC
 +        items:
 +          - enum:
-+              - amlogic,p261
 +              - amlogic,p271
 +          - const: amlogic,s905l
 +          - const: amlogic,meson-gxl

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0050-WIP-soc-amlogic-meson-gx-socinfo-Add-S905L-ID.patch

@@ -1,12 +1,11 @@
-From 884ee605e1eda41440cbac34267e04d5b6d5c741 Mon Sep 17 00:00:00 2001
+From f5ab209b7240f1251e100f9e7919f165bdb26f96 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 1 Jan 2024 07:48:39 +0000
-Subject: [PATCH 57/64] WIP: soc: amlogic: meson-gx-socinfo: Add S905L ID
+Subject: [PATCH 50/53] WIP: soc: amlogic: meson-gx-socinfo: Add S905L ID
 
-Add the S905L SoC id observed in several P261 boards (before/after):
+Add the S905L SoC id observed in several P271 boards:
 
-soc soc0: Amlogic Meson GXLX (Unknown) Revision 26:a (c1:2) Detected
-soc soc0: Amlogic Meson GXLX (S905L) Revision 26:a (c1:2) Detected
+LibreELEC kernel: soc soc0: Amlogic Meson GXLX (S905L) Revision 26:a (c1:2) Detected
 
 Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
 ---
@@ -14,14 +13,14 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/drivers/soc/amlogic/meson-gx-socinfo.c b/drivers/soc/amlogic/meson-gx-socinfo.c
-index 6abb730344ab..30a2e56e981b 100644
+index 6abb730344ab..7e255acf5430 100644
 --- a/drivers/soc/amlogic/meson-gx-socinfo.c
 +++ b/drivers/soc/amlogic/meson-gx-socinfo.c
 @@ -64,6 +64,7 @@ static const struct meson_gx_package_id {
  	{ "962E", 0x24, 0x20, 0xf0 },
  	{ "A113X", 0x25, 0x37, 0xff },
  	{ "A113D", 0x25, 0x22, 0xff },
-+	{ "S905L", 0x26, 0xc1, 0xc0 },
++	{ "S905L", 0x26, 0, 0x0 },
  	{ "S905D2", 0x28, 0x10, 0xf0 },
  	{ "S905Y2", 0x28, 0x30, 0xf0 },
  	{ "S905X2", 0x28, 0x40, 0xf0 },

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0051-WIP-dt-bindings-arm-amlogic-add-support-for-Tanix-TX.patch

@@ -1,28 +0,0 @@
-From 89c283b20308f3e8a3387d0d5427392df01511c8 Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Thu, 9 Feb 2023 09:59:58 +0000
-Subject: [PATCH 51/64] WIP: dt-bindings: arm: amlogic: add support for Tanix
- TX9 Pro
-
-The Oranth Tanix TX9 Pro is an Android STB using the Amlogic S912 chip
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
-index 112f4c17e219..40cb96161f9d 100644
---- a/Documentation/devicetree/bindings/arm/amlogic.yaml
-+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
-@@ -126,6 +126,7 @@ properties:
-               - libretech,aml-s912-pc
-               - minix,neo-u9h
-               - nexbox,a1
-+              - oranth,tx9-pro
-               - tronsmart,vega-s96
-               - videostrong,gxm-kiii-pro
-               - wetek,core2
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0051-WIP-dt-bindings-iio-adc-amlogic-meson-saradc-Add-GXL.patch

@@ -1,12 +1,14 @@
-From fd09fef84e3db5e1b835a17cd95bca16e641390c Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Tue, 2 Jan 2024 12:21:18 +0000
-Subject: [PATCH 58/64] WIP: dt-bindings: iio: adc: amlogic,meson-saradc: add
- meson-saradc-gxlx
+From b2cbf810a3310389b2691797e487396aa1f621da Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Sat, 23 Mar 2024 20:38:59 +0100
+Subject: [PATCH 51/53] WIP: dt-bindings: iio: adc: amlogic,meson-saradc: Add
+ GXLX SoC compatible
 
-Add meson-saradc-gxlx to the list of enums.
+Add a compatible string for the GXLX SoC. It's very similar to GXL but
+has three additional bits in MESON_SAR_ADC_REG12 for the three MPLL
+clocks.
 
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 ---
  .../devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml        | 1 +
  1 file changed, 1 insertion(+)

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0052-WIP-arm64-dts-meson-add-initial-device-tree-for-Tani.patch

@@ -1,139 +0,0 @@
-From d7927812537ff2e8bc44d762923b525f9c4717fc Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Thu, 9 Feb 2023 10:01:14 +0000
-Subject: [PATCH 52/64] WIP: arm64: dts: meson: add initial device-tree for
- Tanix TX9 Pro
-
-Oranth Tanix TX9 Pro is based on the Amlogic Q200 reference design with
-an S912 chip and the following specs:
-
-- 3GB DDR3 RAM
-- 32GB eMMC
-- 10/100/1000 Base-T Ethernet
-- AP6356 Wireless (802.11 b/g/n/ac, BT 5.0)
-- HDMI 2.0a video
-- VFD for clock/status
-- 2x USB 2.0 ports
-- IR receiver
-- 1x Power LED (white)
-- 1x Update/Reset button (underside)
-- 1x micro SD card slot
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- arch/arm64/boot/dts/amlogic/Makefile          |  1 +
- .../boot/dts/amlogic/meson-gxm-tx9-pro.dts    | 90 +++++++++++++++++++
- 2 files changed, 91 insertions(+)
- create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
-
-diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
-index edb22c57f11d..35f760e3c9df 100644
---- a/arch/arm64/boot/dts/amlogic/Makefile
-+++ b/arch/arm64/boot/dts/amlogic/Makefile
-@@ -67,6 +67,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
-+dtb-$(CONFIG_ARCH_MESON) += meson-gxm-tx9-pro.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-s4-s805x2-aq222.dtb
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
-new file mode 100644
-index 000000000000..9a62176cfe5a
---- /dev/null
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
-@@ -0,0 +1,90 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (c) 2016 Endless Computers, Inc.
-+ * Author: Carlo Caione <carlo@endlessm.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "meson-gxm.dtsi"
-+#include "meson-gx-p23x-q20x.dtsi"
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+	compatible = "oranth,tx9-pro", "amlogic,s912", "amlogic,meson-gxm";
-+	model = "Tanix TX9 Pro";
-+
-+	adc-keys {
-+		compatible = "adc-keys";
-+		io-channels = <&saradc 0>;
-+		io-channel-names = "buttons";
-+		keyup-threshold-microvolt = <1710000>;
-+
-+		button-function {
-+			label = "Update";
-+			linux,code = <KEY_VENDOR>;
-+			press-threshold-microvolt = <10000>;
-+		};
-+	};
-+
-+	gpio-keys-polled {
-+		compatible = "gpio-keys-polled";
-+		poll-interval = <100>;
-+
-+		button {
-+			label = "power";
-+			linux,code = <KEY_POWER>;
-+			gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+};
-+
-+&ethmac {
-+	pinctrl-0 = <&eth_pins>;
-+	pinctrl-names = "default";
-+	phy-handle = <&external_phy>;
-+	amlogic,tx-delay-ns = <2>;
-+	phy-mode = "rgmii";
-+};
-+
-+&external_mdio {
-+	external_phy: ethernet-phy@0 {
-+		/* Realtek RTL8211F (0x001cc916) */
-+		reg = <0>;
-+		max-speed = <1000>;
-+
-+		reset-assert-us = <10000>;
-+		reset-deassert-us = <80000>;
-+		reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
-+
-+		interrupt-parent = <&gpio_intc>;
-+		/* MAC_INTR on GPIOZ_15 */
-+		interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
-+	};
-+};
-+
-+&ir {
-+	linux,rc-map-name = "rc-tanix-tx3mini";
-+};
-+
-+&sd_emmc_a {
-+	brcmf: wifi@1 {
-+		reg = <1>;
-+		compatible = "brcm,bcm4329-fmac";
-+	};
-+};
-+
-+&uart_A {
-+	status = "okay";
-+	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
-+	pinctrl-names = "default";
-+	uart-has-rtscts;
-+
-+	bluetooth {
-+		compatible = "brcm,bcm43438-bt";
-+		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
-+		max-speed = <2000000>;
-+		clocks = <&wifi32k>;
-+		clock-names = "lpo";
-+	};
-+};
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0052-WIP-iio-adc-meson-add-support-for-the-GXLX-SoC.patch

@@ -0,0 +1,97 @@
+From a3fe76499d3b186e1b964cc24fe49afc0c12eca7 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Sat, 23 Mar 2024 20:44:41 +0100
+Subject: [PATCH 52/53] WIP: iio: adc: meson: add support for the GXLX SoC
+
+The SARADC IP on the GXLX SoC itself is identical to the one found on
+GXL SoCs. However, GXLX SoCs require poking the first three bits in the
+MESON_SAR_ADC_REG12 register to get the three MPLL clocks (used as clock
+generators for the audio frequencies) to work.
+
+WiP: the purpose of these three bits needs to be clarified
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ drivers/iio/adc/meson_saradc.c | 31 +++++++++++++++++++++++++++++++
+ 1 file changed, 31 insertions(+)
+
+diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
+index 8c1e542c0ab7..6ad1a6f33f7d 100644
+--- a/drivers/iio/adc/meson_saradc.c
++++ b/drivers/iio/adc/meson_saradc.c
+@@ -160,6 +160,11 @@
+ 	#define MESON_SAR_ADC_REG11_EOC				BIT(1)
+ 	#define MESON_SAR_ADC_REG11_VREF_SEL			BIT(0)
+ 
++#define MESON_SAR_ADC_REG12					0x30
++	#define MESON_SAR_ADC_REG12_MPLL0_UNKNOWN		BIT(0)
++	#define MESON_SAR_ADC_REG12_MPLL1_UNKNOWN		BIT(1)
++	#define MESON_SAR_ADC_REG12_MPLL2_UNKNOWN		BIT(2)
++
+ #define MESON_SAR_ADC_REG13					0x34
+ 	#define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK	GENMASK(13, 8)
+ 
+@@ -329,6 +334,7 @@ struct meson_sar_adc_param {
+ 	bool					has_vref_select;
+ 	bool					cmv_select;
+ 	bool					adc_eoc;
++	bool					mpll_clock_bits;
+ 	enum meson_sar_adc_vref_sel		vref_select;
+ 	enum meson_sar_adc_vref_voltage		vref_voltage;
+ };
+@@ -1013,6 +1019,12 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
+ 		regval = priv->param->cmv_select ? MESON_SAR_ADC_REG11_CMV_SEL : 0;
+ 		regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
+ 				   MESON_SAR_ADC_REG11_CMV_SEL, regval);
++
++		if (priv->param->mpll_clock_bits)
++			regmap_write(priv->regmap, MESON_SAR_ADC_REG12,
++				     MESON_SAR_ADC_REG12_MPLL0_UNKNOWN |
++				     MESON_SAR_ADC_REG12_MPLL1_UNKNOWN |
++				     MESON_SAR_ADC_REG12_MPLL2_UNKNOWN);
+ 	}
+ 
+ 	ret = clk_set_parent(priv->adc_sel_clk, priv->clkin);
+@@ -1238,6 +1250,17 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
+ 	.cmv_select = true,
+ };
+ 
++static const struct meson_sar_adc_param meson_sar_adc_gxlx_param = {
++	.has_bl30_integration = true,
++	.clock_rate = 1200000,
++	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
++	.resolution = 12,
++	.disable_ring_counter = 1,
++	.vref_voltage = VREF_VOLTAGE_1V8,
++	.cmv_select = true,
++	.mpll_clock_bits = true,
++};
++
+ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
+ 	.has_bl30_integration = true,
+ 	.clock_rate = 1200000,
+@@ -1287,6 +1310,11 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
+ 	.name = "meson-gxl-saradc",
+ };
+ 
++static const struct meson_sar_adc_data meson_sar_adc_gxlx_data = {
++	.param = &meson_sar_adc_gxlx_param,
++	.name = "meson-gxlx-saradc",
++};
++
+ static const struct meson_sar_adc_data meson_sar_adc_gxm_data = {
+ 	.param = &meson_sar_adc_gxl_param,
+ 	.name = "meson-gxm-saradc",
+@@ -1318,6 +1346,9 @@ static const struct of_device_id meson_sar_adc_of_match[] = {
+ 	}, {
+ 		.compatible = "amlogic,meson-gxl-saradc",
+ 		.data = &meson_sar_adc_gxl_data,
++	}, {
++		.compatible = "amlogic,meson-gxlx-saradc",
++		.data = &meson_sar_adc_gxlx_data,
+ 	}, {
+ 		.compatible = "amlogic,meson-gxm-saradc",
+ 		.data = &meson_sar_adc_gxm_data,
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0053-WIP-arm64-dts-meson-add-7-segment-display-to-Tanix-T.patch

@@ -1,93 +0,0 @@
-From c25019a4df4553853883bdeba2cd3f0ffaea8a5d Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Thu, 9 Feb 2023 10:11:39 +0000
-Subject: [PATCH 53/64] WIP: arm64: dts: meson: add 7-segment display to Tanix
- TX9 Pro
-
-Add support for the 7-segment VFD display of the device
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- .../boot/dts/amlogic/meson-gxm-tx9-pro.dts    | 59 +++++++++++++++++++
- 1 file changed, 59 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
-index 9a62176cfe5a..2dcff00794b9 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
-@@ -9,6 +9,7 @@
- #include "meson-gxm.dtsi"
- #include "meson-gx-p23x-q20x.dtsi"
- #include <dt-bindings/input/input.h>
-+#include <dt-bindings/leds/common.h>
- 
- / {
- 	compatible = "oranth,tx9-pro", "amlogic,s912", "amlogic,meson-gxm";
-@@ -37,6 +38,64 @@ button {
- 			gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- 		};
- 	};
-+
-+	spi {
-+		compatible = "spi-gpio";
-+		sck-gpios = <&gpio GPIODV_27  GPIO_ACTIVE_HIGH>;
-+		mosi-gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>;
-+		cs-gpios = <&gpio GPIODV_4 GPIO_ACTIVE_LOW>;
-+		num-chipselects = <1>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		tm1628: led-controller@0 {
-+			compatible = "titanmec,tm1628";
-+			reg = <0>;
-+			spi-3wire;
-+			spi-lsb-first;
-+			spi-rx-delay-us = <1>;
-+			spi-max-frequency = <500000>;
-+			#address-cells = <2>;
-+			#size-cells = <0>;
-+
-+			titanmec,segment-mapping = /bits/ 8 <4 5 6 1 2 3 7>;
-+			titanmec,grid = /bits/ 8 <4 3 2 1>;
-+
-+			alarm@5,1 {
-+				reg = <5 1>;
-+				function = LED_FUNCTION_ALARM;
-+			};
-+
-+			usb@5,2 {
-+				reg = <5 2>;
-+				function = LED_FUNCTION_USB;
-+			};
-+			play@5,3 {
-+				reg = <5 3>;
-+				function = "play";
-+			};
-+
-+			pause@5,4 {
-+				reg = <5 4>;
-+				function = "pause";
-+			};
-+
-+			colon@5,5 {
-+				reg = <5 5>;
-+				function = "colon";
-+			};
-+
-+			lan@5,6 {
-+				reg = <5 6>;
-+				function = LED_FUNCTION_LAN;
-+			};
-+
-+			wlan@5,7 {
-+				reg = <5 7>;
-+				function = LED_FUNCTION_WLAN;
-+			};
-+		};
-+	};
- };
- 
- &ethmac {
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0053-WIP-arm64-dts-meson-add-p271-support.patch

@@ -0,0 +1,73 @@
+From 75671e34bec14c140e4e81ae742de16b2a29d174 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Mon, 1 Jan 2024 07:40:15 +0000
+Subject: [PATCH 53/53] WIP: arm64: dts: meson: add p271 support
+
+Add a device-tree for the Amlogic P271 (S905L) reference design board. This is
+similar to the P212 (S905X) but with silicon differences to omit the VP9 codec
+and use Mali 450-MP2 not MP3. The SoC is marked with S905L and a "2" (believed
+to denote the MP2) and is sometimes wrongly described on some distributor stock
+lists (and box vendor marketing) as an S905L2 chip.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../boot/dts/amlogic/meson-gxl-s905l-p271.dts | 47 +++++++++++++++++++
+ 1 file changed, 47 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts
+new file mode 100644
+index 000000000000..a902e4af7c15
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts
+@@ -0,0 +1,47 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2024 Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "meson-gxl-s905x.dtsi"
++#include "meson-gx-p23x-q20x.dtsi"
++
++/ {
++	compatible = "amlogic,p271", "amlogic,s905l", "amlogic,meson-gxl";
++	model = "Amlogic Meson GXLX (S905L) P271 Development Board";
++
++	memory@0 {
++		device_type = "memory";
++		reg = <0x0 0x0 0x0 0x40000000>;
++	};
++
++	sound {
++		model = "P271";
++	};
++};
++
++&apb {
++	mali: gpu@c0000 {
++		/* Mali 450-MP2 */
++		interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
++		interrupt-names = "gp", "gpmmu", "pp", "pmu",
++			"pp0", "ppmmu0", "pp1", "ppmmu1";
++	};
++};
++
++&saradc {
++	compatible = "amlogic,meson-gxlx-saradc", "amlogic,meson-saradc";
++};
++
++&usb {
++	dr_mode = "host";
++};
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0054-WIP-arm64-dts-meson-add-support-for-odroidc2-hifishi.patch

@@ -1,467 +0,0 @@
-From 8a909c5fd193cd2750954a0ec174a95a8bb5a279 Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Wed, 13 Dec 2023 05:35:46 +0000
-Subject: [PATCH 54/64] WIP: arm64: dts: meson: add support for
- odroidc2-hifishield
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- arch/arm64/boot/dts/amlogic/Makefile          |   3 +
- .../meson-gxbb-odroidc2-hifishield.dts        | 434 ++++++++++++++++++
- 2 files changed, 437 insertions(+)
- create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts
-
-diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
-index 35f760e3c9df..33a8430a33b8 100644
---- a/arch/arm64/boot/dts/amlogic/Makefile
-+++ b/arch/arm64/boot/dts/amlogic/Makefile
-@@ -83,3 +83,6 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air-gbit.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb
-+
-+# place experimental dtb/dtbo below here:
-+dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield.dtb
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts
-new file mode 100644
-index 000000000000..466d3d112b38
---- /dev/null
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts
-@@ -0,0 +1,434 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (c) 2016 Andreas Färber
-+ * Copyright (c) 2016 BayLibre, Inc.
-+ * Author: Kevin Hilman <khilman@kernel.org>
-+ */
-+
-+/dts-v1/;
-+
-+#include "meson-gxbb.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/sound/meson-aiu.h>
-+
-+/ {
-+	compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
-+	model = "Hardkernel ODROID-C2";
-+
-+	aliases {
-+		serial0 = &uart_AO;
-+		ethernet0 = &ethmac;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	memory@0 {
-+		device_type = "memory";
-+		reg = <0x0 0x0 0x0 0x80000000>;
-+	};
-+
-+	spdif_dit: audio-codec-0 {
-+		#sound-dai-cells = <0>;
-+		compatible = "linux,spdif-dit";
-+		status = "okay";
-+		sound-name-prefix = "DIT";
-+	};
-+
-+	usb_otg_pwr: regulator-usb-pwrs {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "USB_OTG_PWR";
-+
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+
-+		/*
-+		 * signal name from schematics: PWREN
-+		 */
-+		gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		/*
-+		 * signal name from schematics: USB_POWER
-+		 */
-+		vin-supply = <&p5v0>;
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		led-blue {
-+			label = "c2:blue:alive";
-+			gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "heartbeat";
-+			default-state = "off";
-+		};
-+	};
-+
-+	p5v0: regulator-p5v0 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "P5V0";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-always-on;
-+	};
-+
-+	hdmi_p5v0: regulator-hdmi_p5v0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "HDMI_P5V0";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		/* AP2331SA-7 */
-+		vin-supply = <&p5v0>;
-+	};
-+
-+	tflash_vdd: regulator-tflash_vdd {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "TFLASH_VDD";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		/*
-+		 * signal name from schematics: TFLASH_VDD_EN
-+		 */
-+		gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		/* U16 RT9179GB */
-+		vin-supply = <&vddio_ao3v3>;
-+	};
-+
-+	tf_io: gpio-regulator-tf_io {
-+		compatible = "regulator-gpio";
-+
-+		regulator-name = "TF_IO";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		/*
-+		 * signal name from schematics: TF_3V3N_1V8_EN
-+		 */
-+		gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
-+		gpios-states = <0>;
-+
-+		states = <3300000 0>,
-+			 <1800000 1>;
-+		/* U12/U13 RT9179GB */
-+		vin-supply = <&vddio_ao3v3>;
-+	};
-+
-+	vcc1v8: regulator-vcc1v8 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VCC1V8";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-always-on;
-+		/* U18 RT9179GB */
-+		vin-supply = <&vddio_ao3v3>;
-+	};
-+
-+	vcc3v3: regulator-vcc3v3 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VCC3V3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	vddio_ao1v8: regulator-vddio-ao1v8 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VDDIO_AO1V8";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-always-on;
-+		/* U17 RT9179GB */
-+		vin-supply = <&p5v0>;
-+	};
-+
-+	vddio_ao3v3: regulator-vddio-ao3v3 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VDDIO_AO3V3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+		/* U11 MP2161GJ-C499 */
-+		vin-supply = <&p5v0>;
-+	};
-+
-+	ddr3_1v5: regulator-ddr3_1v5 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "DDR3_1V5";
-+		regulator-min-microvolt = <1500000>;
-+		regulator-max-microvolt = <1500000>;
-+		regulator-always-on;
-+		/* U15 MP2161GJ-C499 */
-+		vin-supply = <&p5v0>;
-+	};
-+
-+	emmc_pwrseq: emmc-pwrseq {
-+		compatible = "mmc-pwrseq-emmc";
-+		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
-+	};
-+
-+	hdmi-connector {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_connector_in: endpoint {
-+				remote-endpoint = <&hdmi_tx_tmds_out>;
-+			};
-+		};
-+	};
-+
-+	sound {
-+		compatible = "amlogic,gx-sound-card";
-+		model = "ODROID-C2";
-+		assigned-clocks = <&clkc CLKID_MPLL0>,
-+				  <&clkc CLKID_MPLL1>,
-+				  <&clkc CLKID_MPLL2>;
-+		assigned-clock-parents = <0>, <0>, <0>;
-+		assigned-clock-rates = <294912000>,
-+				       <270950400>,
-+				       <393216000>;
-+
-+		dai-link-0 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
-+		};
-+
-+		dai-link-1 {
-+			sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
-+		};
-+
-+		dai-link-2 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
-+			dai-format = "i2s";
-+			mclk-fs = <256>;
-+
-+			codec-0 {
-+				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
-+			};
-+		};
-+
-+		dai-link-3 {
-+			sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
-+
-+			codec-0 {
-+				sound-dai = <&spdif_dit>;
-+			};
-+		};
-+
-+		dai-link-4 {
-+			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-+
-+			codec-0 {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
-+};
-+
-+&aiu {
-+	status = "okay";
-+	pinctrl-0 = <&spdif_out_ao_6_pins &i2s_am_clk_pins &i2s_out_ao_clk_pins &i2s_out_lr_clk_pins &i2s_out_ch01_ao_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&cec_AO {
-+	status = "okay";
-+	pinctrl-0 = <&ao_cec_pins>;
-+	pinctrl-names = "default";
-+	hdmi-phandle = <&hdmi_tx>;
-+};
-+
-+&ethmac {
-+	status = "okay";
-+	pinctrl-0 = <&eth_rgmii_pins>;
-+	pinctrl-names = "default";
-+	phy-handle = <&eth_phy0>;
-+	phy-mode = "rgmii";
-+
-+	amlogic,tx-delay-ns = <2>;
-+
-+	mdio {
-+		compatible = "snps,dwmac-mdio";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		eth_phy0: ethernet-phy@0 {
-+			/* Realtek RTL8211F (0x001cc916) */
-+			reg = <0>;
-+
-+			reset-assert-us = <10000>;
-+			reset-deassert-us = <80000>;
-+			reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
-+
-+			interrupt-parent = <&gpio_intc>;
-+			/* MAC_INTR on GPIOZ_15 */
-+			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
-+		};
-+	};
-+};
-+
-+&hdmi_tx {
-+	status = "okay";
-+	pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
-+	pinctrl-names = "default";
-+	hdmi-supply = <&hdmi_p5v0>;
-+};
-+
-+&hdmi_tx_tmds_port {
-+	hdmi_tx_tmds_out: endpoint {
-+		remote-endpoint = <&hdmi_connector_in>;
-+	};
-+};
-+
-+&i2c_A {
-+	status = "okay";
-+	pinctrl-0 = <&i2c_a_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&ir {
-+	status = "okay";
-+	pinctrl-0 = <&remote_input_ao_pins>;
-+	pinctrl-names = "default";
-+	linux,rc-map-name = "rc-odroid";
-+};
-+
-+&gpio_ao {
-+	gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
-+			  "USB HUB nRESET", "USB OTG Power En",
-+			  "SPDIF_OUTPUT", "IR In", "I2S_MCLK",
-+			  "I2S_SCLK", "I2S_LRCLK", "I2S_DATA_OUTPUT",
-+			  "HDMI CEC", "SYS LED",
-+			  /* GPIO_TEST_N */
-+			  "";
-+};
-+
-+&gpio {
-+	gpio-line-names = /* Bank GPIOZ */
-+			  "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
-+			  "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
-+			  "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
-+			  "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
-+			  "Eth PHY nRESET", "Eth PHY Intc",
-+			  /* Bank GPIOH */
-+			  "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "",
-+			  /* Bank BOOT */
-+			  "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
-+			  "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
-+			  "eMMC Reset", "eMMC CMD",
-+			  "", "", "", "", "", "", "",
-+			  /* Bank CARD */
-+			  "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
-+			  "SDCard D3", "SDCard D2", "SDCard Det",
-+			  /* Bank GPIODV */
-+			  "", "", "", "", "", "", "", "", "", "", "", "", "",
-+			  "", "", "", "", "", "", "", "", "", "", "",
-+			  "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
-+			  "PWM D", "PWM B",
-+			  /* Bank GPIOY */
-+			  "Revision Bit0", "Revision Bit1", "",
-+			  "J2 Header Pin35", "", "", "", "J2 Header Pin36",
-+			  "J2 Header Pin31", "", "", "", "TF VDD En",
-+			  "J2 Header Pin32", "J2 Header Pin26", "", "",
-+			  /* Bank GPIOX */
-+			  "J2 Header Pin29", "J2 Header Pin24",
-+			  "J2 Header Pin23", "J2 Header Pin22",
-+			  "J2 Header Pin21", "J2 Header Pin18",
-+			  "J2 Header Pin33", "J2 Header Pin19",
-+			  "J2 Header Pin16", "J2 Header Pin15",
-+			  "J2 Header Pin12", "J2 Header Pin13",
-+			  "J2 Header Pin8", "J2 Header Pin10",
-+			  "", "", "", "", "",
-+			  "J2 Header Pin11", "", "J2 Header Pin7", "",
-+			  /* Bank GPIOCLK */
-+			  "", "", "", "";
-+};
-+
-+&saradc {
-+	status = "okay";
-+	vref-supply = <&vcc1v8>;
-+};
-+
-+&scpi_clocks {
-+	status = "disabled";
-+};
-+
-+/* SD */
-+&sd_emmc_b {
-+	status = "okay";
-+	pinctrl-0 = <&sdcard_pins>;
-+	pinctrl-1 = <&sdcard_clk_gate_pins>;
-+	pinctrl-names = "default", "clk-gate";
-+
-+	bus-width = <4>;
-+	cap-sd-highspeed;
-+	sd-uhs-sdr12;
-+	sd-uhs-sdr25;
-+	sd-uhs-sdr50;
-+	sd-uhs-ddr50;
-+	max-frequency = <100000000>;
-+	disable-wp;
-+
-+	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-+
-+	vmmc-supply = <&tflash_vdd>;
-+	vqmmc-supply = <&tf_io>;
-+};
-+
-+/* eMMC */
-+&sd_emmc_c {
-+	status = "okay";
-+	pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
-+	pinctrl-1 = <&emmc_clk_gate_pins>;
-+	pinctrl-names = "default", "clk-gate";
-+
-+	bus-width = <8>;
-+	max-frequency = <200000000>;
-+	non-removable;
-+	disable-wp;
-+	cap-mmc-highspeed;
-+	mmc-ddr-1_8v;
-+	mmc-hs200-1_8v;
-+
-+	mmc-pwrseq = <&emmc_pwrseq>;
-+	vmmc-supply = <&vcc3v3>;
-+	vqmmc-supply = <&vcc1v8>;
-+};
-+
-+&uart_AO {
-+	status = "okay";
-+	pinctrl-0 = <&uart_ao_a_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&usb0_phy {
-+	status = "disabled";
-+	phy-supply = <&usb_otg_pwr>;
-+};
-+
-+&usb1_phy {
-+	status = "okay";
-+	phy-supply = <&usb_otg_pwr>;
-+};
-+
-+&usb0 {
-+	status = "disabled";
-+};
-+
-+&usb1 {
-+	dr_mode = "host";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+	status = "okay";
-+
-+	hub@1 {
-+		/* Genesys Logic GL852G USB 2.0 hub */
-+		compatible = "usb5e3,610";
-+		reg = <1>;
-+		vdd-supply = <&p5v0>;
-+		reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
-+	};
-+};
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0059-WIP-iio-adc-meson-add-meson-saradc-gxlx.patch

@@ -1,86 +0,0 @@
-From 3c895b6a1fcb03cbb6f13349e8a8e71ecb24246f Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Tue, 2 Jan 2024 11:40:54 +0000
-Subject: [PATCH 59/64] WIP: iio: adc: meson: add meson-saradc-gxlx
-
-Add support for meson-saradc-gxlx derived from meson-saradc-gxl but with an additional
-magic register defined (MESON_SAR_ADC_REG12) which is needed for audio to work on GXLX
-boards. The magic value was obtained from the vendor kernel [0].
-
-[0] https://github.com/khadas/linux/commit/d1d98f2ed8c83eb42af8880ed8e206aa402dd70a
-
-Suggested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- drivers/iio/adc/meson_saradc.c | 27 +++++++++++++++++++++++++++
- 1 file changed, 27 insertions(+)
-
-diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
-index 13b473d8c6c7..a43e7b917a30 100644
---- a/drivers/iio/adc/meson_saradc.c
-+++ b/drivers/iio/adc/meson_saradc.c
-@@ -323,6 +323,7 @@ struct meson_sar_adc_param {
- 	unsigned int				temperature_divider;
- 	u8					disable_ring_counter;
- 	bool					has_reg11;
-+	bool					has_reg12;
- 	bool					has_vref_select;
- 	u8					vref_select;
- 	u8					cmv_select;
-@@ -1241,6 +1242,19 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
- 	.cmv_select = 1,
- };
- 
-+static const struct meson_sar_adc_param meson_sar_adc_gxlx_param = {
-+	.has_bl30_integration = true,
-+	.clock_rate = 1200000,
-+	.bandgap_reg = MESON_SAR_ADC_REG11,
-+	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
-+	.resolution = 12,
-+	.disable_ring_counter = 1,
-+	.has_reg11 = true,
-+	.has_reg12 = true,
-+	.vref_volatge = 1,
-+	.cmv_select = 1,
-+};
-+
- static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
- 	.has_bl30_integration = true,
- 	.clock_rate = 1200000,
-@@ -1293,6 +1307,11 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
- 	.name = "meson-gxl-saradc",
- };
- 
-+static const struct meson_sar_adc_data meson_sar_adc_gxlx_data = {
-+	.param = &meson_sar_adc_gxlx_param,
-+	.name = "meson-gxlx-saradc",
-+};
-+
- static const struct meson_sar_adc_data meson_sar_adc_gxm_data = {
- 	.param = &meson_sar_adc_gxl_param,
- 	.name = "meson-gxm-saradc",
-@@ -1324,6 +1343,9 @@ static const struct of_device_id meson_sar_adc_of_match[] = {
- 	}, {
- 		.compatible = "amlogic,meson-gxl-saradc",
- 		.data = &meson_sar_adc_gxl_data,
-+	}, {
-+		.compatible = "amlogic,meson-gxlx-saradc",
-+		.data = &meson_sar_adc_gxl_data,
- 	}, {
- 		.compatible = "amlogic,meson-gxm-saradc",
- 		.data = &meson_sar_adc_gxm_data,
-@@ -1447,6 +1469,11 @@ static int meson_sar_adc_probe(struct platform_device *pdev)
- 		goto err_hw;
- 	}
- 
-+	if (priv->param->has_reg12) {
-+	        /* MESON_SAR_ADC_REG12 poke for audio on GXLX */
-+		regmap_write(priv->regmap, 0x30, 0x3);
-+	}
-+
- 	return 0;
- 
- err_hw:
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0060-WIP-arm64-dts-meson-add-p261-p271-support.patch

@@ -1,129 +0,0 @@
-From 4ecc1452c707369da8582a118b31bc6d7453c8ea Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Mon, 1 Jan 2024 07:40:15 +0000
-Subject: [PATCH 60/64] WIP: arm64: dts: meson: add p261/p271 support
-
-Add device-trees for Amlogic P261/P271 (S905L) reference design boards. Similar to the
-P281 (S905W) the boards are derived from P212 (S905X) but with silicon differences:
-
-- P271 omits VP9 support and uses Mali 450-MP3
-- P261 omits VP9 support and uses Mali 450-MP2
-
-P271 boards have an S905L SoC with "B-3" or "3" marking. P261 boards have an S905L SoC
-with "B-2" or "2" marking. The B is believed to denote a chip with DTS license and the
-number is believed to reference the Mali 450 core(s) spec. The MP2 variant is referred
-to as "S905C" in some Amlogic marketing presos and vendor code, and "S905L2" on chip
-distributor stock lists.
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- arch/arm64/boot/dts/amlogic/Makefile          |  2 +
- .../boot/dts/amlogic/meson-gxl-s905l-p261.dts | 47 +++++++++++++++++++
- .../boot/dts/amlogic/meson-gxl-s905l-p271.dts | 31 ++++++++++++
- 3 files changed, 80 insertions(+)
- create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p261.dts
- create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts
-
-diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
-index 33a8430a33b8..b2f07ba0b342 100644
---- a/arch/arm64/boot/dts/amlogic/Makefile
-+++ b/arch/arm64/boot/dts/amlogic/Makefile
-@@ -86,3 +86,5 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb
- 
- # place experimental dtb/dtbo below here:
- dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield.dtb
-+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p261.dtb
-+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p271.dtb
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p261.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p261.dts
-new file mode 100644
-index 000000000000..b10a10277e0b
---- /dev/null
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p261.dts
-@@ -0,0 +1,47 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (c) 2024 Christian Hewitt <christianshewitt@gmail.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "meson-gxl-s905x.dtsi"
-+#include "meson-gx-p23x-q20x.dtsi"
-+
-+/ {
-+	compatible = "amlogic,p261", "amlogic,s905l", "amlogic,meson-gxl";
-+	model = "Amlogic Meson GXLX (S905L) P261 Development Board";
-+
-+	memory@0 {
-+		device_type = "memory";
-+		reg = <0x0 0x0 0x0 0x40000000>;
-+	};
-+
-+	sound {
-+		model = "P261";
-+	};
-+};
-+
-+&apb {
-+	mali: gpu@c0000 {
-+		/* Mali 450-MP2 */
-+		interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-+		interrupt-names = "gp", "gpmmu", "pp", "pmu",
-+			"pp0", "ppmmu0", "pp1", "ppmmu1";
-+	};
-+};
-+
-+&saradc {
-+	compatible = "amlogic,meson-gxlx-saradc", "amlogic,meson-saradc";
-+};
-+
-+&usb {
-+	dr_mode = "host";
-+};
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts
-new file mode 100644
-index 000000000000..91dac8fc0951
---- /dev/null
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts
-@@ -0,0 +1,31 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (c) 2024 Christian Hewitt <christianshewitt@gmail.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "meson-gxl-s905x.dtsi"
-+#include "meson-gx-p23x-q20x.dtsi"
-+
-+/ {
-+	compatible = "amlogic,p271", "amlogic,s905l", "amlogic,meson-gxl";
-+	model = "Amlogic Meson GXLX (S905L) P271 Development Board";
-+
-+	memory@0 {
-+		device_type = "memory";
-+		reg = <0x0 0x0 0x0 0x40000000>;
-+	};
-+
-+	sound {
-+		model = "P271";
-+	};
-+};
-+
-+&saradc {
-+	compatible = "amlogic,meson-gxlx-saradc", "amlogic,meson-saradc";
-+};
-+
-+&usb {
-+	dr_mode = "host";
-+};
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0062-WIP-media-rc-add-keymap-for-Venz-V10-remote.patch

@@ -1,154 +0,0 @@
-From 6d36a3f7a18eeb746c6e73f1c18a18a30ffc627e Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Sun, 10 Apr 2022 11:51:38 +0000
-Subject: [PATCH 62/64] WIP: media: rc: add keymap for Venz V10 remote
-
-Add a keymap and bindings for the IR (NEC) remote used with
-the Venz V10 Android STB device.
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- .../devicetree/bindings/media/rc.yaml         |  1 +
- drivers/media/rc/keymaps/Makefile             |  1 +
- drivers/media/rc/keymaps/rc-venz-v10.c        | 92 +++++++++++++++++++
- include/media/rc-map.h                        |  1 +
- 4 files changed, 95 insertions(+)
- create mode 100644 drivers/media/rc/keymaps/rc-venz-v10.c
-
-diff --git a/Documentation/devicetree/bindings/media/rc.yaml b/Documentation/devicetree/bindings/media/rc.yaml
-index 7bbe580c80f7..1cb227e38d28 100644
---- a/Documentation/devicetree/bindings/media/rc.yaml
-+++ b/Documentation/devicetree/bindings/media/rc.yaml
-@@ -151,6 +151,7 @@ properties:
-       - rc-videomate-tv-pvr
-       - rc-videostrong-kii-pro
-       - rc-vega-s9x
-+      - rc-venz-v10
-       - rc-wetek-hub
-       - rc-wetek-play2
-       - rc-winfast
-diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
-index f19558fdab0c..436999e6053a 100644
---- a/drivers/media/rc/keymaps/Makefile
-+++ b/drivers/media/rc/keymaps/Makefile
-@@ -127,6 +127,7 @@ obj-$(CONFIG_RC_MAP) += \
- 			rc-twinhan1027.o \
- 			rc-twinhan-dtv-cab-ci.o \
- 			rc-vega-s9x.o \
-+			rc-venz-v10.o \
- 			rc-videomate-m1f.o \
- 			rc-videomate-s350.o \
- 			rc-videomate-tv-pvr.o \
-diff --git a/drivers/media/rc/keymaps/rc-venz-v10.c b/drivers/media/rc/keymaps/rc-venz-v10.c
-new file mode 100644
-index 000000000000..f0a99a31a1d7
---- /dev/null
-+++ b/drivers/media/rc/keymaps/rc-venz-v10.c
-@@ -0,0 +1,92 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+//
-+// Copyright (C) 2022 Christian Hewitt <christianshewitt@gmail.com>
-+
-+#include <media/rc-map.h>
-+#include <linux/module.h>
-+
-+//
-+// Keytable for the Venz V10 remote control
-+//
-+
-+static struct rc_map_table venz_v10[] = {
-+	{ 0x847912, KEY_POWER },
-+	{ 0x847903, KEY_MUTE },
-+
-+	{ 0x847921, KEY_EPG },
-+	{ 0x847922, KEY_ZOOMIN },
-+	{ 0x847923, KEY_ZOOMOUT },
-+	{ 0x847924, KEY_SCREEN }, // LAUNCHER
-+
-+	// UP
-+	// DOWN
-+	// LEFT
-+	// RIGHT
-+
-+	{ 0x847904, KEY_FAVORITES }, // TV-SYS
-+	{ 0x84790a, KEY_INFO }, // RATIO
-+	{ 0x84791f, KEY_LANGUAGE }, // TRACK
-+	{ 0x84791e, KEY_SUBTITLE }, // SUB-T
-+
-+	{ 0x847929, KEY_RED },
-+	{ 0x847930, KEY_GREEN },
-+	{ 0x847931, KEY_YELLOW },
-+	{ 0x847932, KEY_BLUE },
-+
-+	{ 0x847906, KEY_HOME },
-+	{ 0x84791b, KEY_CONFIG },
-+
-+	{ 0x847905, KEY_UP },
-+	{ 0x847907, KEY_LEFT },
-+	{ 0x847908, KEY_OK },
-+	{ 0x847909, KEY_RIGHT },
-+	{ 0x847900, KEY_DOWN },
-+
-+	{ 0x847920, KEY_CONTEXT_MENU },
-+	{ 0x84791a, KEY_BACK },
-+
-+	{ 0x847910, KEY_VOLUMEUP },
-+	{ 0x84790f, KEY_VOLUMEDOWN },
-+	{ 0x847919, KEY_PLAYPAUSE },
-+	{ 0x84791c, KEY_STOP },
-+	{ 0x84791d, KEY_PREVIOUS },
-+	{ 0x847928, KEY_NEXT },
-+
-+	{ 0x84790b, KEY_1 },
-+	{ 0x84790c, KEY_2 },
-+	{ 0x84790d, KEY_3 },
-+	{ 0x84790e, KEY_4 },
-+	{ 0x847911, KEY_5 },
-+	{ 0x847927, KEY_6 },
-+	{ 0x847913, KEY_7 },
-+	{ 0x847914, KEY_8 },
-+	{ 0x847915, KEY_9 },
-+	{ 0x847916, KEY_MENU }, // MOUSE
-+	{ 0x847917, KEY_0 },
-+	{ 0x847918, KEY_DELETE },
-+};
-+
-+static struct rc_map_list venz_v10_map = {
-+	.map = {
-+		.scan     = venz_v10,
-+		.size     = ARRAY_SIZE(venz_v10),
-+		.rc_proto = RC_PROTO_NEC,
-+		.name     = RC_MAP_VENZ_V10,
-+	}
-+};
-+
-+static int __init init_rc_map_venz_v10(void)
-+{
-+	return rc_map_register(&venz_v10_map);
-+}
-+
-+static void __exit exit_rc_map_venz_v10(void)
-+{
-+	rc_map_unregister(&venz_v10_map);
-+}
-+
-+module_init(init_rc_map_venz_v10)
-+module_exit(exit_rc_map_venz_v10)
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Christian Hewitt <christianshewitt@gmail.com");
-diff --git a/include/media/rc-map.h b/include/media/rc-map.h
-index 4676545ffd8f..d4624e8232f1 100644
---- a/include/media/rc-map.h
-+++ b/include/media/rc-map.h
-@@ -333,6 +333,7 @@ struct rc_map *rc_map_get(const char *name);
- #define RC_MAP_TT_1500                   "rc-tt-1500"
- #define RC_MAP_TWINHAN_DTV_CAB_CI        "rc-twinhan-dtv-cab-ci"
- #define RC_MAP_TWINHAN_VP1027_DVBS       "rc-twinhan1027"
-+#define RC_MAP_VENZ_V10                  "rc-venz-v10"
- #define RC_MAP_VEGA_S9X                  "rc-vega-s9x"
- #define RC_MAP_VIDEOMATE_K100            "rc-videomate-k100"
- #define RC_MAP_VIDEOMATE_S350            "rc-videomate-s350"
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0063-WIP-arm64-dts-meson-add-support-for-Venz-V10.patch

@@ -1,369 +0,0 @@
-From c55a7293d186c476de1d6245ae9804500157c4e8 Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Sat, 9 Apr 2022 06:21:58 +0000
-Subject: [PATCH 63/64] WIP: arm64: dts: meson: add support for Venz V10
-
-The Venz V10 is an Android STB based on the Amlogic P271 (GXLX)
-reference design with an S905L chip and the following specs:
-
-- 1GB DDR3 RAM
-- 8GB eMMC
-- 10/100 Base-T Ethernet
-- RTL8189ES Wireless (802.11 b/g/n)
-- HDMI 2.0b video
-- 1x 3.5mm AV jack
-- 2x USB 2.0 port
-- IR receiver
-- 1x Update/Reset button (underside)
-- 1x micro SD card slot
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- arch/arm64/boot/dts/amlogic/Makefile          |   1 +
- .../dts/amlogic/meson-gxl-s905l-venz-v10.dts  | 325 ++++++++++++++++++
- 2 files changed, 326 insertions(+)
- create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905l-venz-v10.dts
-
-diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
-index b2f07ba0b342..a288f7c3c52a 100644
---- a/arch/arm64/boot/dts/amlogic/Makefile
-+++ b/arch/arm64/boot/dts/amlogic/Makefile
-@@ -88,3 +88,4 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p261.dtb
- dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p271.dtb
-+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-venz-v10.dtb
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-venz-v10.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-venz-v10.dts
-new file mode 100644
-index 000000000000..30e799e608bb
---- /dev/null
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-venz-v10.dts
-@@ -0,0 +1,325 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (c) 2016 Endless Computers, Inc.
-+ * Author: Carlo Caione <carlo@endlessm.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "meson-gxl-s905x.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/leds/common.h>
-+#include <dt-bindings/sound/meson-aiu.h>
-+
-+/ {
-+	compatible = "venz,v10", "amlogic,s905l", "amlogic,meson-gxl";
-+	model = "Venz V10";
-+
-+	aliases {
-+		serial0 = &uart_AO;
-+		ethernet0 = &ethmac;
-+		wlan0 = &rtl8189;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	memory@0 {
-+		device_type = "memory";
-+		reg = <0x0 0x0 0x0 0x80000000>;
-+	};
-+
-+	dio2133: analog-amplifier {
-+		compatible = "simple-audio-amplifier";
-+		sound-name-prefix = "AU2";
-+		VCC-supply = <&hdmi_5v>;
-+		enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led-standby {
-+			color = <LED_COLOR_ID_BLUE>;
-+			function = LED_FUNCTION_POWER;
-+			gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
-+			default-state = "on";
-+                };
-+        };
-+
-+	cvbs-connector {
-+		compatible = "composite-video-connector";
-+
-+		port {
-+			cvbs_connector_in: endpoint {
-+				remote-endpoint = <&cvbs_vdac_out>;
-+			};
-+		};
-+	};
-+
-+	hdmi-connector {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_connector_in: endpoint {
-+				remote-endpoint = <&hdmi_tx_tmds_out>;
-+			};
-+		};
-+	};
-+
-+	hdmi_5v: regulator-hdmi-5v {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "HDMI_5V";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+
-+		gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	vddio_boot: regulator-vddio_boot {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VDDIO_BOOT";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+	};
-+
-+	vddao_3v3: regulator-vddao_3v3 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VDDAO_3V3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	vddio_ao18: regulator-vddio_ao18 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VDDIO_AO18";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+	};
-+
-+	vcc_3v3: regulator-vcc_3v3 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "VCC_3V3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	emmc_pwrseq: emmc-pwrseq {
-+		compatible = "mmc-pwrseq-emmc";
-+		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
-+	};
-+
-+	wifi32k: wifi32k {
-+		compatible = "pwm-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <32768>;
-+		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
-+	};
-+
-+	sdio_pwrseq: sdio-pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
-+		clocks = <&wifi32k>;
-+		clock-names = "ext_clock";
-+	};
-+
-+	sound {
-+		compatible = "amlogic,gx-sound-card";
-+		model = "VENZ-V10";
-+		audio-aux-devs = <&dio2133>;
-+		audio-widgets = "Line", "Lineout";
-+		audio-routing = "AU2 INL", "ACODEC LOLN",
-+				"AU2 INR", "ACODEC LORN",
-+				"Lineout", "AU2 OUTL",
-+				"Lineout", "AU2 OUTR";
-+		assigned-clocks = <&clkc CLKID_MPLL0>,
-+				  <&clkc CLKID_MPLL1>,
-+				  <&clkc CLKID_MPLL2>;
-+		assigned-clock-parents = <0>, <0>, <0>;
-+		assigned-clock-rates = <294912000>,
-+				       <270950400>,
-+				       <393216000>;
-+
-+		dai-link-0 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
-+		};
-+
-+		dai-link-1 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
-+			dai-format = "i2s";
-+			mclk-fs = <256>;
-+
-+			codec-0 {
-+				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
-+			};
-+
-+			codec-1 {
-+				sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
-+			};
-+		};
-+
-+		dai-link-2 {
-+			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-+
-+			codec-0 {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+
-+		dai-link-3 {
-+			sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-+
-+			codec-0 {
-+				sound-dai = <&acodec>;
-+			};
-+		};
-+	};
-+};
-+
-+&acodec {
-+	AVDD-supply = <&vddio_ao18>;
-+	status = "okay";
-+};
-+
-+&aiu {
-+	status = "okay";
-+};
-+
-+&cec_AO {
-+	status = "okay";
-+	pinctrl-0 = <&ao_cec_pins>;
-+	pinctrl-names = "default";
-+	hdmi-phandle = <&hdmi_tx>;
-+};
-+
-+&cvbs_vdac_port {
-+	cvbs_vdac_out: endpoint {
-+		remote-endpoint = <&cvbs_connector_in>;
-+	};
-+};
-+
-+&ethmac {
-+	status = "okay";
-+};
-+
-+&hdmi_tx {
-+	status = "okay";
-+	pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
-+	pinctrl-names = "default";
-+	hdmi-supply = <&hdmi_5v>;
-+};
-+
-+&hdmi_tx_tmds_port {
-+	hdmi_tx_tmds_out: endpoint {
-+		remote-endpoint = <&hdmi_connector_in>;
-+	};
-+};
-+
-+&ir {
-+	status = "okay";
-+	pinctrl-0 = <&remote_input_ao_pins>;
-+	pinctrl-names = "default";
-+	linux,rc-map-name = "rc-venz-v10";
-+};
-+
-+&pwm_ef {
-+	status = "okay";
-+	pinctrl-0 = <&pwm_e_pins>;
-+	pinctrl-names = "default";
-+	clocks = <&clkc CLKID_FCLK_DIV4>;
-+	clock-names = "clkin0";
-+};
-+
-+&saradc {
-+	status = "okay";
-+	vref-supply = <&vddio_ao18>;
-+};
-+
-+/* Wireless SDIO Module */
-+&sd_emmc_a {
-+	status = "okay";
-+	pinctrl-0 = <&sdio_pins>;
-+	pinctrl-1 = <&sdio_clk_gate_pins>;
-+	pinctrl-names = "default", "clk-gate";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	bus-width = <4>;
-+	cap-sd-highspeed;
-+	max-frequency = <100000000>;
-+
-+	non-removable;
-+	disable-wp;
-+
-+	/* WiFi firmware requires power to be kept while in suspend */
-+	keep-power-in-suspend;
-+
-+	mmc-pwrseq = <&sdio_pwrseq>;
-+
-+	vmmc-supply = <&vddao_3v3>;
-+	vqmmc-supply = <&vddio_boot>;
-+
-+	rtl8189: wifi@1 {
-+		reg = <1>;
-+	};
-+};
-+
-+/* SD card */
-+&sd_emmc_b {
-+	status = "okay";
-+	pinctrl-0 = <&sdcard_pins>;
-+	pinctrl-1 = <&sdcard_clk_gate_pins>;
-+	pinctrl-names = "default", "clk-gate";
-+
-+	bus-width = <4>;
-+	cap-sd-highspeed;
-+	max-frequency = <50000000>;
-+	disable-wp;
-+
-+	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-+
-+	vmmc-supply = <&vddao_3v3>;
-+	vqmmc-supply = <&vddio_boot>;
-+};
-+
-+/* eMMC */
-+&sd_emmc_c {
-+	status = "okay";
-+	pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
-+	pinctrl-1 = <&emmc_clk_gate_pins>;
-+	pinctrl-names = "default", "clk-gate";
-+
-+	bus-width = <8>;
-+	cap-mmc-highspeed;
-+	max-frequency = <200000000>;
-+	non-removable;
-+	disable-wp;
-+	mmc-ddr-1_8v;
-+	mmc-hs200-1_8v;
-+
-+	mmc-pwrseq = <&emmc_pwrseq>;
-+	vmmc-supply = <&vcc_3v3>;
-+	vqmmc-supply = <&vddio_boot>;
-+};
-+
-+/* This UART is brought out to the DB9 connector */
-+&uart_AO {
-+	status = "okay";
-+	pinctrl-0 = <&uart_ao_a_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&usb {
-+	status = "okay";
-+	dr_mode = "host";
-+};
-+
-+&usb2_phy0 {
-+	/* HDMI_5V is the supply for the USB VBUS */
-+	phy-supply = <&hdmi_5v>;
-+};
--- 
-2.34.1
-

projects/Amlogic/linux/linux.aarch64.conf

@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm64 6.7.5 Kernel Configuration
+# Linux/arm64 6.8.0 Kernel Configuration
 #
 CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-13.2.0 (GCC) 13.2.0"
 CONFIG_CC_IS_GCC=y
@@ -15,6 +15,7 @@ CONFIG_CC_CAN_LINK=y
 CONFIG_CC_CAN_LINK_STATIC=y
 CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
 CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y
+CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y
 CONFIG_CC_HAS_ASM_INLINE=y
 CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
 CONFIG_PAHOLE_VERSION=0
@@ -151,8 +152,10 @@ CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
 CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y
 CONFIG_CC_HAS_INT128=y
 CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
-CONFIG_GCC11_NO_ARRAY_BOUNDS=y
+CONFIG_GCC10_NO_ARRAY_BOUNDS=y
 CONFIG_CC_NO_ARRAY_BOUNDS=y
+CONFIG_GCC_NO_STRINGOP_OVERFLOW=y
+CONFIG_CC_NO_STRINGOP_OVERFLOW=y
 CONFIG_ARCH_SUPPORTS_INT128=y
 CONFIG_CGROUPS=y
 CONFIG_PAGE_COUNTER=y
@@ -233,17 +236,17 @@ CONFIG_AIO=y
 CONFIG_IO_URING=y
 CONFIG_ADVISE_SYSCALLS=y
 CONFIG_MEMBARRIER=y
+CONFIG_KCMP=y
+CONFIG_RSEQ=y
+# CONFIG_DEBUG_RSEQ is not set
+CONFIG_CACHESTAT_SYSCALL=y
+# CONFIG_PC104 is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_SELFTEST is not set
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_BASE_RELATIVE=y
 CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
-CONFIG_KCMP=y
-CONFIG_RSEQ=y
-CONFIG_CACHESTAT_SYSCALL=y
-# CONFIG_DEBUG_RSEQ is not set
 CONFIG_HAVE_PERF_EVENTS=y
-# CONFIG_PC104 is not set
 
 #
 # Kernel Performance Events And Counters
@@ -696,6 +699,7 @@ CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
 CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y
 CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y
+CONFIG_ARCH_HAS_HW_PTE_YOUNG=y
 
 #
 # GCOV-based kernel profiling
@@ -738,6 +742,7 @@ CONFIG_BLK_DEV_BSG_COMMON=y
 CONFIG_BLK_DEV_BSGLIB=y
 CONFIG_BLK_DEV_INTEGRITY=y
 CONFIG_BLK_DEV_INTEGRITY_T10=y
+CONFIG_BLK_DEV_WRITE_MOUNTED=y
 # CONFIG_BLK_DEV_ZONED is not set
 CONFIG_BLK_DEV_THROTTLING=y
 # CONFIG_BLK_DEV_THROTTLING_LOW is not set
@@ -824,9 +829,8 @@ CONFIG_SWAP=y
 # CONFIG_ZSWAP is not set
 
 #
-# SLAB allocator options
+# Slab allocator options
 #
-# CONFIG_SLAB_DEPRECATED is not set
 CONFIG_SLUB=y
 # CONFIG_SLUB_TINY is not set
 CONFIG_SLAB_MERGE_DEFAULT=y
@@ -835,7 +839,7 @@ CONFIG_SLAB_MERGE_DEFAULT=y
 # CONFIG_SLUB_STATS is not set
 CONFIG_SLUB_CPU_PARTIAL=y
 # CONFIG_RANDOM_KMALLOC_CACHES is not set
-# end of SLAB allocator options
+# end of Slab allocator options
 
 # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
 # CONFIG_COMPAT_BRK is not set
@@ -869,6 +873,7 @@ CONFIG_ARCH_WANTS_THP_SWAP=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
 # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
+# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set
 CONFIG_THP_SWAP=y
 # CONFIG_READ_ONLY_THP_FOR_FS is not set
 CONFIG_CMA=y
@@ -899,6 +904,7 @@ CONFIG_SECRETMEM=y
 CONFIG_LRU_GEN=y
 # CONFIG_LRU_GEN_ENABLED is not set
 # CONFIG_LRU_GEN_STATS is not set
+CONFIG_LRU_GEN_WALKS_MMU=y
 CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y
 CONFIG_PER_VMA_LOCK=y
 CONFIG_LOCK_MM_AND_FIND_VMA=y
@@ -1203,7 +1209,6 @@ CONFIG_IP6_NF_NAT=m
 CONFIG_NF_DEFRAG_IPV6=m
 # CONFIG_NF_CONNTRACK_BRIDGE is not set
 # CONFIG_BRIDGE_NF_EBTABLES is not set
-# CONFIG_BPFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
 # CONFIG_RDS is not set
@@ -1469,7 +1474,6 @@ CONFIG_VGA_ARB_MAX_GPUS=16
 # Cadence-based PCIe controllers
 #
 # CONFIG_PCIE_CADENCE_PLAT_HOST is not set
-# CONFIG_PCI_J721E_HOST is not set
 # end of Cadence-based PCIe controllers
 
 #
@@ -1534,6 +1538,7 @@ CONFIG_WANT_DEV_COREDUMP=y
 # CONFIG_DEBUG_DEVRES is not set
 # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
 # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
+CONFIG_GENERIC_CPU_DEVICES=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
 CONFIG_GENERIC_CPU_VULNERABILITIES=y
 CONFIG_SOC_BUS=y
@@ -1575,7 +1580,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y
 # end of ARM System Control and Management Interface Protocol
 
 CONFIG_ARM_SCPI_PROTOCOL=y
-CONFIG_ARM_SCPI_POWER_DOMAIN=y
 # CONFIG_FIRMWARE_MEMMAP is not set
 # CONFIG_FW_CFG_SYSFS is not set
 # CONFIG_ARM_FFA_TRANSPORT is not set
@@ -2014,7 +2018,7 @@ CONFIG_WIREGUARD=m
 CONFIG_MACVLAN=m
 # CONFIG_MACVTAP is not set
 # CONFIG_IPVLAN is not set
-# CONFIG_VXLAN is not set
+CONFIG_VXLAN=m
 # CONFIG_GENEVE is not set
 # CONFIG_BAREUDP is not set
 # CONFIG_GTP is not set
@@ -2180,6 +2184,7 @@ CONFIG_SMSC_PHY=y
 # CONFIG_DP83867_PHY is not set
 # CONFIG_DP83869_PHY is not set
 # CONFIG_DP83TD510_PHY is not set
+# CONFIG_DP83TG720_PHY is not set
 # CONFIG_VITESSE_PHY is not set
 # CONFIG_XILINX_GMII2RGMII is not set
 # CONFIG_MICREL_KS8995MA is not set
@@ -2314,7 +2319,6 @@ CONFIG_WCN36XX=m
 # CONFIG_ATH11K is not set
 # CONFIG_ATH12K is not set
 CONFIG_WLAN_VENDOR_ATMEL=y
-# CONFIG_ATMEL is not set
 # CONFIG_AT76C50X_USB is not set
 CONFIG_WLAN_VENDOR_BROADCOM=y
 CONFIG_B43=m
@@ -2345,8 +2349,6 @@ CONFIG_BRCMFMAC_SDIO=y
 # CONFIG_BRCMFMAC_PCIE is not set
 # CONFIG_BRCM_TRACING is not set
 CONFIG_BRCMDBG=y
-CONFIG_WLAN_VENDOR_CISCO=y
-# CONFIG_AIRO is not set
 CONFIG_WLAN_VENDOR_INTEL=y
 # CONFIG_IPW2100 is not set
 # CONFIG_IPW2200 is not set
@@ -2354,8 +2356,6 @@ CONFIG_WLAN_VENDOR_INTEL=y
 # CONFIG_IWL3945 is not set
 # CONFIG_IWLWIFI is not set
 CONFIG_WLAN_VENDOR_INTERSIL=y
-# CONFIG_HOSTAP is not set
-# CONFIG_HERMES is not set
 CONFIG_P54_COMMON=m
 CONFIG_P54_USB=m
 # CONFIG_P54_PCI is not set
@@ -2475,11 +2475,9 @@ CONFIG_WLAN_VENDOR_RSI=y
 # CONFIG_WLAN_VENDOR_ST is not set
 # CONFIG_WLAN_VENDOR_TI is not set
 CONFIG_WLAN_VENDOR_ZYDAS=y
-CONFIG_USB_ZD1201=m
 CONFIG_ZD1211RW=m
 # CONFIG_ZD1211RW_DEBUG is not set
 # CONFIG_WLAN_VENDOR_QUANTENNA is not set
-CONFIG_USB_NET_RNDIS_WLAN=m
 # CONFIG_MAC80211_HWSIM is not set
 # CONFIG_VIRT_WIFI is not set
 # CONFIG_WAN is not set
@@ -2593,6 +2591,7 @@ CONFIG_JOYSTICK_PSXPAD_SPI_FF=y
 # CONFIG_JOYSTICK_QWIIC is not set
 # CONFIG_JOYSTICK_FSIA6B is not set
 # CONFIG_JOYSTICK_SENSEHAT is not set
+# CONFIG_JOYSTICK_SEESAW is not set
 # CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
 CONFIG_INPUT_MISC=y
@@ -3151,6 +3150,7 @@ CONFIG_SENSORS_ARM_SCPI=y
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_F75375S is not set
 # CONFIG_SENSORS_FTSTEUTATES is not set
+# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_G760A is not set
@@ -3282,6 +3282,7 @@ CONFIG_SENSORS_PWM_FAN=m
 CONFIG_THERMAL=y
 # CONFIG_THERMAL_NETLINK is not set
 # CONFIG_THERMAL_STATISTICS is not set
+# CONFIG_THERMAL_DEBUGFS is not set
 CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
 CONFIG_THERMAL_HWMON=y
 CONFIG_THERMAL_OF=y
@@ -3499,6 +3500,7 @@ CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
 # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_NETLINK_EVENTS is not set
 # CONFIG_REGULATOR_88PG86X is not set
 # CONFIG_REGULATOR_ACT8865 is not set
 # CONFIG_REGULATOR_AD5398 is not set
@@ -3933,6 +3935,12 @@ CONFIG_MEDIA_ATTACH=y
 CONFIG_VIDEO_IR_I2C=m
 # CONFIG_VIDEO_CAMERA_SENSOR is not set
 
+#
+# Camera ISPs
+#
+# CONFIG_VIDEO_THP7312 is not set
+# end of Camera ISPs
+
 #
 # Lens drivers
 #
@@ -4002,6 +4010,7 @@ CONFIG_VIDEO_SAA711X=m
 # CONFIG_VIDEO_TVP5150 is not set
 # CONFIG_VIDEO_TVP7002 is not set
 # CONFIG_VIDEO_TW2804 is not set
+# CONFIG_VIDEO_TW9900 is not set
 # CONFIG_VIDEO_TW9903 is not set
 # CONFIG_VIDEO_TW9906 is not set
 # CONFIG_VIDEO_TW9910 is not set
@@ -4082,7 +4091,7 @@ CONFIG_MEDIA_TUNER_FC0012=m
 CONFIG_MEDIA_TUNER_FC0013=m
 CONFIG_MEDIA_TUNER_FC2580=m
 CONFIG_MEDIA_TUNER_IT913X=m
-# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+CONFIG_MEDIA_TUNER_M88RS6000T=m
 CONFIG_MEDIA_TUNER_MAX2165=m
 CONFIG_MEDIA_TUNER_MC44S803=y
 # CONFIG_MEDIA_TUNER_MSI001 is not set
@@ -4339,6 +4348,7 @@ CONFIG_DRM_SCHED=y
 # CONFIG_DRM_RADEON is not set
 # CONFIG_DRM_AMDGPU is not set
 # CONFIG_DRM_NOUVEAU is not set
+# CONFIG_DRM_XE is not set
 # CONFIG_DRM_VGEM is not set
 # CONFIG_DRM_VKMS is not set
 # CONFIG_DRM_VMWGFX is not set
@@ -4369,6 +4379,7 @@ CONFIG_DRM_PANEL=y
 # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set
 # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
 # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set
+# CONFIG_DRM_PANEL_ILITEK_ILI9805 is not set
 # CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
 # CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set
 # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set
@@ -4424,6 +4435,7 @@ CONFIG_DRM_PANEL=y
 # CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set
 # CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set
 # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
+# CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set
 # CONFIG_DRM_PANEL_SONY_ACX565AKM is not set
 # CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set
 # CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521 is not set
@@ -4491,7 +4503,6 @@ CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
 CONFIG_DRM_DW_MIPI_DSI=y
 # end of Display Interface Bridges
 
-# CONFIG_DRM_LOONGSON is not set
 CONFIG_DRM_ETNAVIV=y
 CONFIG_DRM_ETNAVIV_THERMAL=y
 # CONFIG_DRM_HISI_HIBMC is not set
@@ -4521,7 +4532,7 @@ CONFIG_DRM_PANFROST=m
 # CONFIG_DRM_TIDSS is not set
 # CONFIG_DRM_GUD is not set
 # CONFIG_DRM_SSD130X is not set
-# CONFIG_DRM_LEGACY is not set
+# CONFIG_DRM_POWERVR is not set
 CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
 
 #
@@ -4530,7 +4541,6 @@ CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
 CONFIG_FB=y
 # CONFIG_FB_CIRRUS is not set
 # CONFIG_FB_PM2 is not set
-# CONFIG_FB_ARMCLCD is not set
 # CONFIG_FB_CYBER2000 is not set
 # CONFIG_FB_ASILIANT is not set
 # CONFIG_FB_IMSTT is not set
@@ -4575,7 +4585,7 @@ CONFIG_FB_SYS_FILLRECT=y
 CONFIG_FB_SYS_COPYAREA=y
 CONFIG_FB_SYS_IMAGEBLIT=y
 # CONFIG_FB_FOREIGN_ENDIAN is not set
-CONFIG_FB_SYS_FOPS=y
+CONFIG_FB_SYSMEM_FOPS=y
 CONFIG_FB_DEFERRED_IO=y
 CONFIG_FB_DMAMEM_HELPERS=y
 CONFIG_FB_IOMEM_FOPS=y
@@ -4600,6 +4610,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_BACKLIGHT_LM3630A is not set
 # CONFIG_BACKLIGHT_LM3639 is not set
 # CONFIG_BACKLIGHT_LP855X is not set
+# CONFIG_BACKLIGHT_MP3309C is not set
 CONFIG_BACKLIGHT_GPIO=y
 # CONFIG_BACKLIGHT_LV5207LP is not set
 # CONFIG_BACKLIGHT_BD6107 is not set
@@ -5070,6 +5081,7 @@ CONFIG_HID_XINMO=y
 CONFIG_HID_ZYDACRON=y
 # CONFIG_HID_SENSOR_HUB is not set
 # CONFIG_HID_ALPS is not set
+# CONFIG_HID_MCP2200 is not set
 # CONFIG_HID_MCP2221 is not set
 # end of Special HID drivers
 
@@ -5372,6 +5384,7 @@ CONFIG_TYPEC_UCSI=m
 # CONFIG_TYPEC_MUX_PI3USB30532 is not set
 # CONFIG_TYPEC_MUX_NB7VPQ904M is not set
 # CONFIG_TYPEC_MUX_PTN36502 is not set
+# CONFIG_TYPEC_MUX_WCD939X_USBSS is not set
 # end of USB Type-C Multiplexer/DeMultiplexer Switch support
 
 #
@@ -5544,6 +5557,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_DS1672 is not set
 CONFIG_RTC_DRV_HYM8563=m
 # CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_MAX31335 is not set
 # CONFIG_RTC_DRV_NCT3018Y is not set
 # CONFIG_RTC_DRV_RS5C372 is not set
 # CONFIG_RTC_DRV_ISL1208 is not set
@@ -5715,6 +5729,10 @@ CONFIG_STAGING_MEDIA=y
 # CONFIG_DVB_AV7110 is not set
 # CONFIG_VIDEO_MAX96712 is not set
 CONFIG_VIDEO_MESON_VDEC=m
+
+#
+# StarFive media platform drivers
+#
 # CONFIG_STAGING_MEDIA_DEPRECATED is not set
 # CONFIG_STAGING_BOARD is not set
 # CONFIG_LTE_GDM724X is not set
@@ -5771,7 +5789,6 @@ CONFIG_COMMON_CLK_MESON_PHASE=y
 CONFIG_COMMON_CLK_MESON_PLL=y
 CONFIG_COMMON_CLK_MESON_SCLK_DIV=y
 CONFIG_COMMON_CLK_MESON_VID_PLL_DIV=y
-CONFIG_COMMON_CLK_MESON_VCLK=y
 CONFIG_COMMON_CLK_MESON_CLKC_UTILS=y
 CONFIG_COMMON_CLK_MESON_AO_CLKC=y
 CONFIG_COMMON_CLK_MESON_EE_CLKC=y
@@ -5916,6 +5933,8 @@ CONFIG_MESON_EE_PM_DOMAINS=y
 CONFIG_MESON_SECURE_PM_DOMAINS=y
 # end of Amlogic PM Domains
 
+CONFIG_ARM_SCPI_POWER_DOMAIN=y
+
 #
 # Broadcom PM Domains
 #
@@ -6030,6 +6049,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 #
 # CONFIG_AD4130 is not set
 # CONFIG_AD7091R5 is not set
+# CONFIG_AD7091R8 is not set
 # CONFIG_AD7124 is not set
 # CONFIG_AD7192 is not set
 # CONFIG_AD7266 is not set
@@ -6067,6 +6087,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 # CONFIG_MAX11410 is not set
 # CONFIG_MAX1241 is not set
 # CONFIG_MAX1363 is not set
+# CONFIG_MAX34408 is not set
 # CONFIG_MAX9611 is not set
 # CONFIG_MCP320X is not set
 # CONFIG_MCP3422 is not set
@@ -6132,6 +6153,7 @@ CONFIG_MESON_SARADC=y
 #
 # Chemical Sensors
 #
+# CONFIG_AOSONG_AGS02MA is not set
 # CONFIG_ATLAS_PH_SENSOR is not set
 # CONFIG_ATLAS_EZO_SENSOR is not set
 # CONFIG_BME680 is not set
@@ -6201,6 +6223,7 @@ CONFIG_MESON_SARADC=y
 # CONFIG_MAX5821 is not set
 # CONFIG_MCP4725 is not set
 # CONFIG_MCP4728 is not set
+# CONFIG_MCP4821 is not set
 # CONFIG_MCP4922 is not set
 # CONFIG_TI_DAC082S085 is not set
 # CONFIG_TI_DAC5571 is not set
@@ -6280,6 +6303,7 @@ CONFIG_MESON_SARADC=y
 # CONFIG_DHT11 is not set
 # CONFIG_HDC100X is not set
 # CONFIG_HDC2010 is not set
+# CONFIG_HDC3020 is not set
 # CONFIG_HTS221 is not set
 # CONFIG_HTU21 is not set
 # CONFIG_SI7005 is not set
@@ -6295,6 +6319,8 @@ CONFIG_MESON_SARADC=y
 # CONFIG_ADIS16480 is not set
 # CONFIG_BMI160_I2C is not set
 # CONFIG_BMI160_SPI is not set
+# CONFIG_BMI323_I2C is not set
+# CONFIG_BMI323_SPI is not set
 # CONFIG_BOSCH_BNO055_SERIAL is not set
 # CONFIG_BOSCH_BNO055_I2C is not set
 # CONFIG_FXOS8700_I2C is not set
@@ -6330,10 +6356,12 @@ CONFIG_MESON_SARADC=y
 # CONFIG_SENSORS_ISL29018 is not set
 # CONFIG_SENSORS_ISL29028 is not set
 # CONFIG_ISL29125 is not set
+# CONFIG_ISL76682 is not set
 # CONFIG_JSA1212 is not set
 # CONFIG_ROHM_BU27008 is not set
 # CONFIG_ROHM_BU27034 is not set
 # CONFIG_RPR0521 is not set
+# CONFIG_LTR390 is not set
 # CONFIG_LTR501 is not set
 # CONFIG_LTRF216A is not set
 # CONFIG_LV0104CS is not set
@@ -6359,6 +6387,7 @@ CONFIG_MESON_SARADC=y
 # CONFIG_VCNL4035 is not set
 # CONFIG_VEML6030 is not set
 # CONFIG_VEML6070 is not set
+# CONFIG_VEML6075 is not set
 # CONFIG_VL6180 is not set
 # CONFIG_ZOPT2201 is not set
 # end of Light sensors
@@ -6437,6 +6466,7 @@ CONFIG_MESON_SARADC=y
 # CONFIG_DLHL60D is not set
 # CONFIG_DPS310 is not set
 # CONFIG_HP03 is not set
+# CONFIG_HSC030PA is not set
 # CONFIG_ICP10100 is not set
 # CONFIG_MPL115_I2C is not set
 # CONFIG_MPL115_SPI is not set
@@ -6490,6 +6520,7 @@ CONFIG_MESON_SARADC=y
 # CONFIG_MAXIM_THERMOCOUPLE is not set
 # CONFIG_MLX90614 is not set
 # CONFIG_MLX90632 is not set
+# CONFIG_MLX90635 is not set
 # CONFIG_TMP006 is not set
 # CONFIG_TMP007 is not set
 # CONFIG_TMP117 is not set
@@ -6498,6 +6529,7 @@ CONFIG_MESON_SARADC=y
 # CONFIG_MAX30208 is not set
 # CONFIG_MAX31856 is not set
 # CONFIG_MAX31865 is not set
+# CONFIG_MCP9600 is not set
 # end of Temperature sensors
 
 # CONFIG_NTB is not set
@@ -6586,6 +6618,7 @@ CONFIG_PHY_MESON_AXG_MIPI_DPHY=y
 # CONFIG_ARM_SPE_PMU is not set
 # CONFIG_HISI_PCIE_PMU is not set
 # CONFIG_HNS3_PMU is not set
+# CONFIG_DWC_PCIE_PMU is not set
 # CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set
 # CONFIG_MESON_DDR_PMU is not set
 # end of Performance monitor support
@@ -6603,6 +6636,7 @@ CONFIG_RAS=y
 # CONFIG_DAX is not set
 CONFIG_NVMEM=y
 CONFIG_NVMEM_SYSFS=y
+CONFIG_NVMEM_LAYOUTS=y
 
 #
 # Layout Types
@@ -6658,6 +6692,7 @@ CONFIG_PM_OPP=y
 CONFIG_DCACHE_WORD_ACCESS=y
 CONFIG_VALIDATE_FS_PARSER=y
 CONFIG_FS_IOMAP=y
+CONFIG_FS_STACK=y
 CONFIG_BUFFER_HEAD=y
 CONFIG_LEGACY_DIRECT_IO=y
 # CONFIG_EXT2_FS is not set
@@ -7063,14 +7098,12 @@ CONFIG_CRYPTO_SM4=y
 # CONFIG_CRYPTO_ARC4 is not set
 CONFIG_CRYPTO_CHACHA20=y
 CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_CFB=m
 CONFIG_CRYPTO_CTR=y
 CONFIG_CRYPTO_CTS=m
 CONFIG_CRYPTO_ECB=y
 # CONFIG_CRYPTO_HCTR2 is not set
 # CONFIG_CRYPTO_KEYWRAP is not set
 # CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_OFB is not set
 # CONFIG_CRYPTO_PCBC is not set
 # CONFIG_CRYPTO_XTS is not set
 CONFIG_CRYPTO_NHPOLY1305=y
@@ -7203,6 +7236,7 @@ CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set
 # CONFIG_CRYPTO_DEV_QAT_C62X is not set
 # CONFIG_CRYPTO_DEV_QAT_4XXX is not set
+# CONFIG_CRYPTO_DEV_QAT_420XX is not set
 # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set
 # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set
 # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set
@@ -7372,6 +7406,7 @@ CONFIG_FONT_8x16=y
 CONFIG_SG_POOL=y
 CONFIG_ARCH_STACKWALK=y
 CONFIG_STACKDEPOT=y
+CONFIG_STACKDEPOT_MAX_FRAMES=64
 CONFIG_SBITMAP=y
 # CONFIG_LWQ_TEST is not set
 # end of Library routines
@@ -7405,7 +7440,7 @@ CONFIG_DEBUG_MISC=y
 #
 # Compile-time checks and compiler options
 #
-CONFIG_AS_HAS_NON_CONST_LEB128=y
+CONFIG_AS_HAS_NON_CONST_ULEB128=y
 CONFIG_DEBUG_INFO_NONE=y
 # CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set
 # CONFIG_DEBUG_INFO_DWARF4 is not set

projects/Amlogic/patches/ffmpeg/ffmpeg-0001-vf_bwdif-Add-capability-to-deinterlace-NV12.patch

@@ -0,0 +1,62 @@
+From 162a9ac64b7babb4e831df86f6ed0efdfe84204e Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Fri, 12 Jan 2024 15:17:43 +0000
+Subject: [PATCH 01/14] vf_bwdif: Add capability to deinterlace NV12
+
+As bwdif takes no account of horizontally adjacent pixels the same
+code can be used on planes that have multiple components as is used
+on single component planes. Update the filtering code to cope with
+multi-component planes and add NV12 to the list of supported formats.
+
+Signed-off-by: John Cox <jc@kynesim.co.uk>
+---
+ libavfilter/vf_bwdif.c | 16 +++++++++++++---
+ 1 file changed, 13 insertions(+), 3 deletions(-)
+
+diff --git a/libavfilter/vf_bwdif.c b/libavfilter/vf_bwdif.c
+index 9847d38b6a..4d69b3039d 100644
+--- a/libavfilter/vf_bwdif.c
++++ b/libavfilter/vf_bwdif.c
+@@ -302,19 +302,28 @@ static void filter(AVFilterContext *ctx, AVFrame *dstpic,
+     YADIFContext *yadif = &bwdif->yadif;
+     ThreadData td = { .frame = dstpic, .parity = parity, .tff = tff };
+     int i;
++    int last_plane = -1;
+ 
+     for (i = 0; i < yadif->csp->nb_components; i++) {
+         int w = dstpic->width;
+         int h = dstpic->height;
++        const AVComponentDescriptor * const comp = yadif->csp->comp + i;
++
++        // If the last plane was the same as this plane assume we've dealt
++        // with all the pels already
++        if (last_plane == comp->plane)
++            continue;
++        last_plane = comp->plane;
+ 
+         if (i == 1 || i == 2) {
+             w = AV_CEIL_RSHIFT(w, yadif->csp->log2_chroma_w);
+             h = AV_CEIL_RSHIFT(h, yadif->csp->log2_chroma_h);
+         }
+ 
+-        td.w     = w;
+-        td.h     = h;
+-        td.plane = i;
++        // comp step is in bytes but td.w is in pels
++        td.w       = w * comp->step / ((comp->depth + 7) / 8);
++        td.h       = h;
++        td.plane   = comp->plane;
+ 
+         ff_filter_execute(ctx, filter_slice, &td, NULL,
+                           FFMIN((h+3)/4, ff_filter_get_nb_threads(ctx)));
+@@ -350,6 +359,7 @@ static const enum AVPixelFormat pix_fmts[] = {
+     AV_PIX_FMT_YUVA420P9, AV_PIX_FMT_YUVA422P9, AV_PIX_FMT_YUVA444P9,
+     AV_PIX_FMT_YUVA420P10, AV_PIX_FMT_YUVA422P10, AV_PIX_FMT_YUVA444P10,
+     AV_PIX_FMT_YUVA420P16, AV_PIX_FMT_YUVA422P16, AV_PIX_FMT_YUVA444P16,
++    AV_PIX_FMT_NV12,
+     AV_PIX_FMT_GBRP, AV_PIX_FMT_GBRP9, AV_PIX_FMT_GBRP10,
+     AV_PIX_FMT_GBRP12, AV_PIX_FMT_GBRP14, AV_PIX_FMT_GBRP16,
+     AV_PIX_FMT_GBRAP, AV_PIX_FMT_GBRAP16,
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0002-v4l2_m2m_dec-Try-to-accomodate-ffmpegs-ideas-about-d.patch

@@ -0,0 +1,65 @@
+From 4960acb627d736421251500b3e4e0e88d3b12cd1 Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Fri, 12 Jan 2024 16:46:27 +0000
+Subject: [PATCH 02/14] v4l2_m2m_dec: Try to accomodate ffmpegs ideas about
+ default s/w fmts
+
+---
+ libavcodec/v4l2_m2m_dec.c | 21 ++++++++++++++-------
+ 1 file changed, 14 insertions(+), 7 deletions(-)
+
+diff --git a/libavcodec/v4l2_m2m_dec.c b/libavcodec/v4l2_m2m_dec.c
+index f67dd23ba1..3883223079 100644
+--- a/libavcodec/v4l2_m2m_dec.c
++++ b/libavcodec/v4l2_m2m_dec.c
+@@ -1079,7 +1079,6 @@ choose_capture_format(AVCodecContext * const avctx, V4L2m2mContext * const s)
+     unsigned int fmts_n;
+     uint32_t *fmts = ff_v4l2_context_enum_drm_formats(&s->capture, &fmts_n);
+     enum AVPixelFormat *fmts2 = NULL;
+-    enum AVPixelFormat t;
+     enum AVPixelFormat gf_pix_fmt;
+     unsigned int i;
+     unsigned int n = 0;
+@@ -1089,7 +1088,7 @@ choose_capture_format(AVCodecContext * const avctx, V4L2m2mContext * const s)
+     if (!fmts)
+         return AVERROR(ENOENT);
+ 
+-    if ((fmts2 = av_malloc(sizeof(*fmts2) * (fmts_n + 2))) == NULL) {
++    if ((fmts2 = av_malloc(sizeof(*fmts2) * (fmts_n + 3))) == NULL) {
+         rv = AVERROR(ENOMEM);
+         goto error;
+     }
+@@ -1110,17 +1109,25 @@ choose_capture_format(AVCodecContext * const avctx, V4L2m2mContext * const s)
+             pref_n = n;
+         fmts2[n++] = f;
+     }
+-    fmts2[n] = AV_PIX_FMT_NONE;
+ 
+     if (n < 2) {
+         av_log(avctx, AV_LOG_DEBUG, "%s: No usable formats found\n", __func__);
+         goto error;
+     }
+ 
+-    // Put preferred s/w format at the end - ff_get_format will put it in sw_pix_fmt
+-    t = fmts2[n - 1];
+-    fmts2[n - 1] = fmts2[pref_n];
+-    fmts2[pref_n] = t;
++    if (n != 2) {
++        // ffmpeg.c really only expects one s/w format. It thinks that the
++        // last format in the list is the s/w format of the h/w format but
++        // also chooses the first non-h/w format as the preferred s/w format.
++        // The only way of reconciling this is to dup our preferred format into
++        // both last & first place :-(
++        const enum AVPixelFormat t = fmts2[pref_n];
++        fmts2[pref_n] = fmts2[1];
++        fmts2[1] = t;
++        fmts2[n++] = t;
++    }
++
++    fmts2[n] = AV_PIX_FMT_NONE;
+ 
+     gf_pix_fmt = ff_get_format(avctx, fmts2);
+     av_log(avctx, AV_LOG_DEBUG, "avctx requested=%d (%s) %dx%d; get_format requested=%d (%s)\n",
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0003-v4l2_m2m_dec-Fix-cma-allocated-s-w-output.patch

@@ -0,0 +1,92 @@
+From 80f74137438df2cfe911907242ec96593642f64b Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Thu, 18 Jan 2024 15:57:30 +0000
+Subject: [PATCH 03/14] v4l2_m2m_dec: Fix cma allocated s/w output
+
+---
+ libavcodec/v4l2_buffers.c | 33 +++++++++++++++++++++++----------
+ 1 file changed, 23 insertions(+), 10 deletions(-)
+
+diff --git a/libavcodec/v4l2_buffers.c b/libavcodec/v4l2_buffers.c
+index e412636a7a..b3ef74bcd4 100644
+--- a/libavcodec/v4l2_buffers.c
++++ b/libavcodec/v4l2_buffers.c
+@@ -486,6 +486,11 @@ static void v4l2_free_bufref(void *opaque, uint8_t *data)
+         // Buffer still attached to context
+         V4L2m2mContext *s = buf_to_m2mctx(avbuf);
+ 
++        if (!s->output_drm && avbuf->dmabuf[0] != NULL) {
++            for (unsigned int i = 0; i != avbuf->num_planes; ++i)
++                dmabuf_read_end(avbuf->dmabuf[i]);
++        }
++
+         ff_mutex_lock(&ctx->lock);
+ 
+         ff_v4l2_buffer_set_avail(avbuf);
+@@ -533,6 +538,9 @@ static int v4l2_buffer_export_drm(V4L2Buffer* avbuf)
+                 avbuf->buf.m.planes[i].m.fd = dma_fd;
+             else
+                 avbuf->buf.m.fd = dma_fd;
++
++            if (!s->output_drm)
++                avbuf->plane_info[i].mm_addr = dmabuf_map(avbuf->dmabuf[i]);
+         }
+         else {
+             struct v4l2_exportbuffer expbuf;
+@@ -647,6 +655,11 @@ static int v4l2_buffer_buf_to_swframe(AVFrame *frame, V4L2Buffer *avbuf)
+         break;
+     }
+ 
++    if (avbuf->dmabuf[0] != NULL) {
++        for (unsigned int i = 0; i != avbuf->num_planes; ++i)
++            dmabuf_read_start(avbuf->dmabuf[i]);
++    }
++
+     return 0;
+ }
+ 
+@@ -947,6 +960,7 @@ int ff_v4l2_buffer_initialize(AVBufferRef ** pbufref, int index, V4L2Context *ct
+     V4L2Buffer * const avbuf = av_mallocz(sizeof(*avbuf));
+     AVBufferRef * bufref;
+     V4L2m2mContext * const s = ctx_to_m2mctx(ctx);
++    int want_mmap;
+ 
+     *pbufref = NULL;
+     if (avbuf == NULL)
+@@ -988,10 +1002,10 @@ int ff_v4l2_buffer_initialize(AVBufferRef ** pbufref, int index, V4L2Context *ct
+     } else
+         avbuf->num_planes = 1;
+ 
+-    for (i = 0; i < avbuf->num_planes; i++) {
+-        const int want_mmap = avbuf->buf.memory == V4L2_MEMORY_MMAP &&
+-            (V4L2_TYPE_IS_OUTPUT(ctx->type) || !buf_to_m2mctx(avbuf)->output_drm);
++    want_mmap = avbuf->buf.memory == V4L2_MEMORY_MMAP &&
++        (V4L2_TYPE_IS_OUTPUT(ctx->type) || !buf_to_m2mctx(avbuf)->output_drm);
+ 
++    for (i = 0; i < avbuf->num_planes; i++) {
+         avbuf->plane_info[i].bytesperline = V4L2_TYPE_IS_MULTIPLANAR(ctx->type) ?
+             ctx->format.fmt.pix_mp.plane_fmt[i].bytesperline :
+             ctx->format.fmt.pix.bytesperline;
+@@ -1032,13 +1046,12 @@ int ff_v4l2_buffer_initialize(AVBufferRef ** pbufref, int index, V4L2Context *ct
+         avbuf->buf.length    = avbuf->planes[0].length;
+     }
+ 
+-    if (!V4L2_TYPE_IS_OUTPUT(ctx->type)) {
+-        if (s->output_drm) {
+-            ret = v4l2_buffer_export_drm(avbuf);
+-            if (ret) {
+-                av_log(logger(avbuf), AV_LOG_ERROR, "Failed to get exported drm handles\n");
+-                goto fail;
+-            }
++    if (!want_mmap) {
++        // export_drm does dmabuf alloc if we aren't using v4l2 alloc
++        ret = v4l2_buffer_export_drm(avbuf);
++        if (ret) {
++            av_log(logger(avbuf), AV_LOG_ERROR, "Failed to get exported drm handles\n");
++            goto fail;
+         }
+     }
+ 
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0004-v4l2_req-Fix-media-pool-delete-race.patch

@@ -0,0 +1,109 @@
+From c1328b956e9856210b1f2bc20c20fd152c309123 Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Mon, 29 Jan 2024 15:12:34 +0000
+Subject: [PATCH 04/14] v4l2_req: Fix media pool delete race
+
+fds & polltasks associated with media fds that are still in flight are
+not freed on delete but the main pool is leading to use after free when
+they finally do complete. Stop scanning the free chain on delete and
+simply delete everything, in-flight or not. This requires changing alloc
+as the buffers weren't previously tracked in-flight.
+---
+ libavcodec/v4l2_req_media.c | 38 ++++++++++++++++++++-----------------
+ 1 file changed, 21 insertions(+), 17 deletions(-)
+
+diff --git a/libavcodec/v4l2_req_media.c b/libavcodec/v4l2_req_media.c
+index 0394bb2b23..c94cc5b0f6 100644
+--- a/libavcodec/v4l2_req_media.c
++++ b/libavcodec/v4l2_req_media.c
+@@ -86,6 +86,8 @@ struct media_pool {
+     int fd;
+     sem_t sem;
+     pthread_mutex_t lock;
++    unsigned int pool_n;
++    struct media_request * pool_reqs;
+     struct media_request * free_reqs;
+     struct pollqueue * pq;
+ };
+@@ -251,18 +253,17 @@ int media_request_abort(struct media_request ** const preq)
+     return 0;
+ }
+ 
+-static void delete_req_chain(struct media_request * const chain)
++static void free_req_pool(struct media_request * const pool, const unsigned int n)
+ {
+-    struct media_request * next = chain;
+-    while (next) {
+-        struct media_request * const req = next;
+-        next = req->next;
++    unsigned int i;
++    for (i = 0; i != n; ++i) {
++        struct media_request * const req = pool + i;
+         if (req->pt)
+             polltask_delete(&req->pt);
+         if (req->fd != -1)
+             close(req->fd);
+-        free(req);
+     }
++    free(pool);
+ }
+ 
+ struct media_pool * media_pool_new(const char * const media_path,
+@@ -283,17 +284,16 @@ struct media_pool * media_pool_new(const char * const media_path,
+         goto fail1;
+     }
+ 
++    if ((mp->pool_reqs = calloc(n, sizeof(*mp->pool_reqs))) == NULL)
++        goto fail3;
++    mp->pool_n = n;
+     for (i = 0; i != n; ++i) {
+-        struct media_request * req = malloc(sizeof(*req));
+-        if (!req)
+-            goto fail4;
++        mp->pool_reqs[i].mp = mp;
++        mp->pool_reqs[i].fd = -1;
++    }
+ 
+-        *req = (struct media_request){
+-            .next = mp->free_reqs,
+-            .mp = mp,
+-            .fd = -1
+-        };
+-        mp->free_reqs = req;
++    for (i = 0; i != n; ++i) {
++        struct media_request * const req = mp->pool_reqs + i;
+ 
+         if (ioctl(mp->fd, MEDIA_IOC_REQUEST_ALLOC, &req->fd) == -1) {
+             request_log("Failed to alloc request %d: %s\n", i, strerror(errno));
+@@ -303,6 +303,9 @@ struct media_pool * media_pool_new(const char * const media_path,
+         req->pt = polltask_new(pq, req->fd, POLLPRI, media_request_done, req);
+         if (!req->pt)
+             goto fail4;
++
++        req->next = mp->free_reqs,
++        mp->free_reqs = req;
+     }
+ 
+     sem_init(&mp->sem, 0, n);
+@@ -310,7 +313,8 @@ struct media_pool * media_pool_new(const char * const media_path,
+     return mp;
+ 
+ fail4:
+-    delete_req_chain(mp->free_reqs);
++    free_req_pool(mp->pool_reqs, mp->pool_n);
++fail3:
+     close(mp->fd);
+     pthread_mutex_destroy(&mp->lock);
+ fail1:
+@@ -327,7 +331,7 @@ void media_pool_delete(struct media_pool ** pMp)
+         return;
+     *pMp = NULL;
+ 
+-    delete_req_chain(mp->free_reqs);
++    free_req_pool(mp->pool_reqs, mp->pool_n);
+     close(mp->fd);
+     sem_destroy(&mp->sem);
+     pthread_mutex_destroy(&mp->lock);
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0005-drm_vout-Fix-connector-etc.-desc-memory-leak.patch

@@ -0,0 +1,30 @@
+From 613e5cbb5e0a7626377876e9a441c614afe1e25e Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Tue, 30 Jan 2024 14:24:59 +0000
+Subject: [PATCH 05/14] drm_vout: Fix connector etc. desc memory leak
+
+---
+ libavdevice/drm_vout.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/libavdevice/drm_vout.c b/libavdevice/drm_vout.c
+index 491e1dc608..275748abdc 100644
+--- a/libavdevice/drm_vout.c
++++ b/libavdevice/drm_vout.c
+@@ -501,6 +501,13 @@ static int find_crtc(struct AVFormatContext * const avctx, int drmfd, struct drm
+                 crtc ? crtc->height : 0,
+                 (s->conId == (int)con->connector_id ?
+             " (chosen)" : ""));
++
++          if (crtc)
++              drmModeFreeCrtc(crtc);
++          if (enc)
++              drmModeFreeEncoder(enc);
++          if (con)
++              drmModeFreeConnector(con);
+       }
+ 
+       if (!s->conId) {
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0006-conf_native-Add-tsan-option.patch

@@ -0,0 +1,58 @@
+From f1868ad7d598cf4f194680a5e8d116744d8227cc Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Tue, 30 Jan 2024 16:20:53 +0000
+Subject: [PATCH 06/14] conf_native: Add --tsan option
+
+---
+ pi-util/conf_native.sh | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+diff --git a/pi-util/conf_native.sh b/pi-util/conf_native.sh
+index f0ed159594..0dbaa53e97 100755
+--- a/pi-util/conf_native.sh
++++ b/pi-util/conf_native.sh
+@@ -10,6 +10,8 @@ RPI_KEEPS=""
+ NOSHARED=
+ MMAL=
+ USR_PREFIX=
++TOOLCHAIN=
++R=rel
+ 
+ while [ "$1" != "" ] ; do
+     case $1 in
+@@ -22,6 +24,10 @@ while [ "$1" != "" ] ; do
+ 	--usr)
+ 	    USR_PREFIX=/usr
+ 	    ;;
++	--tsan)
++	    TOOLCHAIN="--toolchain=gcc-tsan"
++	    R=tsan
++	    ;;
+ 	*)
+ 	    echo "Usage $0: [--noshared] [--mmal] [--usr]"
+ 	    echo "  noshared  Build static libs and executable - good for testing"
+@@ -82,11 +88,11 @@ V=`cat RELEASE`
+ SHARED_LIBS="--enable-shared"
+ if [ $NOSHARED ]; then
+   SHARED_LIBS="--disable-shared"
+-  OUT=$BUILDBASE/$B-$C-$V-static-rel
++  OUT=$BUILDBASE/$B-$C-$V-static-$R
+   echo Static libs
+ else
+   echo Shared libs
+-  OUT=$BUILDBASE/$B-$C-$V-shared-rel
++  OUT=$BUILDBASE/$B-$C-$V-shared-$R
+ fi
+ 
+ if [ ! $USR_PREFIX ]; then
+@@ -106,6 +112,7 @@ $FFSRC/configure \
+  --libdir=$LIB_PREFIX\
+  --incdir=$INC_PREFIX\
+  $MCOPTS\
++ $TOOLCHAIN\
+  --disable-stripping\
+  --disable-thumb\
+  --enable-sand\
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0007-v4l2_m2m-Rework-use-of-ctx-lock-to-avoid-use-while-u.patch

@@ -0,0 +1,166 @@
+From 4f458f6ef9d74a44029dab3c0416f630c96a968b Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Tue, 30 Jan 2024 16:25:53 +0000
+Subject: [PATCH 07/14] v4l2_m2m: Rework use of ctx->lock to avoid use while
+ uninit
+
+---
+ libavcodec/v4l2_buffers.c |  9 ++--
+ libavcodec/v4l2_context.c | 86 +++++++++++++++++++++++++++------------
+ 2 files changed, 63 insertions(+), 32 deletions(-)
+
+diff --git a/libavcodec/v4l2_buffers.c b/libavcodec/v4l2_buffers.c
+index b3ef74bcd4..e844a1a0b6 100644
+--- a/libavcodec/v4l2_buffers.c
++++ b/libavcodec/v4l2_buffers.c
+@@ -484,7 +484,7 @@ static void v4l2_free_bufref(void *opaque, uint8_t *data)
+ 
+     if (ctx != NULL) {
+         // Buffer still attached to context
+-        V4L2m2mContext *s = buf_to_m2mctx(avbuf);
++        V4L2m2mContext * const s = ctx_to_m2mctx(ctx);
+ 
+         if (!s->output_drm && avbuf->dmabuf[0] != NULL) {
+             for (unsigned int i = 0; i != avbuf->num_planes; ++i)
+@@ -494,15 +494,14 @@ static void v4l2_free_bufref(void *opaque, uint8_t *data)
+         ff_mutex_lock(&ctx->lock);
+ 
+         ff_v4l2_buffer_set_avail(avbuf);
++        avbuf->buf.timestamp.tv_sec = 0;
++        avbuf->buf.timestamp.tv_usec = 0;
+ 
+-        if (s->draining && V4L2_TYPE_IS_OUTPUT(ctx->type)) {
++        if (V4L2_TYPE_IS_OUTPUT(ctx->type)) {
+             av_log(logger(avbuf), AV_LOG_DEBUG, "%s: Buffer avail\n", ctx->name);
+-            /* no need to queue more buffers to the driver */
+         }
+         else if (ctx->streamon) {
+             av_log(logger(avbuf), AV_LOG_DEBUG, "%s: Buffer requeue\n", ctx->name);
+-            avbuf->buf.timestamp.tv_sec = 0;
+-            avbuf->buf.timestamp.tv_usec = 0;
+             ff_v4l2_buffer_enqueue(avbuf);  // will set to IN_DRIVER
+         }
+         else {
+diff --git a/libavcodec/v4l2_context.c b/libavcodec/v4l2_context.c
+index a01a105892..0d61a432c3 100644
+--- a/libavcodec/v4l2_context.c
++++ b/libavcodec/v4l2_context.c
+@@ -906,56 +906,88 @@ static int stuff_all_buffers(AVCodecContext * avctx, V4L2Context* ctx)
+         }
+     }
+ 
++    ff_mutex_lock(&ctx->lock);
+     for (i = 0; i < ctx->num_buffers; ++i) {
+         struct V4L2Buffer * const buf = (struct V4L2Buffer *)ctx->bufrefs[i]->data;
+         if (buf->status == V4L2BUF_AVAILABLE) {
+             rv = ff_v4l2_buffer_enqueue(buf);
+             if (rv < 0)
+-                return rv;
++                break;
+         }
+     }
+-    return 0;
++    ff_mutex_unlock(&ctx->lock);
++    return rv;
+ }
+ 
+-int ff_v4l2_context_set_status(V4L2Context* ctx, uint32_t cmd)
++static int set_streamon(AVCodecContext * const avctx, V4L2Context*const ctx)
+ {
+     int type = ctx->type;
+     int ret = 0;
+-    AVCodecContext * const avctx = logger(ctx);
++
++    if (!V4L2_TYPE_IS_OUTPUT(ctx->type))
++        stuff_all_buffers(avctx, ctx);
++
++    if (ioctl(ctx_to_m2mctx(ctx)->fd, VIDIOC_STREAMON, &type) < 0) {
++        ret = AVERROR(errno);
++        av_log(avctx, AV_LOG_ERROR, "%s set status ON failed: err=%s\n", ctx->name,
++               av_err2str(ret));
++        return ret;
++    }
++
++    ctx->first_buf = 1;
++    ctx->streamon = 1;
++    ctx->flag_last = 0;
++    av_log(avctx, AV_LOG_DEBUG, "%s set status ON OK\n", ctx->name);
++    return ret;
++}
++
++static int set_streamoff(AVCodecContext * const avctx, V4L2Context*const ctx)
++{
++    int type = ctx->type;
++    int ret = 0;
++    const int has_bufs = ctx_buffers_alloced(ctx);
+ 
+     // Avoid doing anything if there is nothing we can do
+-    if (cmd == VIDIOC_STREAMOFF && !ctx_buffers_alloced(ctx) && !ctx->streamon)
++    if (!has_bufs && !ctx->streamon)
+         return 0;
+ 
+-    ff_mutex_lock(&ctx->lock);
+-
+-    if (cmd == VIDIOC_STREAMON && !V4L2_TYPE_IS_OUTPUT(ctx->type))
+-        stuff_all_buffers(avctx, ctx);
++    if (has_bufs)
++        ff_mutex_lock(&ctx->lock);
+ 
+-    if (ioctl(ctx_to_m2mctx(ctx)->fd, cmd, &type) < 0) {
+-        const int err = errno;
+-        av_log(avctx, AV_LOG_ERROR, "%s set status %d (%s) failed: err=%d\n", ctx->name,
+-               cmd, (cmd == VIDIOC_STREAMON) ? "ON" : "OFF", err);
+-        ret = AVERROR(err);
++    if (ioctl(ctx_to_m2mctx(ctx)->fd, VIDIOC_STREAMOFF, &type) < 0) {
++        ret = AVERROR(errno);
++        av_log(avctx, AV_LOG_ERROR, "%s set status ON failed: err=%s\n", ctx->name,
++               av_err2str(ret));
+     }
+-    else
+-    {
+-        if (cmd == VIDIOC_STREAMOFF)
+-            flush_all_buffers_status(ctx);
+-        else
+-            ctx->first_buf = 1;
++    else {
++        flush_all_buffers_status(ctx);
+ 
+-        ctx->streamon = (cmd == VIDIOC_STREAMON);
+-        av_log(avctx, AV_LOG_DEBUG, "%s set status %d (%s) OK\n", ctx->name,
+-               cmd, (cmd == VIDIOC_STREAMON) ? "ON" : "OFF");
++        ctx->streamon = 0;
++        ctx->flag_last = 0;
++
++        av_log(avctx, AV_LOG_DEBUG, "%s set status OFF OK\n", ctx->name);
+     }
+ 
+-    // Both stream off & on effectively clear flag_last
+-    ctx->flag_last = 0;
++    if (has_bufs)
++        ff_mutex_unlock(&ctx->lock);
++    return ret;
++}
+ 
+-    ff_mutex_unlock(&ctx->lock);
+ 
+-    return ret;
++int ff_v4l2_context_set_status(V4L2Context* ctx, uint32_t cmd)
++{
++    AVCodecContext * const avctx = logger(ctx);
++
++    switch (cmd) {
++        case VIDIOC_STREAMOFF:
++            return set_streamoff(avctx, ctx);
++        case VIDIOC_STREAMON:
++            return set_streamon(avctx, ctx);
++        default:
++            av_log(avctx, AV_LOG_ERROR, "%s: Unexpected cmd: %d\n", __func__, cmd);
++            break;
++    }
++    return AVERROR_BUG;
+ }
+ 
+ int ff_v4l2_context_enqueue_frame(V4L2Context* ctx, const AVFrame* frame)
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0008-matroskaenc-Fix-H264-delayed-extradata-creation.patch

@@ -0,0 +1,25 @@
+From e00b19de388fec567e37c10edeafa646d322afa6 Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Thu, 1 Feb 2024 18:11:06 +0000
+Subject: [PATCH 08/14] matroskaenc: Fix H264 delayed extradata creation
+
+---
+ libavformat/matroskaenc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/libavformat/matroskaenc.c b/libavformat/matroskaenc.c
+index 61e4c976ef..a6a00f03e7 100644
+--- a/libavformat/matroskaenc.c
++++ b/libavformat/matroskaenc.c
+@@ -1125,7 +1125,7 @@ static int mkv_assemble_native_codecprivate(AVFormatContext *s, AVIOContext *dyn
+     case AV_CODEC_ID_WAVPACK:
+         return put_wv_codecpriv(dyn_cp, extradata, extradata_size);
+     case AV_CODEC_ID_H264:
+-        if (par->extradata_size)
++        if (extradata_size)
+             return ff_isom_write_avcc(dyn_cp, extradata,
+                                       extradata_size);
+         else
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0009-matroskaenc-Assume-H264-is-Annex-B-if-no-extradata.patch

@@ -0,0 +1,34 @@
+From 97c735a3fc0976aa50d819a2f397e9467228722d Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Thu, 1 Feb 2024 18:12:38 +0000
+Subject: [PATCH 09/14] matroskaenc: Assume H264 is Annex B if no extradata
+
+---
+ libavformat/matroskaenc.c | 10 ++++++++--
+ 1 file changed, 8 insertions(+), 2 deletions(-)
+
+diff --git a/libavformat/matroskaenc.c b/libavformat/matroskaenc.c
+index a6a00f03e7..131ad31d1b 100644
+--- a/libavformat/matroskaenc.c
++++ b/libavformat/matroskaenc.c
+@@ -3194,9 +3194,15 @@ static int mkv_init(struct AVFormatContext *s)
+             track->reformat = mkv_reformat_wavpack;
+             break;
+         case AV_CODEC_ID_H264:
++            // Default to reformat if no extradata as the only current
++            // encoder which does this is v4l2m2m which needs reformat
++            if (par->extradata_size == 0 ||
++                (par->extradata_size > 3 &&
++                 (AV_RB24(par->extradata) == 1 || AV_RB32(par->extradata) == 1)))
++                track->reformat = mkv_reformat_h2645;
++            break;
+         case AV_CODEC_ID_HEVC:
+-            if ((par->codec_id == AV_CODEC_ID_H264 && par->extradata_size > 0 ||
+-                 par->codec_id == AV_CODEC_ID_HEVC && par->extradata_size > 6) &&
++            if (par->extradata_size > 6 &&
+                 (AV_RB24(par->extradata) == 1 || AV_RB32(par->extradata) == 1))
+                 track->reformat = mkv_reformat_h2645;
+             break;
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0010-aarch64-rgb2rgb-Change-incorrect-SXTX-to-stxw.patch

@@ -0,0 +1,42 @@
+From 47212b4641888cbf131cbc2f9da58af68e4c92e5 Mon Sep 17 00:00:00 2001
+From: John Cox <jc@kynesim.co.uk>
+Date: Fri, 16 Feb 2024 11:50:56 +0000
+Subject: [PATCH 10/14] aarch64/rgb2rgb: Change incorrect SXTX to stxw
+
+---
+ libswscale/aarch64/rgb2rgb_neon.S | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/libswscale/aarch64/rgb2rgb_neon.S b/libswscale/aarch64/rgb2rgb_neon.S
+index 0956800b41..38f83a1b78 100644
+--- a/libswscale/aarch64/rgb2rgb_neon.S
++++ b/libswscale/aarch64/rgb2rgb_neon.S
+@@ -338,8 +338,8 @@ function ff_bgr24toyv12_aarch64, export=1
+         b.eq            90f
+ 
+         subs            w9,  w4, #0
+-        add             x0, x0, w14, SXTX
+-        add             x1, x1, w6, SXTX
++        add             x0, x0, w14, sxtw
++        add             x1, x1, w6, sxtw
+         mov             x10, x0
+         mov             x11, x1
+         b.lt            12f
+@@ -424,10 +424,10 @@ function ff_bgr24toyv12_aarch64, export=1
+ 
+ // ------------------- Loop to start
+ 
+-        add             x0, x0, w14, SXTX
+-        add             x1, x1, w6, SXTX
+-        add             x2, x2, w7, SXTX
+-        add             x3, x3, w7, SXTX
++        add             x0, x0, w14, sxtw
++        add             x1, x1, w6, sxtw
++        add             x2, x2, w7, sxtw
++        add             x3, x3, w7, sxtw
+         subs            w5, w5, #1
+         b.gt            11b
+ 90:
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0011-aarch64-rpi_sand-Fix-building-under-Clang-LLVM.patch

@@ -0,0 +1,130 @@
+From d346c57fec8c75e2f36368a5f62f91389e9b7547 Mon Sep 17 00:00:00 2001
+From: James Le Cuirot <chewi@gentoo.org>
+Date: Sat, 17 Feb 2024 13:29:36 +0000
+Subject: [PATCH 11/14] aarch64/rpi_sand: Fix building under Clang/LLVM
+
+The "Arm A64 Instruction Set Architecture" manual says that the MOV
+(element) instruction takes the form `MOV <Vd>.<Ts>[<index1>],
+<Vn>.<Ts>[<index2>]`, where `<Ts>` is one of B, H, S, or D. Only certain
+other instructions accept a number in front. GNU as allows you to
+include it for any instruction, but this is non-standard. This is
+explained at https://stackoverflow.com/questions/71907156.
+---
+ libavutil/aarch64/rpi_sand_neon.S | 50 +++++++++++++++----------------
+ 1 file changed, 25 insertions(+), 25 deletions(-)
+
+diff --git a/libavutil/aarch64/rpi_sand_neon.S b/libavutil/aarch64/rpi_sand_neon.S
+index 11658de0c8..3a6bc3de74 100644
+--- a/libavutil/aarch64/rpi_sand_neon.S
++++ b/libavutil/aarch64/rpi_sand_neon.S
+@@ -387,13 +387,13 @@ function ff_rpi_sand30_lines_to_planar_c16, export=1
+                 st3             {v0.4h  - v2.4h},  [x0], #24
+                 st3             {v16.4h - v18.4h}, [x2], #24
+                 beq             11b
+-                mov             v0.2d[0],  v0.2d[1]
++                mov             v0.d[0],  v0.d[1]
+                 sub             w9,  w9,  #12
+-                mov             v1.2d[0],  v1.2d[1]
+-                mov             v2.2d[0],  v2.2d[1]
+-                mov             v16.2d[0], v16.2d[1]
+-                mov             v17.2d[0], v17.2d[1]
+-                mov             v18.2d[0], v18.2d[1]
++                mov             v1.d[0],  v1.d[1]
++                mov             v2.d[0],  v2.d[1]
++                mov             v16.d[0], v16.d[1]
++                mov             v17.d[0], v17.d[1]
++                mov             v18.d[0], v18.d[1]
+ 1:
+                 cmp             w9,  #6-48
+                 blt             1f
+@@ -526,28 +526,28 @@ function ff_rpi_sand30_lines_to_planar_y16, export=1
+                 blt             1f
+                 st3             {v16.4h, v17.4h, v18.4h}, [x0], #24
+                 beq             11b
+-                mov             v16.2d[0], v16.2d[1]
++                mov             v16.d[0], v16.d[1]
+                 sub             w5,  w5,  #12
+-                mov             v17.2d[0], v17.2d[1]
+-                mov             v18.2d[0], v18.2d[1]
++                mov             v17.d[0], v17.d[1]
++                mov             v18.d[0], v18.d[1]
+ 1:
+                 cmp             w5,  #6-96
+                 blt             1f
+                 st3             {v16.h, v17.h, v18.h}[0], [x0], #6
+                 st3             {v16.h, v17.h, v18.h}[1], [x0], #6
+                 beq             11b
+-                mov             v16.2s[0], v16.2s[1]
++                mov             v16.s[0], v16.s[1]
+                 sub             w5,  w5,  #6
+-                mov             v17.2s[0], v17.2s[1]
+-                mov             v18.2s[0], v18.2s[1]
++                mov             v17.s[0], v17.s[1]
++                mov             v18.s[0], v18.s[1]
+ 1:
+                 cmp             w5,  #3-96
+                 blt             1f
+                 st3             {v16.h, v17.h, v18.h}[0], [x0], #6
+                 beq             11b
+-                mov             v16.4h[0], v16.4h[1]
++                mov             v16.h[0], v16.h[1]
+                 sub             w5,  w5,  #3
+-                mov             v17.4h[0], v17.4h[1]
++                mov             v17.h[0], v17.h[1]
+ 1:
+                 cmp             w5,  #2-96
+                 blt             1f
+@@ -625,10 +625,10 @@ function ff_rpi_sand30_lines_to_planar_y8, export=1
+                 blt             1f
+                 st3             {v16.8b, v17.8b, v18.8b}, [x0], #24
+                 beq             11b
+-                mov             v16.2d[0], v16.2d[1]
++                mov             v16.d[0], v16.d[1]
+                 sub             w5,  w5,  #24
+-                mov             v17.2d[0], v17.2d[1]
+-                mov             v18.2d[0], v18.2d[1]
++                mov             v17.d[0], v17.d[1]
++                mov             v18.d[0], v18.d[1]
+ 1:
+                 cmp             w5,  #12-96
+                 blt             1f
+@@ -637,28 +637,28 @@ function ff_rpi_sand30_lines_to_planar_y8, export=1
+                 st3             {v16.b, v17.b, v18.b}[2], [x0], #3
+                 st3             {v16.b, v17.b, v18.b}[3], [x0], #3
+                 beq             11b
+-                mov             v16.2s[0], v16.2s[1]
++                mov             v16.s[0], v16.s[1]
+                 sub             w5,  w5,  #12
+-                mov             v17.2s[0], v17.2s[1]
+-                mov             v18.2s[0], v18.2s[1]
++                mov             v17.s[0], v17.s[1]
++                mov             v18.s[0], v18.s[1]
+ 1:
+                 cmp             w5,  #6-96
+                 blt             1f
+                 st3             {v16.b, v17.b, v18.b}[0], [x0], #3
+                 st3             {v16.b, v17.b, v18.b}[1], [x0], #3
+                 beq             11b
+-                mov             v16.4h[0], v16.4h[1]
++                mov             v16.h[0], v16.h[1]
+                 sub             w5,  w5,  #6
+-                mov             v17.4h[0], v17.4h[1]
+-                mov             v18.4h[0], v18.4h[1]
++                mov             v17.h[0], v17.h[1]
++                mov             v18.h[0], v18.h[1]
+ 1:
+                 cmp             w5,  #3-96
+                 blt             1f
+                 st3             {v16.b, v17.b, v18.b}[0], [x0], #3
+                 beq             11b
+-                mov             v16.8b[0], v16.8b[1]
++                mov             v16.b[0], v16.b[1]
+                 sub             w5,  w5,  #3
+-                mov             v17.8b[0], v17.8b[1]
++                mov             v17.b[0], v17.b[1]
+ 1:
+                 cmp             w5,  #2-96
+                 blt             1f
+-- 
+2.34.1
+

projects/Amlogic/patches/ffmpeg/ffmpeg-0012-rtpenc-Fix-building-with-GCC-14.patch

@@ -0,0 +1,27 @@
+From 07ff7baa79d23620d293b03fc2445c43bdacb34a Mon Sep 17 00:00:00 2001
+From: James Le Cuirot <chewi@gentoo.org>
+Date: Sat, 17 Feb 2024 14:37:44 +0000
+Subject: [PATCH 12/14] rtpenc: Fix building with GCC 14
+
+This incompatible pointer type issue became a fatal error in GCC 14. The
+AVBuffer API started using size_t in 5.0 with ef6a9e5e.
+---
+ libavformat/rtpenc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/libavformat/rtpenc.c b/libavformat/rtpenc.c
+index f67dc2a15a..1f1e4cb25a 100644
+--- a/libavformat/rtpenc.c
++++ b/libavformat/rtpenc.c
+@@ -588,7 +588,7 @@ static int rtp_write_packet(AVFormatContext *s1, AVPacket *pkt)
+     case AV_CODEC_ID_H264:
+     {
+         uint8_t *side_data;
+-        int side_data_size = 0;
++        size_t side_data_size = 0;
+ 
+         side_data = av_packet_get_side_data(pkt, AV_PKT_DATA_NEW_EXTRADATA,
+                                             &side_data_size);
+-- 
+2.34.1
+