// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/en7523-clk.h>
#include <dt-bindings/reset/airoha,en7523-reset.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/phy/airoha,an7581-usb-phy.h>
#include <dt-bindings/soc/airoha,scu-ssr.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		npu_binary: npu_binary@84000000 {
			no-map;
			reg = <0x84000000 0xA00000>;
		};

		npu_flag@84B0000 {
			no-map;
			reg = <0x84B00000 0x100000>;
		};

		npu_pkt@85000000 {
			no-map;
			reg = <0x85000000 0x1A00000>;
		};

		npu_phyaddr@86B00000 {
			no-map;
			reg = <0x86B00000 0x100000>;
		};

		npu_rxdesc@86D00000 {
			no-map;
			reg = <0x86D00000 0x100000>;
		};

		qdma0_buf: qdma0-buf@87000000 {
			no-map;
			reg = <0x87000000 0x2000000>;
		};

		qdma1_buf: qdma1-buf@89000000 {
			no-map;
			reg = <0x89000000 0x1000000>;
		};
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu1>;
				};
			};
		};

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0>;
			enable-method = "psci";
			clock-frequency = <80000000>;
			next-level-cache = <&L2_0>;
			#cooling-cells = <2>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x1>;
			enable-method = "psci";
			clock-frequency = <80000000>;
			next-level-cache = <&L2_0>;
			#cooling-cells = <2>;
		};

		L2_0: l2-cache0 {
			compatible = "cache";
		};
	};

	scu: system-controller@1fa20000 {
		compatible = "airoha,en7523-scu", "syscon";
		reg = <0x1fa20000 0x400>,
		      <0x1fb00000 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	gic: interrupt-controller@9000000 {
		compatible = "arm,gic-v3";
		interrupt-controller;
		#interrupt-cells = <3>;
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x09000000 0x20000>,
		      <0x09080000 0x80000>,
		      <0x09400000 0x2000>,
		      <0x09500000 0x2000>,
		      <0x09600000 0x20000>;
		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
	};

	thermal-zones {
		cpu_thermal: cpu-thermal {
			polling-delay-passive = <0>;
			polling-delay = <0>;

			thermal-sensors = <&thermal 0>;

			trips {
				cpu_hot: cpu-hot {
					temperature = <95000>;
					hysteresis = <1000>;
					type = "hot";
				};

				cpu-critical {
					temperature = <110000>;
					hysteresis = <1000>;
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu_hot>;
					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
					                 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};
	};

	thermal: thermal-sensor@1efbd800 {
		compatible = "airoha,en7581-thermal";
		// reg = <0x1efbd000 0xd5c>;
		reg = <0x1efbd000 0x0fff>;
		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
		airoha,chip-scu = <&scu>;

		#thermal-sensor-cells = <0>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupt-parent = <&gic>;
		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
	};

	uart1: serial@1fbf0000 {
		compatible = "ns16550";
		reg = <0x1fbf0000 0x30>;
		reg-io-width = <4>;
		reg-shift = <2>;
		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <1843200>;
		status = "okay";
	};

	gpio0: gpio@1fbf0200 {
		compatible = "airoha,en7523-gpio";
		reg = <0x1fbf0204 0x4>,
		      <0x1fbf0200 0x4>,
		      <0x1fbf0220 0x4>,
		      <0x1fbf0214 0x4>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	gpio1: gpio@1fbf0270 {
		compatible = "airoha,en7523-gpio";
		reg = <0x1fbf0270 0x4>,
		      <0x1fbf0260 0x4>,
		      <0x1fbf0264 0x4>,
		      <0x1fbf0278 0x4>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	pcie0: pcie@1fa91000 {
		compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
		device_type = "pci";
		reg = <0x1fa91000 0x1000>;
		reg-names = "port0";
		linux,pci-domain = <0>;
		#address-cells = <3>;
		#size-cells = <2>;
		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "pcie_irq";
		clocks = <&scu EN7523_CLK_PCIE>;
		clock-names = "sys_ck0";
		bus-range = <0x00 0xff>;
		ranges = <0x82000000 0 0x20000000 0x20000000 0 0x2000000>;
		status = "disabled";

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 7>;
		interrupt-map = <0 0 0 1 &pcie_intc0 0>,
				<0 0 0 2 &pcie_intc0 1>,
				<0 0 0 3 &pcie_intc0 2>,
				<0 0 0 4 &pcie_intc0 3>;
		pcie_intc0: interrupt-controller {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <1>;
		};
	};

	pcie1: pcie@1fa92000 {
		compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
		device_type = "pci";
		reg = <0x1fa92000 0x1000>;
		reg-names = "port1";
		linux,pci-domain = <1>;
		#address-cells = <3>;
		#size-cells = <2>;
		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "pcie_irq";
		clocks = <&scu EN7523_CLK_PCIE>;
		clock-names = "sys_ck1";
		bus-range = <0x00 0xff>;
		ranges = <0x82000000 0 0x22000000 0x22000000 0 0x2000000>;
		status = "disabled";

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 7>;
		interrupt-map = <0 0 0 1 &pcie_intc1 0>,
				<0 0 0 2 &pcie_intc1 1>,
				<0 0 0 3 &pcie_intc1 2>,
				<0 0 0 4 &pcie_intc1 3>;
		pcie_intc1: interrupt-controller {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <1>;
		};
	};

	spi_ctrl: spi_controller@1fa10000 {
		compatible = "airoha,en7523-snand";
		reg = <0x1fa10000 0x140>,
		      <0x1fa11000 0x160>;

		clocks = <&scu EN7523_CLK_SPI>;
		clock-names = "spi";

		#address-cells = <1>;
		#size-cells = <0>;

		nand: nand@0 {
			compatible = "spi-nand";
			reg = <0>;
			spi-max-frequency = <50000000>;
			spi-tx-bus-width = <1>;
			spi-rx-bus-width = <2>;
		};
	};

	watchdog@1fbf0100 {
		compatible = "airoha,en7581-wdt";
		reg = <0x1fbf0100 0x38>;

		clocks = <&scu EN7523_CLK_BUS>;
		clock-names = "bus";
	};

	usb0: usb@1fab0000 {
		compatible = "mediatek,mtk-xhci";
		reg = <0x1fab0000 0x3e00>,
					<0x1fab3e00 0x100>;
		reg-names = "mac", "ippc";
		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

		phys = <&usb0_phy PHY_TYPE_USB2>, <&usb0_phy PHY_TYPE_USB3>;

		status = "disabled";
	};

	usb0_phy: phy@1fac0000 {
		compatible = "airoha,an7581-usb-phy";
		reg = <0x1fad0000 0x1fff>;

		airoha,scu = <&scu>;
		airoha,usb2-monitor-clk-sel = <AIROHA_USB2_MONCLK_SEL1>;
		airoha,serdes-port = <AIROHA_SCU_SERDES_USB1>;

		#phy-cells = <1>;
	};

	crypto@1e004000 {
		compatible = "inside-secure,safexcel-eip93ies";
		reg = <0x1fb70000 0x1000>;

		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2cclock: i2cclock@0 {
		#clock-cells = <0>;
		compatible = "fixed-clock";

		/* 20 MHz */
		clock-frequency = <20000000>;
	};

	i2c0: i2c0@1fbf8000 {
		compatible = "mediatek,mt7621-i2c";
		reg = <0x1fbf8000 0x100>;

		clocks = <&i2cclock>;

		/* 100 kHz */
		clock-frequency = <100000>;
		#address-cells = <1>;
		#size-cells = <0>;

		status = "disabled";
	};

	wed0: wed@1fa02000 {
		compatible = "mediatek,mt7622-wed", "syscon";
		reg = <0x1fa02000 0xb00>;
		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
	};

	wed1: wed@1fa03000 {
		compatible = "mediatek,mt7622-wed", "syscon";
		reg = <0x1fa03000 0xb00>;
		interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
	};

	/*
	// [    1.871799] mtk_hsdma 1fa01800.hsdma: No clock for 1fa01800.hsdma
	hsdma: hsdma@1fa01800 {
		compatible = "mediatek,mt7622-hsdma";
		reg = <0x1fa01800 0x300>;

		resets = <&scu EN7523_HSDMA_RST>;
		reset-names = "hsdma";

		interrupt-parent = <&gic>;
		interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;

		#dma-cells = <1>;
		#dma-channels = <2>;
		#dma-requests = <2>;

		status = "disabled";
	};
	*/

	npu: npu@1e900000 {
		compatible = "airoha,en7523-npu";
		reg = <0x1e900000 0x313000>,
		      <0x1e800000 0x60000>;
		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;

		memory-region = <&npu_binary>;
		memory-region-names = "binary";

		status = "disabled";
	};

	eth: ethernet@1fb50000 {
		compatible = "airoha,en7523-eth";
		reg = <0x1fb50000 0x2600>,
		      <0x1fb54000 0x2000>,
		      <0x1fb56000 0x2000>,
		      <0x1fbf9000 0x1000>;
		reg-names = "fe", "qdma0", "qdma1", "gdmp";

		resets = <&scu EN7523_FE_RST>,
			 <&scu EN7523_FE_PDMA_RST>,
			 <&scu EN7523_FE_QDMA_RST>,
			 <&scu EN7523_XSI_MAC_RST>,
			 <&scu EN7523_DUAL_HSI0_MAC_RST>,
			 <&scu EN7523_DUAL_HSI1_MAC_RST>,
			 <&scu EN7523_HSI_MAC_RST>;
		reset-names = "fe", "pdma", "qdma",
		      "xsi-mac", "hsi0-mac", "hsi1-mac", "hsi-mac";

		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;

		memory-region = <&qdma0_buf>, <&qdma1_buf>;
		memory-region-names = "qdma0-buf", "qdma1-buf";

		airoha,npu = <&npu>;

		status = "disabled";

		#address-cells = <1>;
		#size-cells = <0>;

		gdm1: ethernet@1 {
			compatible = "airoha,eth-mac";
			reg = <1>;
			phy-mode = "internal";
			status = "disabled";

			fixed-link {
				speed = <10000>;
				full-duplex;
				pause;
			};
		};
	};

	switch: switch@1fb58000 {
		compatible = "airoha,en7581-switch";
		reg = <0x1fb58000 0x8000>;
		resets = <&scu EN7523_GSW_RST>;

		interrupt-controller;
		#interrupt-cells = <1>;
		interrupt-parent = <&gic>;
		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";

		#address-cells = <1>;
		#size-cells = <1>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				label = "lan1";
				phy-mode = "internal";
				phy-handle = <&gsw_phy1>;
			};

			port@2 {
				reg = <2>;
				label = "lan2";
				phy-mode = "internal";
				phy-handle = <&gsw_phy2>;
			};

			port@3 {
				reg = <3>;
				label = "lan3";
				phy-mode = "internal";
				phy-handle = <&gsw_phy3>;
			};

			port@4 {
				reg = <4>;
				label = "lan4";
				phy-mode = "internal";
				phy-handle = <&gsw_phy4>;
			};

			port@6 {
				reg = <6>;
				label = "cpu";
				ethernet = <&gdm1>;
				phy-mode = "internal";

				fixed-link {
					speed = <10000>;
					full-duplex;
					pause;
				};
			};
		};

		mdio {
			#address-cells = <1>;
			#size-cells = <0>;

			gsw_phy1: ethernet-phy@1 {
				compatible = "ethernet-phy-ieee802.3-c22";
				reg = <9>;
				phy-mode = "internal";
				interrupts = <1>;
			};

			gsw_phy2: ethernet-phy@2 {
				compatible = "ethernet-phy-ieee802.3-c22";
				reg = <10>;
				phy-mode = "internal";
				interrupts = <2>;
			};

			gsw_phy3: ethernet-phy@3 {
				compatible = "ethernet-phy-ieee802.3-c22";
				reg = <11>;
				phy-mode = "internal";
				interrupts = <3>;
			};

			gsw_phy4: ethernet-phy@4 {
				compatible = "ethernet-phy-ieee802.3-c22";
				reg = <12>;
				phy-mode = "internal";
				interrupt-parent = <&switch>;
				interrupts = <4>;
			};
		};
	};
};