Kalyani ChidambaramandVarun Wadekar e6c0da159b cpus: denver: fixup register used to store return address ...

The denver_enable_dco and denver_disable_dco use register X3 to store
the return address. But X3 gets over-written by other functions,
downstream.

This patch stores the return address to X18 instead, to fix this
anomaly.

Change-Id: Ic40bfc1d9abaa7b90348843b9ecd09521bb4ee7b
Signed-off-by: Kalyani Chidambaram <kalyanic@nvidia.com>

2020-03-09 15:25:15 -07:00

..

aarch32

Cortex A9:errata 794073 workaround

2019-04-12 10:10:32 +00:00

aarch64

cpus: denver: fixup register used to store return address

2020-03-09 15:25:15 -07:00

cpu-ops.mk

cpus: higher performance non-cacheable load forwarding

2020-02-20 09:25:45 -08:00

errata_report.c

Coverity: remove unnecessary header file includes

2020-02-04 10:23:51 -06:00