Boyan Karatotev f73a0182fa refactor(cpufeat): simplify FEAT_MTPMU helpers ...

The ID register field follows the general convention: 0 means missing,
anything over 1 means implemented. The special value of 0b1111 has the
semantics of "feature unconditionally enabled" which follows this rule.
There is no need to special case the feature and code can be simpler.

Change-Id: Iaf90eb1f8abb22a48054b4e564dad669e1703dcb
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

2026-05-13 09:02:21 +01:00

..

arch_features.h

refactor(cpufeat): simplify FEAT_MTPMU helpers

2026-05-13 09:02:21 +01:00

arch_helpers.h

feat(crypto): enable floating point register traps in EL3

2026-01-28 10:27:26 -06:00

arch.h

feat(dsu): enable PMU registers access at EL1

2025-09-29 10:30:05 +01:00

asm_macros.S

feat(cpufeat): update FEAT_SB's FEAT_STATE_CHECKED status

2026-01-19 10:50:58 +00:00

assert_macros.S

Reorganize architecture-dependent header files

2019-01-04 10:43:16 +00:00

console_macros.S

refactor(console): disable getc() by default

2023-10-11 08:40:14 +02:00

el3_common_macros.S

feat(per-cpu): integrate per-cpu framework into BL31/BL32

2025-11-07 21:59:41 +05:30

smccc_helpers.h

style: remove useless trailing semicolon and line continuations

2023-03-09 14:59:08 +01:00

smccc_macros.S

aarch32: stop speculative execution past exception returns

2020-03-01 06:44:30 -06:00