Files
arm-trusted-firmware/fdts/stm32mp215f-dk-ca35tdcid-rcc.dtsi
T
Yann Gautier 5d6034ad9e feat(stm32mp21-fdts): add STM32MP215F-DK board
Add the required device tree files for STM32MP215F-DK board support.

Change-Id: Iae607cf9a4308750c18dbba40e29ba483b1f6dcb
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2026-02-05 14:00:34 +01:00

89 lines
1.7 KiB
Devicetree

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/*
* Copyright (c) 2026, STMicroelectronics - All Rights Reserved
* Author: Loic Pallardy loic.pallardy@foss.st.com for STMicroelectronics.
*/
/*
* stm32mp215f Clock tree device tree configuration
* Project : open
* Generated by XLmx tool version 2.2 - 10/2/2024 3:58:35 PM
*/
&clk_hse {
clock-frequency = <40000000>;
};
&clk_hsi {
clock-frequency = <64000000>;
};
&clk_lse {
clock-frequency = <32768>;
};
&clk_lsi {
clock-frequency = <32000>;
};
&clk_msi {
clock-frequency = <16000000>;
};
&rcc {
st,busclk = <
DIV_CFG(DIV_LSMCU, 1)
DIV_CFG(DIV_APB1, 0)
DIV_CFG(DIV_APB2, 0)
DIV_CFG(DIV_APB3, 0)
DIV_CFG(DIV_APB4, 0)
DIV_CFG(DIV_APB5, 0)
DIV_CFG(DIV_APBDBG, 0)
>;
st,flexgen = <
FLEXGEN_CFG(0, XBAR_SRC_PLL4, 0, 3)
FLEXGEN_CFG(1, XBAR_SRC_PLL4, 0, 5)
FLEXGEN_CFG(2, XBAR_SRC_PLL4, 0, 1)
FLEXGEN_CFG(4, XBAR_SRC_PLL4, 0, 3)
FLEXGEN_CFG(5, XBAR_SRC_PLL4, 0, 2)
FLEXGEN_CFG(8, XBAR_SRC_HSI_KER, 0, 0)
FLEXGEN_CFG(51, XBAR_SRC_PLL4, 0, 5)
FLEXGEN_CFG(52, XBAR_SRC_PLL4, 0, 5)
FLEXGEN_CFG(58, XBAR_SRC_HSE_KER, 0, 1)
FLEXGEN_CFG(63, XBAR_SRC_PLL4, 0, 2)
>;
st,kerclk = <
MUX_CFG(MUX_USB2PHY1, MUX_USB2PHY1_FLEX57)
MUX_CFG(MUX_USB2PHY2, MUX_USB2PHY2_FLEX58)
>;
pll1: st,pll-1 {
st,pll = <&pll1_cfg_1200MHz>;
pll1_cfg_1200MHz: pll1-cfg-1200MHz {
cfg = <30 1 1 1>;
src = <MUX_CFG(MUX_MUXSEL5, MUXSEL_HSE)>;
};
};
pll2: st,pll-2 {
st,pll = <&pll2_cfg_400MHz>;
pll2_cfg_400MHz: pll2-cfg-400MHz {
cfg = <20 1 1 2>;
src = <MUX_CFG(MUX_MUXSEL6, MUXSEL_HSE)>;
};
};
pll4: st,pll-4 {
st,pll = <&pll4_cfg_1200MHz>;
pll4_cfg_1200MHz: pll4-cfg-1200MHz {
cfg = <30 1 1 1>;
src = <MUX_CFG(MUX_MUXSEL0, MUXSEL_HSE)>;
};
};
};