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v2.15-rc0
arm-trusted-firmware/plat/nxp/soc-lx2160a
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Manish V Badarkhe 62a9c5dd40 refactor(nxp): add NXP_TBBR_USE_X509 switch for TBBR flow selection 
Introduce NXP_TBBR_USE_X509 (default 0) to select X.509/mbedTLS
versus CSF header flows, and update fuse_fip and ddr_fip gating
to use this flag instead of MBEDTLS_DIR.

Change-Id: Ifabf6bbb4a05f57b060e9af3c9ae6b29b8864280
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2026-03-11 10:36:55 +00:00
..
aarch64
fix(lx2160): set snoop-delayed exclusive handling on A72 cores
2025-05-15 11:09:21 +02:00
include
feat(lx2): support more variants
2022-11-23 09:17:48 +08:00
lx2160aqds
fix(lx2160): add DDRC missing DIMMs
2025-05-08 10:38:05 +02:00
lx2160ardb
feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition
2021-06-15 17:43:04 +08:00
lx2162aqds
fix(lx2160a): put cert_create_tbbr.mk in the standard location
2025-07-07 16:15:39 +01:00
ddr_fip.mk
refactor(nxp): add NXP_TBBR_USE_X509 switch for TBBR flow selection
2026-03-11 10:36:55 +00:00
ddr_sb.mk
refactor(build): avoid implicit pattern rules
2025-10-04 01:27:18 +00:00
ddr_tbbr.mk
fix(lx2160a): put cert_create_tbbr.mk in the standard location
2025-07-07 16:15:39 +01:00
soc.c
fix(nxp): tbbr: adds snvs_init
2025-10-14 09:45:05 +00:00
soc.def
feat(lx2): enable OCRAM ECC
2022-12-06 22:46:10 +08:00
soc.mk
fix(layerscape): unlock write access SMMU_CBn_ACTLR
2022-12-06 22:46:10 +08:00