Ghennadi Procopciuc e73c3c3a6c feat(s32g274a): enable BL31 stage ...

Add BL31 prerequisites for the S32G274ARDB2 board to allow single-core
cold boot without MMU and PSCI services.

Change-Id: I8a10fd62f3cc9430083758043ea82e3803f61060
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Bogdan Roman <bogdan-gabriel.roman@nxp.com>
Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

2024-04-25 11:22:53 +03:00

..

common

fix(tree): correct some typos

2023-05-09 15:57:12 +01:00

s32/s32g274ardb2

feat(s32g274a): enable BL31 stage

2024-04-25 11:22:53 +03:00

soc-ls1028a

fix(layerscape): fix errata a008850

2022-11-22 14:56:19 +08:00

soc-ls1043a

fix(layerscape): unlock write access SMMU_CBn_ACTLR

2022-12-06 22:46:10 +08:00

soc-ls1046a

refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3

2023-03-15 11:43:14 +00:00

soc-ls1088a

fix(tree): correct some typos

2023-05-09 15:57:12 +01:00

soc-lx2160a

fix(layerscape): unlock write access SMMU_CBn_ACTLR

2022-12-06 22:46:10 +08:00