Bipin Raviandlaurenw-arm 6cb8be17a5 fix(cpus): workaround for Neoverse N2 erratum 2346952 ...

Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all
revisions <= r0p2 and is fixed in r0p3.
The workaround is to set L2 TQ size statically to it's full size.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-1982442/latest

Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>

2023-11-02 10:12:33 -05:00

..

aarch32

chore: update to use Arm word across TF-A

2023-08-08 15:12:30 +01:00

aarch64

fix(cpus): workaround for Neoverse N2 erratum 2346952

2023-11-02 10:12:33 -05:00

cpu_ops.h

feat(cpus): add a concise way to implement AArch64 errata

2023-05-30 09:31:15 +01:00

errata.h

feat(cpus): make revision procedure call optional

2023-08-07 19:36:56 +01:00

wa_cve_2017_5715.h

chore: update to use Arm word across TF-A

2023-08-08 15:12:30 +01:00

wa_cve_2018_3639.h

chore: update to use Arm word across TF-A

2023-08-08 15:12:30 +01:00

wa_cve_2022_23960.h

chore: update to use Arm word across TF-A

2023-08-08 15:12:30 +01:00