Marek Vasut 13e1e761bc fix(rcar4): assure SCIF and HSCIF clock are always enabled ...

Prior stages before TFA BL31 may shut down the SCIF or HSCIF clock.
Enable the SCIF or HSCIF clock again during console initialization,
to make sure those clock are running and prints can be produced on
serial console if necessary.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I9461e72888a939c0bbe5795087a76f1a71c7151d

2025-10-26 20:44:25 +01:00

..

common

feat(rcar): split common SCIF code

2025-10-09 13:00:39 +02:00

rcar

feat(rcar3): change CAM setting to improve bus latency of R-Car Gen3

2024-03-19 22:02:30 +01:00

rcar_gen4

fix(rcar4): assure SCIF and HSCIF clock are always enabled

2025-10-26 20:44:25 +01:00

rzg

renesas: rzg: Add support to identify EK874 RZ/G2E board

2021-04-20 16:17:50 +01:00