arm-trusted-firmware

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Arvind Ram PrakashandVarun Wadekar c55f75f334 fix(cpus): workaround for Cortex-X4 erratum 3887999

Cortex-X4 erratum 3887999 is a Cat B erratum that applies
to all revisions <= r0p3 and is still open.

The erratum can be avoided by setting CPUACTLR2[22] to 1'b1 which will
disable linking multiple Non-Cacheable or Device GRE loads to the same
read request for the cache-line. This might have a significant
performance impact to Non-cacheable and Device GRE read bandwidth for
streaming scenarios

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I851746b7b430eac85184c8d402d1aa5bb3c94a8e
(cherry picked from commit 5a45f0fca7)

2025-08-12 22:58:53 +00:00

alt-boot-flows.rst

doc: Split the User Guide into multiple files

2019-11-27 10:45:54 +00:00

auth-framework.rst

Cleanup the code for TBBR CoT descriptors

2020-05-19 05:05:19 +01:00

cpu-specific-build-macros.rst

fix(cpus): workaround for Cortex-X4 erratum 3887999

2025-08-12 22:58:53 +00:00

firmware-design.rst

perf(cpus): make reset errata do fewer branches