John PowellandJidong Sun da60f9c022 fix(cpus): workaround for Cortex-A710 erratum 1901946 ...

Cortex-A710 erratum 1901946 is a Cat B erratum that applies
to revision r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4_EL1[15]. This has a slight
performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101

Change-Id: I703f0e6ee122e44a9bc284d90f1465039e3b40e4
Signed-off-by: John Powell <john.powell@arm.com>
(cherry picked from commit 4467348b63)

2025-07-18 16:22:36 +00:00

..

arch

perf(cpus): inline the init_cpu_data_ptr function

2025-04-22 16:57:15 -05:00

bl1

refactor(bl1): clean up bl2 layout calculation

2024-04-26 09:00:12 +00:00

bl2

BL2_AT_EL3: Enable pointer authentication support

2019-02-27 11:58:09 +00:00

bl2u

Standardise header guards across codebase

2018-11-08 10:20:19 +00:00

bl31

Merge "refactor(sdei): use common create_spsr() in SDEI library" into integration

2024-03-14 21:17:45 +01:00

bl32

feat(cm): test integrity of el1_ctx registers

2024-11-08 11:05:13 +00:00

common

feat(d128): add support for FEAT_D128

2024-10-24 14:51:55 -05:00

drivers

feat(mbedtls): update mbedtls to version 3.6.3

2025-05-22 09:33:43 +02:00

dt-bindings

fix(dt-bindings): update STM32MP2 clock and reset bindings

2024-06-27 17:17:35 +02:00

export

feat(tbbr): add image id for backup GPT

2023-10-27 08:31:54 -05:00

lib

fix(cpus): workaround for Cortex-A710 erratum 1901946

2025-07-18 16:22:36 +00:00

plat

feat(rmmd): el3 token sign during attestation

2024-10-15 08:20:28 -07:00

services

fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus

2025-02-07 18:32:03 +01:00

tools_share

fix(tc): add SCP_BL2 to RSE measured boot

2024-06-13 15:53:10 +02:00