Xialin LiuandJidong Sun 4cd3b2f8dc fix(cpus): workaround for Cortex-A65AE erratum 1638571 ...

Cortex-A65AE erratum 1638571 is a Cat B erratum that applies
to revisions r0p0, r1p0, r1p1, and is still open.

This erratum can be avoided by disable stage1 page table walk for
lower Els (EL1 and EL0) in EL3, so 'AT' speculative fetch at any
point produces either the correct result or failure without TLB
allocation.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1344564/latest

Change-Id: I861230de94a105fd52f9c8ef7e7551a2633c065b
Signed-off-by: Xialin Liu <xialin.liu@arm.com>
(cherry picked from commit 7096d2bca0)

2026-02-05 09:54:09 -08:00

..

build-internals.rst

feat(arm): add trusty_sp_fw_config build option

2024-02-23 16:11:47 +00:00

build-options.rst

fix(cpus): workaround for Cortex-A65AE erratum 1638571

2026-02-05 09:54:09 -08:00

docs-build.rst

fix(docs): fix the example command for doc build

2024-11-06 15:18:06 +01:00

image-terminology.rst

docs(build): clarify getting started section

2022-11-16 14:06:48 +00:00

index.rst

docs(porting): move porting guide upper in table of contents

2023-04-11 10:11:04 +02:00

initial-build.rst

docs(build): clarify getting started section

2022-11-16 14:06:48 +00:00

prerequisites.rst

docs(prerequisites): update mbedtls to v3.6.3

2025-05-22 09:33:43 +02:00

psci-lib-integration-guide.rst

docs: update PSCI reference

2023-06-15 09:46:43 +01:00

rt-svc-writers-guide.rst

feat(smccc): add vendor-specific el3 service

2024-05-06 09:42:11 -05:00

tools-build.rst

docs(build): clarify getting started section

2022-11-16 14:06:48 +00:00