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Cortex-A510 erratum 3704847 is a Cat B erratum that applies to
revisions r0p0, r0p1, r0p2, r0p3, r1p0, r1p1, r1p2 and r1p3, and
is still open.
The workaround is to set bit 9 in CPUACTLR_EL1.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1873361/latest/
Change-Id: I2c7c8da9c66471115b5bf8fb5c87d4de46ca265c
Signed-off-by: John Powell <john.powell@arm.com>
(cherry picked from commit ea88493655)