John PowellandYann Gautier 5a70c52215 fix(cpus): workaround for Cortex-A710 erratum 1901946 ...

Cortex-A710 erratum 1901946 is a Cat B erratum that applies
to revision r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4_EL1[15]. This has a slight
performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101

Change-Id: I703f0e6ee122e44a9bc284d90f1465039e3b40e4
Signed-off-by: John Powell <john.powell@arm.com>
(cherry picked from commit 4467348b63)

2025-07-02 10:16:32 +02:00

..

arch

perf(cpus): inline the init_cpu_data_ptr function

2025-04-09 14:28:59 +02:00

bl1

style: remove useless trailing semicolon and line continuations

2023-03-09 14:59:08 +01:00

bl2

BL2_AT_EL3: Enable pointer authentication support

2019-02-27 11:58:09 +00:00

bl2u

Standardise header guards across codebase

2018-11-08 10:20:19 +00:00

bl31

feat(el3-runtime): modify vector entry paths

2023-11-01 11:11:21 +00:00

bl32

refactor(libc): clean up dependencies in libc

2022-09-22 13:23:49 +02:00

common

fix(tbbr): guard defines under MBEDTLS_CONFIG_FILE

2023-10-26 11:30:39 +01:00

drivers

feat(mbedtls): update mbedtls to version 3.6.3

2025-04-10 17:35:25 +02:00

dt-bindings

feat(dt-bindings): add the STM32MP2 clock and reset bindings

2023-09-08 10:56:49 +02:00

export

feat(tbbr): add image id for backup GPT

2023-10-27 08:31:54 -05:00

lib

fix(cpus): workaround for Cortex-A710 erratum 1901946

2025-07-02 10:16:32 +02:00

plat

fix(spm-mm): carve out NS buffer TZC400 region

2024-08-31 11:54:37 +02:00

services

fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus

2025-02-03 17:28:59 +01:00

tools_share

feat(auth): add explicit entries for key OIDs

2023-07-28 09:01:15 +01:00