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NPU #15

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opened 2025-12-07 13:25:23 +00:00 by merbanan · 14 comments
merbanan commented 2025-12-07 13:25:23 +00:00
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I think the amount of NPU cores should be moved out to the dts, maybe even other parameters. Other models have a varying amount of cores.

I think the amount of NPU cores should be moved out to the dts, maybe even other parameters. Other models have a varying amount of cores.
Sirherobrine23 commented 2025-12-07 13:28:02 +00:00
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type this:

	npu: npu@1e900000 {
		compatible = "airoha,en7523-npu";
		reg = <0x1e900000 0x313000>,
		      <0x1e800000 0x60000>;
		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
		    <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;

		memory-region = <&npu_binary>;
		memory-region-names = "binary";

		npu-cores = <4>;
		
		status = "disabled";
	};
type this: ```dts npu: npu@1e900000 { compatible = "airoha,en7523-npu"; reg = <0x1e900000 0x313000>, <0x1e800000 0x60000>; interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; memory-region = <&npu_binary>; memory-region-names = "binary"; npu-cores = <4>; status = "disabled"; }; ```
merbanan commented 2025-12-07 13:30:50 +00:00
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And there seem to be 2 types of NPU cores.

Xmart = "old" en7523 NPU (this is also shared with the AN7552/AN7563 but with different initialization)
Xessor = "new" NPU (7581)

And there seem to be 2 types of NPU cores. Xmart = "old" en7523 NPU (this is also shared with the AN7552/AN7563 but with different initialization) Xessor = "new" NPU (7581)
Sirherobrine23 commented 2025-12-07 13:33:42 +00:00
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I had already noticed that, using the exs27 code:

0e0066b175/target/linux/airoha/files/arch/arm/mach-econet/ecnt_npu.c (L137-L150)

I had already noticed that, using the exs27 code: https://sirherobrine23.com.br/airoha_en7523/netgear_exs27/src/commit/0e0066b1750dee9dbbe507c751c8cc3e78826c01/target/linux/airoha/files/arch/arm/mach-econet/ecnt_npu.c#L137-L150
Sirherobrine23 commented 2025-12-07 13:36:08 +00:00
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boot core is different

0e0066b175/target/linux/airoha/files/arch/arm/mach-econet/ecnt_npu.c (L284-L347)

boot core is different https://sirherobrine23.com.br/airoha_en7523/netgear_exs27/src/commit/0e0066b1750dee9dbbe507c751c8cc3e78826c01/target/linux/airoha/files/arch/arm/mach-econet/ecnt_npu.c#L284-L347
Sirherobrine23 added reference airoha_en7523_eth 2025-12-08 02:46:00 +00:00
Sirherobrine23 added this to the Ethernet milestone 2025-12-08 17:48:21 +00:00
Sirherobrine23 commented 2026-01-19 19:44:25 +00:00
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How problematic could this become when updating to request_firmware_nowait on the NPU?

How problematic could this become when updating to `request_firmware_nowait` on the NPU?
nowait_firmware_load_npu.patch
6.7 KiB
merbanan commented 2026-01-19 22:28:00 +00:00
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No idea. But with NPU support coming to AN7581 we should wait for that to be merged and stable. When that is done the EN7523 driver and integration can use similar infrastructure.

Currently it is not working on the W1700 so it is not mature enough.

No idea. But with NPU support coming to AN7581 we should wait for that to be merged and stable. When that is done the EN7523 driver and integration can use similar infrastructure. Currently it is not working on the W1700 so it is not mature enough.
Sirherobrine23 commented 2026-01-19 22:30:23 +00:00
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I was having trouble using the SDK's memory allocation size, i had to revert to the size specified by the AN7581. The entire system was crashing with the SDK's size

I was having trouble using the SDK's memory allocation size, i had to revert to the size specified by the AN7581. The entire system was crashing with the SDK's size
merbanan commented 2026-01-19 22:33:14 +00:00
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You need to get them from the original firmware. Or use newer NPU bins. I'll add it on my TODO list to figure out the memory areas.

You need to get them from the original firmware. Or use newer NPU bins. I'll add it on my TODO list to figure out the memory areas.
Sirherobrine23 commented 2026-01-19 22:38:44 +00:00
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I'm using the rootfs firmware from the xx230v; I'm not using one from somewhere else that provides it

I'm using the rootfs firmware from the xx230v; I'm not using one from somewhere else that provides it
Sirherobrine23 commented 2026-01-20 20:56:26 +00:00
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i get this npu files from xx230v v1 and xx530v v1

i get this npu files from xx230v v1 and xx530v v1
xx230v_npu_rv32.bin
59 KiB
xx230v_npu_data.bin
728 B
xx530v_v1_npu_data.bin
728 B
xx530v_v1_npu_rv32.bin
58 KiB
Sirherobrine23 commented 2026-01-24 16:07:19 +00:00
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I found this gdma reference in the npu test code:

tplink-xx530v_v1/sdk/en7529/release_bsp/UNION_EN7523_GLIBC_7915_7915_ActiveEthWan_demo/modules/private/NPU/host/npu_host_test.c Lines 98 to 100 in 0932f2c9b3
extern void SET_GDMA_CONFIG(u32 channel, u32 sa, u32 da, u32 ct0, u32 ct1);
extern u32 IS_GDMA_DONE(u32 channel);
extern void CLEAR_GDMA_DONE(u32 channel);

tplink-xx530v_v1/sdk/en7529/release_bsp/UNION_EN7523_GLIBC_7915_7915_ActiveEthWan_demo/modules/private/NPU/host/npu_host_test.c Lines 735 to 752 in 0932f2c9b3
/* configure and enable GDMA */
SET_GDMA_CONFIG(0, dram_phy_addr, l2cSram_pbus_phy_addr, ((L2C_SRAM_CPU_TEST_SIZE&0xffff)<<16)|(1<<3)|(1<<1)|(1<<0), 0x4);
/* wait until GDMA is done */
while(!IS_GDMA_DONE(0));
CLEAR_GDMA_DONE(0); /* clear done bit */
if (l2c_sram_read_test(L2C_SRAM_CPU_TEST_OFF, L2C_SRAM_CPU_TEST_SIZE, tmpWord)==-1){
printk("\n[H] ERROR: l2c_sram gdma test failed on round %x\n", testCnt);
goto err_handle;
}
l2c_sram_write_test(L2C_SRAM_CPU_TEST_OFF,L2C_SRAM_CPU_TEST_SIZE, tmpWord);
/* configure and enable GDMA */
SET_GDMA_CONFIG(0, l2cSram_pbus_phy_addr, dram_phy_addr, ((L2C_SRAM_CPU_TEST_SIZE&0xffff)<<16)|(1<<3)|(1<<1)|(1<<0), 0x4);
/* wait until GDMA is done */
while(!IS_GDMA_DONE(0));
CLEAR_GDMA_DONE(0); /* clear done bit */

4d76b59039/sdk/en7529/bootloader/Uboot/u-boot-2014.04-rc1/arch/arm/cpu/armv7/en7523/cpu_bus_test.c

I found this gdma reference in the npu test code: https://sirherobrine23.com.br/tplink_gpl/tplink-xx530v_v1/src/commit/0932f2c9b3e2f753d161f147e60fc59c0866a9ee/sdk/en7529/release_bsp/UNION_EN7523_GLIBC_7915_7915_ActiveEthWan_demo/modules/private/NPU/host/npu_host_test.c#L98-L100 https://sirherobrine23.com.br/tplink_gpl/tplink-xx530v_v1/src/commit/0932f2c9b3e2f753d161f147e60fc59c0866a9ee/sdk/en7529/release_bsp/UNION_EN7523_GLIBC_7915_7915_ActiveEthWan_demo/modules/private/NPU/host/npu_host_test.c#L735-L752 https://sirherobrine23.com.br/tplink_gpl/tplink-xx230v/src/commit/4d76b590398d1e510a2a893f6fc4c69bfedb5768/sdk/en7529/bootloader/Uboot/u-boot-2014.04-rc1/arch/arm/cpu/armv7/en7523/cpu_bus_test.c
merbanan commented 2026-01-24 18:00:37 +00:00
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The Generic DMA controller (and most of the hardware) can address the NPU sram.

The referenced code is basically a fast (uncached) memcpy.

The Generic DMA controller (and most of the hardware) can address the NPU sram. The referenced code is basically a fast (uncached) memcpy.
merbanan commented 2026-03-02 19:41:37 +00:00
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The NPU cores are of these configurations:

RISCV_ARCH := rv32imac
RISCV_ABI := ilp32

The NPU cores are of these configurations: RISCV_ARCH := rv32imac RISCV_ABI := ilp32
merbanan commented 2026-03-02 19:46:53 +00:00
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The cores have access to 2 sram blocks:

npu_384k_sram : ORIGIN = 0x1e800000, LENGTH = 0x00060000
npu_16k_sram : ORIGIN = 0x1e900000, LENGTH = 0x00004000

The 384k block is used for read-only code and data and the 16k block is for rw data (heap etc).

The cores have access to 2 sram blocks: npu_384k_sram : ORIGIN = 0x1e800000, LENGTH = 0x00060000 npu_16k_sram : ORIGIN = 0x1e900000, LENGTH = 0x00004000 The 384k block is used for read-only code and data and the 16k block is for rw data (heap etc).
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Gemnon (Csaba) Guilherme-Bember-Duarte (Guilherme Bember Duarte) kvn193 (Kevin Garcia) lilmayofuksu (ayy lmao) merbanan (Benjamin Larsson) mkshevetskiy (Mikhail Kshevetskiy) raphaelgz (Raphael Gozzo) Rondom (Andreas Gnau) Sirherobrine23 (Matheus Sampaio Queiroga)
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Reference: airoha_en7523/kernel#15