mirror of
https://github.com/jclehner/bcm3390.git
synced 2025-01-31 00:31:35 +00:00
51 lines
1.4 KiB
Plaintext
51 lines
1.4 KiB
Plaintext
/dts-v1/;
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/ {
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model = "Broadcom CM (3390b0)";
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compatible = "brcm,bcm3390b0", "brcm,brcmstb";
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subsystem = "rg";
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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interrupt-parent = <0x1>;
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identifier {
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/* register offset */
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chipid_reg = < 0x20404000 >;
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chipid_msk = < 0xffffffff >;
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chipid_val = < 0x33900010 >;
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boardid_msk = < 0xf0 0xf0 0xf0 >;
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boardid_val = < 0x20 0x30 0x70 >;
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};
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};
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/include/ "rg.c7800-3390b0-bolt.dtsi"
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/include/ "rg.c7800-3390-base.dtsi"
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/include/ "rg.c7800-3390b0-moca.dtsi"
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/include/ "rg.c7800-3390-wifi.dtsi"
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/include/ "rg.c7800-3390-ethwan.dtsi"
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/********************************************************************
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* any nodes that appear below are platform specific additions and
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* replacements.
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* The dtc will add or replace any properties in the nodes
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* below to the same nodes that appear in include files above.
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* If the property does not exist in the node above it will be added.
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* If the property does exist it will replace it.
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********************************************************************/
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&suntop_pmx {
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pinctrl-0 = <ðwan_pins>;
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};
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&switch_mdio {
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ethwan_phy: phy@0 { /* external bcm54210 */
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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};
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&pcie2 {
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supply-names = "vreg-wifi-pwr", "vreg-wifi-rf-pwr";
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vreg-wifi-pwr-supply = <&vreg_wifi_pwr>;
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vreg-wifi-rf-pwr-supply = <&vreg_wifi_rf_pwr>;
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};
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