mirror of
https://github.com/jclehner/bcm3390.git
synced 2025-01-31 00:31:35 +00:00
82 lines
2.8 KiB
Plaintext
Executable File
82 lines
2.8 KiB
Plaintext
Executable File
/dts-v1/;
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/ {
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model = "Broadcom CM (3390a2)";
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compatible = "brcm,bcm3390a0", "brcm,brcmstb";
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subsystem = "rg";
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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interrupt-parent = <0x1>;
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identifier {
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/* register offset */
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chipid_reg = < 0x20404000 0x204e6120 >;
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chipid_msk = < 0xffffffff 0x0000e000 >;
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chipid_val = < 0x33900000 0x0000e000 >;
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boardid_msk = < 0xf0 >;
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boardid_val = < 0x10 >;
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};
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};
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/include/ "rg.3390a0-bolt.dtsi"
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/include/ "rg.3390-base.dtsi"
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/include/ "rg.3390a2-moca.dtsi"
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/include/ "rg.3390-wifi.dtsi"
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/include/ "rg.3390-ethwan.dtsi"
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/********************************************************************
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* any nodes that appear below are platform specific additions and
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* replacements.
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* The dtc will add or replace any properties in the nodes
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* below to the same nodes that appear in include files above.
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* If the property does not exist in the node above it will be added.
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* If the property does exist it will replace it.
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********************************************************************/
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&switch_mdio {
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ethwan_phy: phy@1 { /* external bcm54210 */
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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&suntop_pmx {
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pinctrl-0 = <ðwan_pins>;
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ethwan_pins: ethwan_pins {
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pinctrl-single,bits = <
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0x000 0x00000020 0x00000000 /* RGMII1 pad amp <-- disable */
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0x000 0x00000010 0x00000000 /* RGMII1 pad sel gmii <-- HV CMOS/RGMII25 */
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0x000 0x00000008 0x00000008 /* RGMII1 pad modehv <-- HV CMOS/RGMII25/GMII33 */
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0x000 0x00000007 0x00000007 /* RGMII1 pad sel <-- DRIVE_16MA */
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0x060 0xf0000000 0x10000000 /* gpio_000 <-- RGMII1_RX_CLK */
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0x064 0x0000000f 0x00000001 /* gpio_001 <-- MII_TXEN_RGMII1_TXCTL */
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0x064 0x000000f0 0x00000010 /* gpio_002 <-- RGMII1_RXD_00 */
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0x064 0x00000f00 0x00000100 /* gpio_003 <-- RGMII1_RXD_01 */
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0x064 0x0000f000 0x00001000 /* gpio_004 <-- RGMII1_RXD_02 */
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0x064 0x000f0000 0x00010000 /* gpio_005 <-- RGMII1_RXD_03 */
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0x064 0x00f00000 0x00100000 /* gpio_006 <-- RGMII1_TX_CLK */
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0x064 0x0f000000 0x01000000 /* gpio_007 <-- MII_RXEN_RGMII1_RXCTL */
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0x064 0xf0000000 0x10000000 /* gpio_008 <-- RGMII1_TXD_00 */
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0x068 0x0000000f 0x00000001 /* gpio_009 <-- RGMII1_TXD_01 */
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0x068 0x000000f0 0x00000010 /* gpio_010 <-- RGMII1_TXD_02 */
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0x068 0x00000f00 0x00000100 /* gpio_011 <-- RGMII1_TXD_03 */
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0x068 0x0000f000 0x00001000 /* gpio_012 <-- RGMII1_MDIO */
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0x068 0x000f0000 0x00010000 /* gpio_013 <-- RGMII1_MDC */
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0x08c 0x000f0000 0x00040000 /* gpio_085 <-- RGMII1_START_STOP */
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0x08c 0x00f00000 0x00400000 /* gpio_086 <-- RGMII1_RX_OK */
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>;
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};
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};
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&vreg_wifi_pwr {
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gpio = <&upg_gpio 80 0>;
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};
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&vreg_wifi_rf_pwr {
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gpio = <&upg_gpio 79 0>;
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};
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&dqm {
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fpm-alloc-offset = <0x1df0 0x1df0 0x1df0>; /* bug in Ax requires write to prior reg */
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qsm-size = <0x3000>;
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};
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