forked from Openwrt-EcoNet/openwrt
19d5619479
Add STM32MP157C-DK2 support. This profile also supports the STM32MP157F-DK2 board. The only difference between these two boards is the CPU frequency (650MHz for 157C and 800MHz for 157F). A SCMI variant is available. With this variant the reset and clock resources are provided by OP-TEE and the associated SCMI services. It is the configuration recommended by STMicroelectronics, with secured system resources. The specifications bellow only list supported features. Specifications -------------- SOC: STM32MP157C RAM: 512 MiB Storage: SD Card Ethernet: 1x 1 Gbps Wireless: 2.4GHz Cypress CYW43455 (802.11b/g/n) LEDs: Heartbeat (Blue) USB: 4x 2.0 Type-A Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Link: https://github.com/openwrt/openwrt/pull/18119 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
59 lines
1.6 KiB
Diff
59 lines
1.6 KiB
Diff
From b255afeeb33efaa974b1b2454b1f58252d783b67 Mon Sep 17 00:00:00 2001
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From: Christophe Roullier <christophe.roullier@foss.st.com>
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Date: Mon, 10 Jun 2024 10:03:09 +0200
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Subject: [PATCH 5/5] ARM: dts: stm32: add ethernet1 for STM32MP135F-DK board
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Ethernet1: RMII with crystal
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Ethernet2: RMII with no cristal, need "phy-supply" property to work,
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today this property was managed by Ethernet glue, but should be present
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and managed in PHY node. So I will push second Ethernet in next step.
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PHYs used are SMSC (LAN8742A)
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Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
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Reviewed-by: Marek Vasut <marex@denx.de>
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Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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---
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arch/arm/boot/dts/st/stm32mp135f-dk.dts | 23 +++++++++++++++++++++++
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1 file changed, 23 insertions(+)
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--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
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+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
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@@ -19,6 +19,7 @@
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compatible = "st,stm32mp135f-dk", "st,stm32mp135";
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aliases {
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+ ethernet0 = ðernet1;
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serial0 = &uart4;
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serial1 = &usart1;
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serial2 = &uart8;
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@@ -92,6 +93,28 @@
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};
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};
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};
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+
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+ðernet1 {
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+ status = "okay";
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+ pinctrl-0 = <ð1_rmii_pins_a>;
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+ pinctrl-1 = <ð1_rmii_sleep_pins_a>;
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+ pinctrl-names = "default", "sleep";
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+ phy-mode = "rmii";
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+ phy-handle = <&phy0_eth1>;
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+
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+ mdio {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "snps,dwmac-mdio";
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+
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+ phy0_eth1: ethernet-phy@0 {
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+ compatible = "ethernet-phy-id0007.c131";
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+ reg = <0>;
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+ reset-gpios = <&mcp23017 9 GPIO_ACTIVE_LOW>;
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+ wakeup-source;
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+ };
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+ };
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+};
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&i2c1 {
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pinctrl-names = "default", "sleep";
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