forked from Openwrt-EcoNet/openwrt
19d5619479
Add STM32MP157C-DK2 support. This profile also supports the STM32MP157F-DK2 board. The only difference between these two boards is the CPU frequency (650MHz for 157C and 800MHz for 157F). A SCMI variant is available. With this variant the reset and clock resources are provided by OP-TEE and the associated SCMI services. It is the configuration recommended by STMicroelectronics, with secured system resources. The specifications bellow only list supported features. Specifications -------------- SOC: STM32MP157C RAM: 512 MiB Storage: SD Card Ethernet: 1x 1 Gbps Wireless: 2.4GHz Cypress CYW43455 (802.11b/g/n) LEDs: Heartbeat (Blue) USB: 4x 2.0 Type-A Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Link: https://github.com/openwrt/openwrt/pull/18119 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
33 lines
1.3 KiB
Diff
33 lines
1.3 KiB
Diff
From 3cd1d4651cebe9776a0142ade36ff9f2e3545436 Mon Sep 17 00:00:00 2001
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From: Christophe Roullier <christophe.roullier@foss.st.com>
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Date: Mon, 1 Jul 2024 08:48:37 +0200
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Subject: [PATCH] net: stmmac: dwmac-stm32: Add test to verify if ETHCK is used
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before checking clk rate
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When we want to use clock from RCC to clock Ethernet PHY (with ETHCK)
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we need to check if value of clock rate is authorized.
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If ETHCK is unused, the ETHCK frequency is 0Hz and validation fails.
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It makes no sense to validate unused ETHCK, so skip the validation.
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Fixes: 582ac134963e ("net: stmmac: dwmac-stm32: Separate out external clock rate validation")
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Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
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Reviewed-by: Marek Vasut <marex@denx.de>
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Tested-by: Mark Brown <broonie@kernel.org>
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 3 +++
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1 file changed, 3 insertions(+)
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--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
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@@ -195,6 +195,9 @@ static int stm32mp1_validate_ethck_rate(
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struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
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const u32 clk_rate = clk_get_rate(dwmac->clk_eth_ck);
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+ if (!dwmac->enable_eth_ck)
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+ return 0;
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+
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switch (plat_dat->mac_interface) {
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case PHY_INTERFACE_MODE_MII:
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case PHY_INTERFACE_MODE_GMII:
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