forked from Openwrt-EcoNet/openwrt
22dc34e8c1
The PCS driver in the 6.12 patchset is the v5 submission (see link below). It solves a number of issues and crashes with teh pcs driver from the 6.6 patchset. However, this new driver is missing support for "10gbase-r", "10g-qxgmii", and 1000/2500base-x modes. Port these modes to the 6.12 patchset. "2500base-x" in particular seems to be needed to establish a 2.5G link on phy-mode="usxgmii"; Link: https://lore.kernel.org/lkml/20250207-ipq_pcs_6-14_rc1-v5-0-be2ebec32921@quicinc.com/ Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Link: https://github.com/openwrt/openwrt/pull/18796 Signed-off-by: Robert Marko <robimarko@gmail.com>
92 lines
3.2 KiB
Diff
92 lines
3.2 KiB
Diff
From 07f9bb8eb006e9664d651089a1f422d045e093e3 Mon Sep 17 00:00:00 2001
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From: Lei Wei <quic_leiwei@quicinc.com>
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Date: Tue, 9 Apr 2024 01:07:22 +0800
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Subject: [PATCH] net: pcs: Add 1000BASEX interface mode support to IPQ UNIPHY
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PCS driver
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1000BASEX is used when PCS connects with a 1G SFP module.
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Change-Id: Ied7298de3c1ecba74e6457a07fdd6b3ceab79728
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Signed-off-by: Lei Wei <quic_leiwei@quicinc.com>
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Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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---
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drivers/net/pcs/pcs-qcom-ipq9574.c | 18 ++++++++++++++++--
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1 file changed, 16 insertions(+), 2 deletions(-)
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--- a/drivers/net/pcs/pcs-qcom-ipq9574.c
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+++ b/drivers/net/pcs/pcs-qcom-ipq9574.c
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@@ -31,6 +31,9 @@
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#define PCS_MODE_PSGMII FIELD_PREP(PCS_MODE_SEL_MASK, 0x2)
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#define PCS_MODE_SGMII_PLUS FIELD_PREP(PCS_MODE_SEL_MASK, 0x8)
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#define PCS_MODE_XPCS FIELD_PREP(PCS_MODE_SEL_MASK, 0x10)
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+#define PCS_MODE_SGMII_CTRL_MASK GENMASK(6, 4)
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+#define PCS_MODE_SGMII_CTRL_1000BASEX FIELD_PREP(PCS_MODE_SGMII_CTRL_MASK, \
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+ 0x0)
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#define PCS_MII_CTRL(x) (0x480 + 0x18 * (x))
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#define PCS_MII_ADPT_RESET BIT(11)
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@@ -283,7 +286,7 @@ static int ipq_pcs_config_mode(struct ip
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phy_interface_t interface)
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{
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unsigned long rate = 125000000;
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- unsigned int val;
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+ unsigned int val, mask = PCS_MODE_SEL_MASK;
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int ret;
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/* Assert XPCS reset */
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@@ -297,6 +300,10 @@ static int ipq_pcs_config_mode(struct ip
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case PHY_INTERFACE_MODE_QSGMII:
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val = PCS_MODE_QSGMII;
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break;
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+ case PHY_INTERFACE_MODE_1000BASEX:
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+ mask |= PCS_MODE_SGMII_CTRL_MASK;
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+ val = PCS_MODE_SGMII | PCS_MODE_SGMII_CTRL_1000BASEX;
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+ break;
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case PHY_INTERFACE_MODE_2500BASEX:
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val = PCS_MODE_SGMII_PLUS;
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rate = 312500000;
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@@ -316,7 +323,7 @@ static int ipq_pcs_config_mode(struct ip
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}
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ret = regmap_update_bits(qpcs->regmap, PCS_MODE_CTRL,
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- PCS_MODE_SEL_MASK, val);
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+ mask, val);
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if (ret)
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return ret;
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@@ -523,6 +530,7 @@ ipq_unipcs_link_up_clock_rate_set(struct
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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case PHY_INTERFACE_MODE_PSGMII:
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+ case PHY_INTERFACE_MODE_1000BASEX:
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rate = ipq_unipcs_clock_rate_get_gmii(speed);
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break;
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case PHY_INTERFACE_MODE_2500BASEX:
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@@ -729,6 +737,10 @@ static void ipq_pcs_get_state(struct phy
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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case PHY_INTERFACE_MODE_PSGMII:
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+ case PHY_INTERFACE_MODE_1000BASEX:
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+ /* SGMII and 1000BASEX in-band autoneg word format are decoded
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+ * by PCS hardware and both placed to the same status register.
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+ */
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ipq_pcs_get_state_sgmii(qpcs, index, state);
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break;
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case PHY_INTERFACE_MODE_2500BASEX:
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@@ -766,6 +778,7 @@ static int ipq_pcs_config(struct phylink
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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case PHY_INTERFACE_MODE_PSGMII:
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+ case PHY_INTERFACE_MODE_1000BASEX:
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return ipq_pcs_config_sgmii(qpcs, index, neg_mode, interface);
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case PHY_INTERFACE_MODE_2500BASEX:
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return ipq_unipcs_config_2500basex(qpcs, interface);
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@@ -798,6 +811,7 @@ static void ipq_pcs_link_up(struct phyli
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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case PHY_INTERFACE_MODE_PSGMII:
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+ case PHY_INTERFACE_MODE_1000BASEX:
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ret = ipq_pcs_link_up_config_sgmii(qpcs, index,
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neg_mode, speed);
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break;
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