forked from Openwrt-EcoNet/openwrt
22dc34e8c1
The PCS driver in the 6.12 patchset is the v5 submission (see link below). It solves a number of issues and crashes with teh pcs driver from the 6.6 patchset. However, this new driver is missing support for "10gbase-r", "10g-qxgmii", and 1000/2500base-x modes. Port these modes to the 6.12 patchset. "2500base-x" in particular seems to be needed to establish a 2.5G link on phy-mode="usxgmii"; Link: https://lore.kernel.org/lkml/20250207-ipq_pcs_6-14_rc1-v5-0-be2ebec32921@quicinc.com/ Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Link: https://github.com/openwrt/openwrt/pull/18796 Signed-off-by: Robert Marko <robimarko@gmail.com>
193 lines
5.5 KiB
Diff
193 lines
5.5 KiB
Diff
From a2e687df29e457621616d5d769688e6c972f9ac6 Mon Sep 17 00:00:00 2001
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From: Lei Wei <quic_leiwei@quicinc.com>
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Date: Tue, 2 Apr 2024 18:28:42 +0800
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Subject: [PATCH] net: pcs: Add 2500BASEX interface mode support to IPQ UNIPHY
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PCS driver
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2500BASEX mode is used when PCS connects with QCA8386 switch in a fixed
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2500M link. It is also used when PCS connectes with QCA8081 PHY which
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works at 2500M link speed. In addition, it can be also used when PCS
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connects with a 2.5G SFP module.
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Change-Id: I3fe61113c1b3685debc20659736a9488216a029d
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Signed-off-by: Lei Wei <quic_leiwei@quicinc.com>
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Alex G: use regmap to read/write registers
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Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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---
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drivers/net/pcs/pcs-qcom-ipq9574.c | 94 ++++++++++++++++++++++++++++++
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1 file changed, 94 insertions(+)
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--- a/drivers/net/pcs/pcs-qcom-ipq9574.c
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+++ b/drivers/net/pcs/pcs-qcom-ipq9574.c
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@@ -29,6 +29,7 @@
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#define PCS_MODE_SGMII FIELD_PREP(PCS_MODE_SEL_MASK, 0x4)
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#define PCS_MODE_QSGMII FIELD_PREP(PCS_MODE_SEL_MASK, 0x1)
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#define PCS_MODE_PSGMII FIELD_PREP(PCS_MODE_SEL_MASK, 0x2)
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+#define PCS_MODE_SGMII_PLUS FIELD_PREP(PCS_MODE_SEL_MASK, 0x8)
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#define PCS_MODE_XPCS FIELD_PREP(PCS_MODE_SEL_MASK, 0x10)
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#define PCS_MII_CTRL(x) (0x480 + 0x18 * (x))
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@@ -188,6 +189,30 @@ static void ipq_pcs_get_state_sgmii(stru
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state->pause |= MLO_PAUSE_RX;
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}
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+static void ipq_unipcs_get_state_2500basex(struct ipq_pcs *qpcs,
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+ int index,
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+ struct phylink_link_state *state)
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+{
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+ unsigned int val;
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+ int ret;
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+
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+ ret = regmap_read(qpcs->regmap, PCS_MII_STS(index), &val);
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+ if (ret) {
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+ state->link = 0;
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+ return;
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+ }
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+
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+
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+ state->link = !!(val & PCS_MII_LINK_STS);
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+
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+ if (!state->link)
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+ return;
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+
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+ state->speed = SPEED_2500;
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+ state->duplex = DUPLEX_FULL;
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+ state->pause |= MLO_PAUSE_TXRX_MASK;
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+}
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+
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static void ipq_pcs_get_state_usxgmii(struct ipq_pcs *qpcs,
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struct phylink_link_state *state)
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{
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@@ -272,6 +297,10 @@ static int ipq_pcs_config_mode(struct ip
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case PHY_INTERFACE_MODE_QSGMII:
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val = PCS_MODE_QSGMII;
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break;
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+ case PHY_INTERFACE_MODE_2500BASEX:
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+ val = PCS_MODE_SGMII_PLUS;
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+ rate = 312500000;
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+ break;
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case PHY_INTERFACE_MODE_PSGMII:
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val = PCS_MODE_PSGMII;
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break;
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@@ -355,6 +384,22 @@ static int ipq_pcs_config_sgmii(struct i
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PCS_MII_CTRL(index), PCS_MII_FORCE_MODE);
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}
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+static int ipq_unipcs_config_2500basex(struct ipq_pcs *qpcs,
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+ phy_interface_t interface)
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+{
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+ int ret;
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+
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+ if (qpcs->interface != interface) {
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+ ret = ipq_pcs_config_mode(qpcs, interface);
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+ if (ret)
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+ return ret;
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+
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+ qpcs->interface = interface;
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+ }
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+
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+ return 0;
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+}
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+
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static int ipq_pcs_config_usxgmii(struct ipq_pcs *qpcs)
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{
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int ret;
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@@ -421,6 +466,21 @@ static unsigned long ipq_unipcs_clock_ra
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return rate;
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}
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+static unsigned long ipq_unipcs_clock_rate_get_gmiiplus(int speed)
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+{
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+ unsigned long rate = 0;
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+
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+ switch (speed) {
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+ case SPEED_2500:
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+ rate = 312500000;
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+ break;
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+ default:
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+ break;
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+ }
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+
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+ return rate;
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+}
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+
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static unsigned long ipq_unipcs_clock_rate_get_xgmii(int speed)
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{
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unsigned long rate = 0;
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@@ -465,6 +525,9 @@ ipq_unipcs_link_up_clock_rate_set(struct
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case PHY_INTERFACE_MODE_PSGMII:
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rate = ipq_unipcs_clock_rate_get_gmii(speed);
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break;
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+ case PHY_INTERFACE_MODE_2500BASEX:
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+ rate = ipq_unipcs_clock_rate_get_gmiiplus(speed);
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+ break;
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case PHY_INTERFACE_MODE_USXGMII:
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case PHY_INTERFACE_MODE_10GBASER:
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rate = ipq_unipcs_clock_rate_get_xgmii(speed);
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@@ -528,6 +591,25 @@ static int ipq_pcs_link_up_config_sgmii(
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PCS_MII_CTRL(index), PCS_MII_ADPT_RESET);
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}
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+static int ipq_unipcs_link_up_config_2500basex(struct ipq_pcs *qpcs,
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+ int index,
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+ int speed)
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+{
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+ unsigned int val;
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+ int ret;
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+
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+ /* 2500BASEX do not support autoneg and do not need to
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+ * configure PCS speed, only reset PCS adapter here.
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+ */
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+ ret = regmap_clear_bits(qpcs->regmap,
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+ PCS_MII_CTRL(index), PCS_MII_ADPT_RESET);
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+ if (ret)
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+ return ret;
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+
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+ return regmap_set_bits(qpcs->regmap,
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+ PCS_MII_CTRL(index), PCS_MII_ADPT_RESET);
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+}
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+
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static int ipq_pcs_link_up_config_usxgmii(struct ipq_pcs *qpcs, int speed)
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{
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unsigned int val;
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@@ -575,6 +657,10 @@ static int ipq_pcs_validate(struct phyli
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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return 0;
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+ case PHY_INTERFACE_MODE_2500BASEX:
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+ /* In-band autoneg is not supported for 2500BASEX */
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+ phylink_clear(supported, Autoneg);
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+ return 0;
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case PHY_INTERFACE_MODE_USXGMII:
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/* USXGMII only supports full duplex mode */
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phylink_clear(supported, 100baseT_Half);
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@@ -645,6 +731,9 @@ static void ipq_pcs_get_state(struct phy
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case PHY_INTERFACE_MODE_PSGMII:
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ipq_pcs_get_state_sgmii(qpcs, index, state);
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break;
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+ case PHY_INTERFACE_MODE_2500BASEX:
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+ ipq_unipcs_get_state_2500basex(qpcs, index, state);
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+ break;
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case PHY_INTERFACE_MODE_USXGMII:
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ipq_pcs_get_state_usxgmii(qpcs, state);
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break;
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@@ -678,6 +767,8 @@ static int ipq_pcs_config(struct phylink
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case PHY_INTERFACE_MODE_QSGMII:
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case PHY_INTERFACE_MODE_PSGMII:
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return ipq_pcs_config_sgmii(qpcs, index, neg_mode, interface);
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+ case PHY_INTERFACE_MODE_2500BASEX:
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+ return ipq_unipcs_config_2500basex(qpcs, interface);
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case PHY_INTERFACE_MODE_USXGMII:
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return ipq_pcs_config_usxgmii(qpcs);
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case PHY_INTERFACE_MODE_10GBASER:
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@@ -710,6 +801,9 @@ static void ipq_pcs_link_up(struct phyli
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ret = ipq_pcs_link_up_config_sgmii(qpcs, index,
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neg_mode, speed);
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break;
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+ case PHY_INTERFACE_MODE_2500BASEX:
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+ ret = ipq_unipcs_link_up_config_2500basex(qpcs, index, speed);
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+ break;
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case PHY_INTERFACE_MODE_USXGMII:
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ret = ipq_pcs_link_up_config_usxgmii(qpcs, speed);
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break;
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