forked from Openwrt-EcoNet/openwrt
f3fc278fcb
Add the second part of the PPE driver. This includes the EDMA and network device support. This part does not appear to have been officially submitted for upstream review. The series is taken from target/linux/qualcommbe/patches-6.6, and had to be heavily modified in order to compile of v6.12. Changes to patches are noted in the respective patch body. Also add the PPE and EDMA nodes in this series. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Link: https://github.com/openwrt/openwrt/pull/18796 Signed-off-by: Robert Marko <robimarko@gmail.com>
202 lines
7.1 KiB
Diff
202 lines
7.1 KiB
Diff
From 93cf3297818ee61607f0a8d1d34e4fb7fcde3cdf Mon Sep 17 00:00:00 2001
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From: Luo Jie <quic_luoj@quicinc.com>
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Date: Tue, 26 Dec 2023 20:18:09 +0800
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Subject: [PATCH] net: ethernet: qualcomm: Add PPE scheduler config
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PPE scheduler config determines the priority of scheduling the
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packet. The scheduler config is used for supporting the QoS
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offload in PPE hardware.
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Change-Id: I4811bd133074757371775a6a69a1cc3cfaa8d0d0
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Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
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Alex G: rebase patch on top of PPE driver submission from 20250209.
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Add the ppe_queue_priority_set() function and its
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dependencies. They will be used in the edma support in
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susequent changes.
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ppe_queue_priority_set() used to be part of ppe_api.c, and
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is hereby moved to ppe_config.c .
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Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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---
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.../net/ethernet/qualcomm/ppe/ppe_config.c | 141 ++++++++++++++++++
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.../net/ethernet/qualcomm/ppe/ppe_config.h | 5 +
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2 files changed, 146 insertions(+)
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--- a/drivers/net/ethernet/qualcomm/ppe/ppe_config.c
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+++ b/drivers/net/ethernet/qualcomm/ppe/ppe_config.c
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@@ -864,6 +864,51 @@ static int ppe_scheduler_l0_queue_map_se
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val);
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}
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+/* Get the first level scheduler configuration. */
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+static int ppe_scheduler_l0_queue_map_get(struct ppe_device *ppe_dev,
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+ int node_id, int *port,
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+ struct ppe_scheduler_cfg *scheduler_cfg)
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+{
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+ u32 val, reg;
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+ int ret;
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+
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+ reg = PPE_L0_FLOW_MAP_TBL_ADDR + node_id * PPE_L0_FLOW_MAP_TBL_INC;
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+ ret = regmap_read(ppe_dev->regmap, reg, &val);
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+ if (ret)
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+ return ret;
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+
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+ scheduler_cfg->flow_id = FIELD_GET(PPE_L0_FLOW_MAP_TBL_FLOW_ID, val);
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+ scheduler_cfg->pri = FIELD_GET(PPE_L0_FLOW_MAP_TBL_C_PRI, val);
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+ scheduler_cfg->drr_node_wt = FIELD_GET(PPE_L0_FLOW_MAP_TBL_C_NODE_WT, val);
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+
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+ reg = PPE_L0_C_FLOW_CFG_TBL_ADDR +
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+ (scheduler_cfg->flow_id * PPE_QUEUE_SCH_PRI_NUM + scheduler_cfg->pri) *
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+ PPE_L0_C_FLOW_CFG_TBL_INC;
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+
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+ ret = regmap_read(ppe_dev->regmap, reg, &val);
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+ if (ret)
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+ return ret;
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+
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+ scheduler_cfg->drr_node_id = FIELD_GET(PPE_L0_C_FLOW_CFG_TBL_NODE_ID, val);
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+ scheduler_cfg->unit_is_packet = FIELD_GET(PPE_L0_C_FLOW_CFG_TBL_NODE_CREDIT_UNIT, val);
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+
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+ reg = PPE_L0_FLOW_PORT_MAP_TBL_ADDR + node_id * PPE_L0_FLOW_PORT_MAP_TBL_INC;
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+ ret = regmap_read(ppe_dev->regmap, reg, &val);
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+ if (ret)
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+ return ret;
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+
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+ *port = FIELD_GET(PPE_L0_FLOW_PORT_MAP_TBL_PORT_NUM, val);
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+
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+ reg = PPE_L0_COMP_CFG_TBL_ADDR + node_id * PPE_L0_COMP_CFG_TBL_INC;
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+ ret = regmap_read(ppe_dev->regmap, reg, &val);
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+ if (ret)
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+ return ret;
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+
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+ scheduler_cfg->frame_mode = FIELD_GET(PPE_L0_COMP_CFG_TBL_NODE_METER_LEN, val);
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+
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+ return 0;
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+}
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+
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/* Set the PPE flow level scheduler configuration. */
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static int ppe_scheduler_l1_queue_map_set(struct ppe_device *ppe_dev,
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int node_id, int port,
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@@ -916,6 +961,50 @@ static int ppe_scheduler_l1_queue_map_se
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return regmap_update_bits(ppe_dev->regmap, reg, PPE_L1_COMP_CFG_TBL_NODE_METER_LEN, val);
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}
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+/* Get the second level scheduler configuration. */
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+static int ppe_scheduler_l1_queue_map_get(struct ppe_device *ppe_dev,
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+ int node_id, int *port,
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+ struct ppe_scheduler_cfg *scheduler_cfg)
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+{
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+ u32 val, reg;
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+ int ret;
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+
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+ reg = PPE_L1_FLOW_MAP_TBL_ADDR + node_id * PPE_L1_FLOW_MAP_TBL_INC;
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+ ret = regmap_read(ppe_dev->regmap, reg, &val);
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+ if (ret)
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+ return ret;
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+
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+ scheduler_cfg->flow_id = FIELD_GET(PPE_L1_FLOW_MAP_TBL_FLOW_ID, val);
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+ scheduler_cfg->pri = FIELD_GET(PPE_L1_FLOW_MAP_TBL_C_PRI, val);
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+ scheduler_cfg->drr_node_wt = FIELD_GET(PPE_L1_FLOW_MAP_TBL_C_NODE_WT, val);
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+
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+ reg = PPE_L1_C_FLOW_CFG_TBL_ADDR +
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+ (scheduler_cfg->flow_id * PPE_QUEUE_SCH_PRI_NUM + scheduler_cfg->pri) *
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+ PPE_L1_C_FLOW_CFG_TBL_INC;
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+ ret = regmap_read(ppe_dev->regmap, reg, &val);
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+ if (ret)
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+ return ret;
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+
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+ scheduler_cfg->drr_node_id = FIELD_GET(PPE_L1_C_FLOW_CFG_TBL_NODE_ID, val);
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+ scheduler_cfg->unit_is_packet = FIELD_GET(PPE_L1_C_FLOW_CFG_TBL_NODE_CREDIT_UNIT, val);
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+
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+ reg = PPE_L1_FLOW_PORT_MAP_TBL_ADDR + node_id * PPE_L1_FLOW_PORT_MAP_TBL_INC;
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+ ret = regmap_read(ppe_dev->regmap, reg, &val);
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+ if (ret)
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+ return ret;
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+
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+ *port = FIELD_GET(PPE_L1_FLOW_PORT_MAP_TBL_PORT_NUM, val);
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+
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+ reg = PPE_L1_COMP_CFG_TBL_ADDR + node_id * PPE_L1_COMP_CFG_TBL_INC;
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+ ret = regmap_read(ppe_dev->regmap, reg, &val);
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+ if (ret)
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+ return ret;
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+
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+ scheduler_cfg->frame_mode = FIELD_GET(PPE_L1_COMP_CFG_TBL_NODE_METER_LEN, val);
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+
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+ return 0;
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+}
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+
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/**
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* ppe_queue_scheduler_set - Configure scheduler for PPE hardware queue
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* @ppe_dev: PPE device
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@@ -942,6 +1031,58 @@ int ppe_queue_scheduler_set(struct ppe_d
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}
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/**
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+ * ppe_queue_scheduler_get - get QoS scheduler of PPE hardware queue
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+ * @ppe_dev: PPE device
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+ * @node_id: PPE node ID
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+ * @flow_level: Flow level scheduler or queue level scheduler
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+ * @port: PPE port ID to get scheduler config
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+ * @scheduler_cfg: QoS scheduler configuration
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+ *
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+ * The hardware QoS function is supported by PPE, the current scheduler
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+ * configuration can be acquired based on the queue ID of PPE port.
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+ *
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+ * Return 0 on success, negative error code on failure.
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+ */
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+int ppe_queue_scheduler_get(struct ppe_device *ppe_dev,
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+ int node_id, bool flow_level, int *port,
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+ struct ppe_scheduler_cfg *scheduler_cfg)
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+{
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+ if (flow_level)
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+ return ppe_scheduler_l1_queue_map_get(ppe_dev, node_id,
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+ port, scheduler_cfg);
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+
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+ return ppe_scheduler_l0_queue_map_get(ppe_dev, node_id,
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+ port, scheduler_cfg);
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+}
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+
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+
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+/**
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+ * ppe_queue_priority_set - set scheduler priority of PPE hardware queue
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+ * @ppe_dev: PPE device
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+ * @node_id: PPE hardware node ID, which is either queue ID or flow ID
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+ * @priority: Qos scheduler priority
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+ *
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+ * Configure scheduler priority of PPE hardware queque, the maximum node
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+ * ID supported is PPE_QUEUE_ID_NUM added by PPE_FLOW_ID_NUM, queue ID
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+ * belongs to level 0, flow ID belongs to level 1 in the packet pipeline.
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+ *
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+ * Return 0 on success, negative error code on failure.
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+ */
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+int ppe_queue_priority_set(struct ppe_device *ppe_dev,
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+ int node_id, int priority)
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+{
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+ struct ppe_scheduler_cfg sch_cfg;
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+ int ret, port, level = 0;
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+
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+ ret = ppe_queue_scheduler_get(ppe_dev, node_id, level, &port, &sch_cfg);
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+ if (ret)
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+ return ret;
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+
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+ sch_cfg.pri = priority;
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+ return ppe_queue_scheduler_set(ppe_dev, node_id, level, port, sch_cfg);
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+}
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+
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+/**
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* ppe_queue_ucast_base_set - Set PPE unicast queue base ID and profile ID
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* @ppe_dev: PPE device
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* @queue_dst: PPE queue destination configuration
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--- a/drivers/net/ethernet/qualcomm/ppe/ppe_config.h
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+++ b/drivers/net/ethernet/qualcomm/ppe/ppe_config.h
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@@ -291,6 +291,11 @@ int ppe_hw_config(struct ppe_device *ppe
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int ppe_queue_scheduler_set(struct ppe_device *ppe_dev,
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int node_id, bool flow_level, int port,
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struct ppe_scheduler_cfg scheduler_cfg);
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+int ppe_queue_scheduler_get(struct ppe_device *ppe_dev,
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+ int node_id, bool flow_level, int *port,
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+ struct ppe_scheduler_cfg *scheduler_cfg);
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+int ppe_queue_priority_set(struct ppe_device *ppe_dev,
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+ int queue_id, int priority);
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int ppe_queue_ucast_base_set(struct ppe_device *ppe_dev,
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struct ppe_queue_ucast_dest queue_dst,
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int queue_base,
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