forked from Openwrt-EcoNet/openwrt
ebfd69a3e3
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.32 All patches are automatically refreshed. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Tested-by: John Audia <therealgraysky@proton.me> Link: https://github.com/openwrt/openwrt/pull/19027 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
51 lines
1.5 KiB
Diff
51 lines
1.5 KiB
Diff
From 583299efa34c4a484b211f84c63aee78b6c2b469 Mon Sep 17 00:00:00 2001
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From: Md Sadre Alam <quic_mdalam@quicinc.com>
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Date: Thu, 6 Mar 2025 17:03:55 +0530
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Subject: [PATCH] arm64: dts: qcom: ipq9574: Add SPI nand support
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Add SPI NAND support for ipq9574 SoC.
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Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
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Link: https://lore.kernel.org/r/20250306113357.126602-2-quic_mdalam@quicinc.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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arch/arm64/boot/dts/qcom/ipq9574.dtsi | 27 +++++++++++++++++++++++++++
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1 file changed, 27 insertions(+)
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--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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@@ -675,6 +675,33 @@
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status = "disabled";
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};
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+ qpic_bam: dma-controller@7984000 {
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+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
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+ reg = <0x07984000 0x1c000>;
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+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&gcc GCC_QPIC_AHB_CLK>;
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+ clock-names = "bam_clk";
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+ #dma-cells = <1>;
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+ qcom,ee = <0>;
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+ status = "disabled";
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+ };
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+
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+ qpic_nand: spi@79b0000 {
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+ compatible = "qcom,ipq9574-snand";
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+ reg = <0x079b0000 0x10000>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ clocks = <&gcc GCC_QPIC_CLK>,
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+ <&gcc GCC_QPIC_AHB_CLK>,
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+ <&gcc GCC_QPIC_IO_MACRO_CLK>;
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+ clock-names = "core", "aon", "iom";
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+ dmas = <&qpic_bam 0>,
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+ <&qpic_bam 1>,
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+ <&qpic_bam 2>;
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+ dma-names = "tx", "rx", "cmd";
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+ status = "disabled";
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+ };
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+
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usb_0_qusbphy: phy@7b000 {
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compatible = "qcom,ipq9574-qusb2-phy";
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reg = <0x0007b000 0x180>;
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