forked from Openwrt-EcoNet/openwrt
ebfd69a3e3
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.32 All patches are automatically refreshed. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Tested-by: John Audia <therealgraysky@proton.me> Link: https://github.com/openwrt/openwrt/pull/19027 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
45 lines
1.9 KiB
Diff
45 lines
1.9 KiB
Diff
From 2f2f5ae4d52ea882ba58f6b2fa6373a3d3db2bce Mon Sep 17 00:00:00 2001
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From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
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Date: Thu, 13 Mar 2025 12:44:22 +0530
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Subject: [PATCH] arm64: dts: qcom: ipq9574: fix the msi interrupt numbers of
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pcie3
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The MSI interrupt numbers of the PCIe3 controller are incorrect. Due
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to this, the functional bring up of the QDSP6 processor on the PCIe
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endpoint has failed. Correct the MSI interrupt numbers to properly
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bring up the QDSP6 processor on the PCIe endpoint.
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Fixes: d80c7fbfa908 ("arm64: dts: qcom: ipq9574: Add PCIe PHYs and controller nodes")
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Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
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Link: https://lore.kernel.org/r/20250313071422.510-1-quic_mmanikan@quicinc.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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arch/arm64/boot/dts/qcom/ipq9574.dtsi | 16 ++++++++--------
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1 file changed, 8 insertions(+), 8 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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@@ -974,14 +974,14 @@
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ranges = <0x01000000 0x0 0x00000000 0x18200000 0x0 0x100000>,
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<0x02000000 0x0 0x18300000 0x18300000 0x0 0x7d00000>;
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- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi0",
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"msi1",
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"msi2",
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