forked from Openwrt-EcoNet/openwrt
f9206d1111
Replace downstream files by patches, either backports of those which have already applied or pending patches tracked on patchwork. This is done to make future maintainance more easy. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
134 lines
4.1 KiB
Diff
134 lines
4.1 KiB
Diff
From patchwork Sun May 11 14:19:21 2025
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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X-Patchwork-Submitter: Frank Wunderlich <linux@fw-web.de>
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X-Patchwork-Id: 14084155
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From: Frank Wunderlich <linux@fw-web.de>
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To: Andrew Lunn <andrew@lunn.ch>,
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Vladimir Oltean <olteanv@gmail.com>,
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"David S. Miller" <davem@davemloft.net>,
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Eric Dumazet <edumazet@google.com>,
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Jakub Kicinski <kuba@kernel.org>,
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Paolo Abeni <pabeni@redhat.com>,
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Rob Herring <robh@kernel.org>,
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Krzysztof Kozlowski <krzk+dt@kernel.org>,
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Conor Dooley <conor+dt@kernel.org>,
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Matthias Brugger <matthias.bgg@gmail.com>,
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AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Subject: [PATCH v1 05/14] arm64: dts: mediatek: mt7988: move uart0 and spi1
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pins to soc dtsi
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Date: Sun, 11 May 2025 16:19:21 +0200
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Message-ID: <20250511141942.10284-6-linux@fw-web.de>
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X-Mailer: git-send-email 2.43.0
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In-Reply-To: <20250511141942.10284-1-linux@fw-web.de>
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References: <20250511141942.10284-1-linux@fw-web.de>
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Cc: devicetree@vger.kernel.org, Landen Chao <Landen.Chao@mediatek.com>,
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=?utf-8?b?QXLEsW7DpyDDnE5BTA==?= <arinc.unal@arinc9.com>,
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netdev@vger.kernel.org, Sean Wang <sean.wang@mediatek.com>,
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Daniel Golle <daniel@makrotopia.org>, linux-kernel@vger.kernel.org,
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DENG Qingfang <dqfext@gmail.com>, linux-mediatek@lists.infradead.org,
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Lorenzo Bianconi <lorenzo@kernel.org>, linux-arm-kernel@lists.infradead.org,
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Felix Fietkau <nbd@nbd.name>
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Sender: "Linux-mediatek" <linux-mediatek-bounces@lists.infradead.org>
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Errors-To:
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linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org
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From: Frank Wunderlich <frank-w@public-files.de>
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In order to use uart0 or spi1 there is only 1 possible pin definition
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so move them to soc dtsi to reuse them in other boards and avoiding
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conflict if defined twice.
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Suggested-by: Daniel Golle <daniel@makrotopia.org>
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Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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---
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.../dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 14 --------------
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arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 18 ++++++++++++++++++
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2 files changed, 18 insertions(+), 14 deletions(-)
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--- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
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@@ -328,13 +328,6 @@
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};
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};
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- uart0_pins: uart0-pins {
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- mux {
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- function = "uart";
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- groups = "uart0";
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- };
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- };
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-
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snfi_pins: snfi-pins {
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mux {
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function = "flash";
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@@ -356,13 +349,6 @@
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};
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};
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- spi1_pins: spi1-pins {
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- mux {
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- function = "spi";
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- groups = "spi1";
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- };
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- };
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-
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spi2_pins: spi2-pins {
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mux {
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function = "spi";
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--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
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@@ -209,6 +209,20 @@
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"pcie_wake_n3_0";
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};
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};
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+
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+ spi1_pins: spi1-pins {
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+ mux {
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+ function = "spi";
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+ groups = "spi1";
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+ };
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+ };
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+
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+ uart0_pins: uart0-pins {
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+ mux {
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+ function = "uart";
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+ groups = "uart0";
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+ };
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+ };
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};
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pwm: pwm@10048000 {
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@@ -244,6 +258,8 @@
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clocks = <&topckgen CLK_TOP_UART_SEL>,
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<&infracfg CLK_INFRA_52M_UART0_CK>;
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clock-names = "baud", "bus";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_pins>;
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status = "disabled";
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};
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@@ -338,6 +354,8 @@
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"hclk";
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#address-cells = <1>;
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#size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi1_pins>;
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status = "disabled";
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};
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