forked from Openwrt-EcoNet/openwrt
f9206d1111
Replace downstream files by patches, either backports of those which have already applied or pending patches tracked on patchwork. This is done to make future maintainance more easy. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
60 lines
1.9 KiB
Diff
60 lines
1.9 KiB
Diff
From 46d056b6c2376d3ef866f9ab5212879c97588892 Mon Sep 17 00:00:00 2001
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From: Frank Wunderlich <frank-w@public-files.de>
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Date: Tue, 17 Dec 2024 10:12:23 +0100
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Subject: [PATCH 11/32] arm64: dts: mediatek: mt7988: Add t-phy for ssusb1
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USB controller needs phys for working properly.
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On mt7988 ssusb0 uses a xs-phy, ssusb uses t-phy.
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For now add the t-phy for ssusb1. We can reuse the mt7986 compatible
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here.
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Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Link: https://lore.kernel.org/r/20241217091238.16032-10-linux@fw-web.de
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Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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---
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arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 25 +++++++++++++++++++++++
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1 file changed, 25 insertions(+)
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--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
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@@ -349,6 +349,8 @@
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<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>,
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<&infracfg CLK_INFRA_USB_XHCI_CK_P1>;
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clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
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+ phys = <&tphyu2port0 PHY_TYPE_USB2>,
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+ <&tphyu3port0 PHY_TYPE_USB3>;
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status = "disabled";
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};
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@@ -371,6 +373,29 @@
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status = "disabled";
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};
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+ t-phy@11c50000 {
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+ compatible = "mediatek,mt7986-tphy",
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+ "mediatek,generic-tphy-v2";
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+ #address-cells = <2>;
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+ #size-cells = <2>;
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+ ranges;
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+ status = "disabled";
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+
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+ tphyu2port0: usb-phy@11c50000 {
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+ reg = <0 0x11c50000 0 0x700>;
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+ clocks = <&infracfg CLK_INFRA_USB_UTMI_CK_P1>;
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+ clock-names = "ref";
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+ #phy-cells = <1>;
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+ };
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+
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+ tphyu3port0: usb-phy@11c50700 {
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+ reg = <0 0x11c50700 0 0x900>;
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+ clocks = <&infracfg CLK_INFRA_USB_PIPE_CK_P1>;
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+ clock-names = "ref";
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+ #phy-cells = <1>;
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+ };
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+ };
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+
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clock-controller@11f40000 {
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compatible = "mediatek,mt7988-xfi-pll";
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reg = <0 0x11f40000 0 0x1000>;
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