forked from Openwrt-EcoNet/openwrt
Replace downstream files by patches, either backports of those which have already applied or pending patches tracked on patchwork. This is done to make future maintainance more easy. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
63 lines
2.0 KiB
Diff
63 lines
2.0 KiB
Diff
From f07e0e093c42736df56f4830179c19f48f8b0725 Mon Sep 17 00:00:00 2001
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From: Frank Wunderlich <frank-w@public-files.de>
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Date: Tue, 17 Dec 2024 10:12:17 +0100
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Subject: [PATCH 06/32] arm64: dts: mediatek: mt7988: Add lvts node
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Add Low Voltage Thermal Sensor (LVTS) node for mt7988 SoC.
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Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Link: https://lore.kernel.org/r/20241217091238.16032-4-linux@fw-web.de
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Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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---
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arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
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@@ -4,6 +4,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/pinctrl/mt65xx.h>
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+#include <dt-bindings/reset/mediatek,mt7988-resets.h>
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/ {
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compatible = "mediatek,mt7988a";
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@@ -97,6 +98,7 @@
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compatible = "mediatek,mt7988-infracfg", "syscon";
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reg = <0 0x10001000 0 0x1000>;
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#clock-cells = <1>;
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+ #reset-cells = <1>;
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};
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topckgen: clock-controller@1001b000 {
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@@ -265,6 +267,17 @@
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status = "disabled";
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};
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+ lvts: lvts@1100a000 {
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+ compatible = "mediatek,mt7988-lvts-ap";
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+ #thermal-sensor-cells = <1>;
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+ reg = <0 0x1100a000 0 0x1000>;
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+ clocks = <&infracfg CLK_INFRA_26M_THERM_SYSTEM>;
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+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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+ resets = <&infracfg MT7988_INFRA_RST1_THERM_CTRL_SWRST>;
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+ nvmem-cells = <&lvts_calibration>;
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+ nvmem-cell-names = "lvts-calib-data-1";
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+ };
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+
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usb@11190000 {
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compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci";
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reg = <0 0x11190000 0 0x2e00>,
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@@ -324,6 +337,10 @@
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reg = <0 0x11f50000 0 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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+
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+ lvts_calibration: calib@918 {
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+ reg = <0x918 0x28>;
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+ };
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};
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clock-controller@15000000 {
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