forked from Openwrt-EcoNet/openwrt
a387c62114
Upstream uses a different filename, so lets rename our downstream mt7981.dtsi to mt7981b.dtsi and update the device tree of all MT7981 boards accordingly. This is to prepare for the switch to Linux 6.12 which is going to use the upstream mt7981b.dtsi (plus some patches on top). Signed-off-by: Daniel Golle <daniel@makrotopia.org>
369 lines
6.3 KiB
Plaintext
369 lines
6.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/dts-v1/;
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#include "mt7981b.dtsi"
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/ {
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model = "Keenetic KN-3811";
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compatible = "keenetic,kn-3811", "mediatek,mt7981";
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aliases {
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label-mac-device = &gmac0;
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led-boot = &power_led;
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led-failsafe = &power_led;
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led-running = &power_led;
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led-upgrade = &power_led;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-fn {
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label = "fn";
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linux,code = <BTN_0>;
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gpios = <&pio 5 GPIO_ACTIVE_LOW>;
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};
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button-reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 24 GPIO_ACTIVE_LOW>;
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};
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button-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 29 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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/* fn led reassigned to wlan 2.4 */
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led-0 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WLAN_2GHZ;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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power_led: led-1 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
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gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
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};
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led-2 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WAN;
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gpios = <&pio 12 GPIO_ACTIVE_LOW>;
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};
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led-3 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WLAN_5GHZ;
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gpios = <&pio 34 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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};
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usb_vbus: regulator-usb-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-boot-on;
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};
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virtual_flash {
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compatible = "mtd-concat";
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devices = <&firmware1 &storage1 &firmware2 &storage2>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x0 0x600000>;
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};
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partition@400000 {
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label = "ubi";
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reg = <0x600000 0x0>;
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};
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_4 0>;
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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label = "wan";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_a 0>;
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};
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};
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&mdio_bus {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <0x1f>;
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reset-gpios = <&pio 22 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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/* Winbond W25N02KV (256M) */
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spi_nand@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-buswidth = <4>;
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spi-rx-buswidth = <4>;
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spi-cal-enable;
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spi-cal-mode = "read-data";
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spi-cal-datalen = <7>;
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spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
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spi-cal-addrlen = <5>;
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spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* bl2 */
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partition@0 {
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label = "preloader";
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reg = <0x0 0x80000>;
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read-only;
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};
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/* fip */
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partition@80000 {
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label = "u-boot";
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reg = <0x80000 0x200000>;
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read-only;
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};
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partition@280000 {
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label = "u-config";
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reg = <0x280000 0x80000>;
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read-only;
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};
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partition@300000 {
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label = "rf-eeprom";
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reg = <0x300000 0x200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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/* lan mac */
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macaddr_factory_4: macaddr@4 {
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compatible = "mac-base";
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reg = <0x4 0x6>;
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#nvmem-cell-cells = <1>;
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};
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/* wan mac */
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macaddr_factory_a: macaddr@a {
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compatible = "mac-base";
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reg = <0xa 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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firmware1: partition@500000 {
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label = "firmware_1";
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reg = <0x500000 0x3a00000>;
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};
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partition@3f00000 {
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label = "config_1";
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reg = <0x3f00000 0x80000>;
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read-only;
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};
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partition@3f80000 {
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label = "dump";
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reg = <0x3f80000 0x80000>;
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read-only;
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};
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storage1: partition@4000000 {
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label = "storage_a";
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reg = <0x4000000 0x3800000>;
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};
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partition@7800000 {
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label = "u-state";
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reg = <0x7800000 0x20000>;
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read-only;
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};
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partition@7a80000 {
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label = "u-config_res";
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reg = <0x7a80000 0x80000>;
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read-only;
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};
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partition@7b00000 {
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label = "rf-eeprom_res";
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reg = <0x7b00000 0x200000>;
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read-only;
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};
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firmware2: partition@7d00000 {
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label = "firmware_2";
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reg = <0x7d00000 0x3a00000>;
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};
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partition@b700000 {
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label = "config_2";
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reg = <0xb700000 0x80000>;
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read-only;
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};
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storage2: partition@b780000 {
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label = "storage_b";
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reg = <0xb780000 0x3880000>;
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};
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};
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};
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};
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&wifi {
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nvmem-cell-names = "eeprom";
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nvmem-cells = <&eeprom_factory_0>;
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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vbus-supply = <&usb_vbus>;
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};
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