openwrt_mitrastar/target/linux/mediatek/dts/mt7981b-gatonetworks-gdsp.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;
#include "mt7981b.dtsi"

/ {
	model = "GatoNetworks GDSP";
	compatible = "gatonetworks,gdsp", "mediatek,mt7981";

	aliases {
		serial0 = &uart0;
		label-mac-device = &wifi_band_0;
		led-boot = &sg1;
		led-failsafe = &sg1;
		led-running = &sg1;
		led-upgrade = &sg1;
	};

	chosen {
		stdout-path = "serial0:115200n8";
		bootargs = "console=ttyS0,115200n1 earlycon=uart8250,mmio32,0x11002000";
		rootdisk = <&firmware>;
	};

	memory {
		reg = <0 0x40000000 0 0x10000000>;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_5v: regulator-5v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-5V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};

	gpio-keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-export {
		compatible = "gpio-export";

		modem1 {
			gpio-export,name = "modem1";
			gpio-export,output = <0>;
			gpios = <&pio 2 GPIO_ACTIVE_LOW>;
		};

		modem2 {
			gpio-export,name = "modem2";
			gpio-export,output = <0>;
			gpios = <&pio 14 GPIO_ACTIVE_LOW>;
		};
	};

	leds {
		compatible = "gpio-leds";

		sim1 {
			label = "green:sim1";
			gpios = <&pio 13 GPIO_ACTIVE_LOW>;
		};

		sim2 {
			label = "green:sim2";
			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
		};

		sg1: sg1 {
			label = "green:sg1";
			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
		};

		sg2 {
			label = "green:sg2";
			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
		};

		sg3 {
			label = "green:sg3";
			gpios = <&pio 12 GPIO_ACTIVE_LOW>;
		};

		sg4 {
			label = "green:sg4";
			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
		};

		sg5 {
			label = "green:sg5";
			gpios = <&pio 8 GPIO_ACTIVE_LOW>;
		};

		sg6 {
			label = "green:sg6";
			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-watchdog {
		compatible = "linux,wdt-gpio";
		gpios = <&pio 6 GPIO_ACTIVE_LOW>;
		hw_algo = "toggle";
		hw_margin_ms = <25000>;
		always-running;
	};
};

&watchdog {
	status = "okay";
};

&eth {
	status = "okay";

	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		phy-mode = "2500base-x";

		nvmem-cells = <&macaddr_lan>;
		nvmem-cell-names = "mac-address";

		fixed-link {
			speed = <2500>;
			full-duplex;
			pause;
		};
	};

	mdio: mdio-bus {
		#address-cells = <1>;
		#size-cells = <0>;

		switch@1f {
			compatible = "mediatek,mt7531";
			reg = <31>;
			reset-gpios = <&pio 39 0>;
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&pio>;
			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;

			mdio {
				#address-cells = <1>;
				#size-cells = <0>;

				swphy0: phy@0 {
					reg = <0>;
				};

				swphy1: phy@1 {
					reg = <1>;
				};

				swphy2: phy@2 {
					reg = <2>;
				};

				swphy3: phy@3 {
					reg = <3>;
				};

				swphy4: phy@4 {
					reg = <4>;
				};
			};

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					label = "lan1";
					phy-handle = <&swphy0>;
				};

				port@1 {
					reg = <1>;
					label = "lan2";
					phy-handle = <&swphy1>;
				};

				port@2 {
					reg = <2>;
					label = "lan3";
					phy-handle = <&swphy2>;
				};

				port@3 {
					reg = <3>;
					label = "lan4";
					phy-handle = <&swphy3>;
				};

				port@4 {
					reg = <4>;
					label = "wan";
					nvmem-cells = <&macaddr_wan>;
					nvmem-cell-names = "mac-address";
					phy-handle = <&swphy4>;
				};

				port@6 {
					reg = <6>;
					ethernet = <&gmac0>;
					phy-mode = "2500base-x";

					fixed-link {
						speed = <2500>;
						full-duplex;
						pause;
					};
				};
			};
		};
	};
};

&crypto {
	status = "okay";
};

&wifi {
	#address-cells = <1>;
	#size-cells = <0>;
	mediatek,mtd-eeprom = <&factory 0x0>;
	status = "okay";

	wifi_band_0: band@0 {
		reg = <0>;
		nvmem-cells = <&macaddr_wifi 0>;
		nvmem-cell-names = "mac-address";
	};

	band@1 {
		reg = <1>;
		nvmem-cells = <&macaddr_wifi 1>;
		nvmem-cell-names = "mac-address";
	};
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi2_flash_pins>;
	status = "okay";

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <52000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "BL2";
				reg = <0x00000 0x0040000>;
				read-only;
			};

			partition@40000 {
				label = "u-boot-env";
				reg = <0x40000 0x0010000>;
			};

			factory: partition@50000 {
				label = "Factory";
				reg = <0x50000 0x00B0000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_wifi: macaddr@4 {
						reg = <0x4 0x6>;
						compatible = "mac-base";
						#nvmem-cell-cells = <1>;
					};

					macaddr_wan: macaddr@24 {
						reg = <0x24 0x6>;
					};

					macaddr_lan: macaddr@2a {
						reg = <0x2a 0x6>;
					};
				};
			};

			partition@100000 {
				label = "FIP";
				reg = <0x100000 0x0080000>;
				read-only;
			};

			firmware: partition@180000 {
				label = "firmware";
				reg = <0x180000 0x1E80000>;
			};
		};
	};
};

&pio {
	uart1_pins: uart1-pins {
		mux {
			function = "uart";
			groups = "uart1_0";
		};
	};

	uart2_pins: uart2-pins {
		mux {
			function = "uart";
			groups = "uart2_0_tx_rx";
		};
	};

	spi2_flash_pins: spi2-pins {
		mux {
			function = "spi";
			groups = "spi2", "spi2_wp_hold";
		};

		conf-pu {
			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};
};

&uart0 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
	status = "okay";
};

&usb_phy {
	status = "okay";
};

&xhci {
	mediatek,u3p-dis-msk = <0x0>;
	phys = <&u2port0 PHY_TYPE_USB2>,
	       <&u3port0 PHY_TYPE_USB3>;
	status = "okay";
	vusb33-supply = <&reg_3p3v>;
	vbus-supply = <&reg_5v>;
};