Files
openwrt_mitrastar/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch
Mieczyslaw Nalewaj a72a2fd7e0 kernel: bump 6.6 to 6.6.88
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.88

Manually rebased:
 - bcm27xx/patches-6.6/950-0327-media-i2c-ov7251-Make-the-enable-GPIO-optional.patch[1]
 - bcm27xx/patches-6.6/950-0521-PCI-brcmstb-Add-BCM2712-support.patch[2]
 - generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch[3]
 - generic/pending-6.6/734-net-ethernet-mediatek-enlarge-DMA-reserve-buffer.patch[4]

All other patches automatically rebased.

1. https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.88&id=f249c05416ea0bef24c9dbed0e653d2fad87b127
2. https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.88&id=1fea7726276e5d6526ecd4e7ccb4c91a6135deb5
3. https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.88&id=95f17738b86fd198924d874a5639bcdc49c7e5b8
4. https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.88&id=a2874f0dff63829d1f540003e2d83adb610ee64a

Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/18607
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2025-05-03 19:57:53 +02:00

93 lines
3.3 KiB
Diff

From e3ab3267a0bbedc37725bb845a332ec33b247263 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 27 Feb 2024 18:54:22 +0100
Subject: [PATCH 2/2] net: dsa: mv88e6xxx: add Amethyst specific SMI GPIO
function
The existing mv88e6390_g2_scratch_gpio_set_smi() cannot be used on the
88E6393X as it requires certain P0_MODE, it also checks the CPU mode
as it impacts the bit setting value.
This is all irrelevant for Amethyst (MV88E6191X/6193X/6393X) as only
the default value of the SMI_PHY Config bit is set to CPU_MGD bootstrap
pin value but it can be changed without restrictions so that GPIO pins
9 and 10 are used as SMI pins.
So, introduce Amethyst specific function and call that if the Amethyst
family wants to setup the external PHY.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 5 +++-
drivers/net/dsa/mv88e6xxx/global2.h | 2 ++
drivers/net/dsa/mv88e6xxx/global2_scratch.c | 31 +++++++++++++++++++++
3 files changed, 37 insertions(+), 1 deletion(-)
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3725,7 +3725,10 @@ static int mv88e6xxx_mdio_register(struc
if (external) {
mv88e6xxx_reg_lock(chip);
- err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
+ if (chip->info->family == MV88E6XXX_FAMILY_6393)
+ err = mv88e6393x_g2_scratch_gpio_set_smi(chip, true);
+ else
+ err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
mv88e6xxx_reg_unlock(chip);
if (err)
--- a/drivers/net/dsa/mv88e6xxx/global2.h
+++ b/drivers/net/dsa/mv88e6xxx/global2.h
@@ -380,6 +380,8 @@ extern const struct mv88e6xxx_gpio_ops m
int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
bool external);
+int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
+ bool external);
int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port);
int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin);
int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats);
--- a/drivers/net/dsa/mv88e6xxx/global2_scratch.c
+++ b/drivers/net/dsa/mv88e6xxx/global2_scratch.c
@@ -291,6 +291,37 @@ int mv88e6390_g2_scratch_gpio_set_smi(st
}
/**
+ * mv88e6393x_g2_scratch_gpio_set_smi - set gpio muxing for external smi
+ * @chip: chip private data
+ * @external: set mux for external smi, or free for gpio usage
+ *
+ * MV88E6191X/6193X/6393X GPIO pins 9 and 10 can be configured as an
+ * external SMI interface or as regular GPIO-s.
+ *
+ * They however have a different register layout then the existing
+ * function.
+ */
+
+int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
+ bool external)
+{
+ int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG;
+ int err;
+ u8 val;
+
+ err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val);
+ if (err)
+ return err;
+
+ if (external)
+ val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
+ else
+ val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
+
+ return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val);
+}
+
+/**
* mv88e6352_g2_scratch_port_has_serdes - indicate if a port can have a serdes
* @chip: chip private data
* @port: port number to check for serdes