forked from Openwrt-EcoNet/openwrt
1a97278ee1
Update b53 RGMII port patches to the accepted upstream version. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
56 lines
2.3 KiB
Diff
56 lines
2.3 KiB
Diff
From eb9e6142ac5f42beee48c9ec8edf1da3a3d7ff81 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Thu, 5 Jun 2025 16:39:20 +0200
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Subject: [PATCH] net: dsa: b53: invert bcm531x5 rgmii delay heuristic
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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When configuring the RGMII port for BCM531x5, we are only doing so in
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MLO_AN_FIXED, i.e. fixed link mode. This implies this port is used as
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cpu port and thus connected to an ethernet mac, so the switch takes the
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role of the PHY.
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Therefore we need to enable delays when the interface mode is rgmii-id,
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and not rgmii. Enabling delays for rgmii is wrong in any case.
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Also update the comment with the incomplete sentence to match what we
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are now doing, and add a comment about rgmii-id.
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Luckily there are at least no in-tree users of rgmii or rgmii-id mode
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that would be affected, as the only user with a defined link mode uses
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rgmii-txid, which we already handle correctly.
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Fixes: 967dd82ffc52 ("net: dsa: b53: Add support for Broadcom RoboSwitch")
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Reported-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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drivers/net/dsa/b53/b53_common.c | 13 ++++++-------
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1 file changed, 6 insertions(+), 7 deletions(-)
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--- a/drivers/net/dsa/b53/b53_common.c
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+++ b/drivers/net/dsa/b53/b53_common.c
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@@ -1363,16 +1363,15 @@ static void b53_adjust_531x5_rgmii(struc
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*
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* PHY_INTERFACE_MODE_RGMII means that we are not introducing
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* any delay neither on transmission nor reception, so the
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- * BCM53125 must also be configured accordingly to account for
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- * the lack of delay and introduce
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- *
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- * The BCM53125 switch has its RX clock and TX clock control
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- * swapped, hence the reason why we modify the TX clock path in
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- * the "RGMII" case
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+ * BCM53125 must also be configured accordingly, and not enable
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+ * either delay.
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+ *
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+ * PHY_INTERFACE_MODE_RGMII_ID means both TX internal delay and RX
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+ * interal delay, so enable delay on both paths.
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*/
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if (interface == PHY_INTERFACE_MODE_RGMII_TXID)
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rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
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- if (interface == PHY_INTERFACE_MODE_RGMII)
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+ if (interface == PHY_INTERFACE_MODE_RGMII_ID)
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rgmii_ctrl |= RGMII_CTRL_DLL_TXC | RGMII_CTRL_DLL_RXC;
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if (dev->chip_id != BCM53115_DEVICE_ID)
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