forked from Openwrt-EcoNet/openwrt
f76b846eea
Add QCN6122 platform support. QCN6122 is a PCIe based solution that is attached to and enumerated by the WPSS (Wireless Processor SubSystem) Q6 processor. Though it is a PCIe device, since it is not attached to APSS processor (Application Processor SubSystem), APSS will be unaware of such a decice and hence it is registered to the APSS processor as a platform device(AHB). Because of this hybrid nature, it is called as a hybrid bus device. As such, QCN6122 is a hybrid bus type device and follows the same codepath as for WCN6750. This is a reversed engineered and heavily simplified version of below downstream patch: https://git.codelinaro.org/clo/qsdk/oss/system/feeds/wlan-open/-/ \ blob/NHSS.QSDK.12.4.5.r2/mac80211/patches/232-ath11k-qcn6122-support.patch Co-developed-by: George Moussalem <george.moussalem@outlook.com> Signed-off-by: Sowmiya Sree Elavalagan <ssreeela@codeaurora.org> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/17182 Signed-off-by: Robert Marko <robimarko@gmail.com>
115 lines
4.1 KiB
Diff
115 lines
4.1 KiB
Diff
From: George Moussalem <george.moussalem@outlook.com>
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Date: Wed, 27 Oct 2024 16:34:11 +0400
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Subject: [PATCH] wifi: ath11k: add hal regs for QCN6122
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Add HAL changes required to support QCN6122. Offsets are similar to those of
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WCN6750 but QCN6122 does not use the hal_shadow_base_addr, so add platform
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specific ath11k_hw_regs and register them in hw params.
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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---
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--- a/drivers/net/wireless/ath/ath11k/core.c
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+++ b/drivers/net/wireless/ath/ath11k/core.c
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@@ -822,6 +822,7 @@ static struct ath11k_hw_params ath11k_hw
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.bdf_addr = 0x4D200000,
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.hw_ops = &ipq5018_ops,
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.hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
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+ .regs = &qcn6122_regs,
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.qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN6122,
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.interface_modes = BIT(NL80211_IFTYPE_STATION) |
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BIT(NL80211_IFTYPE_AP) |
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--- a/drivers/net/wireless/ath/ath11k/hw.c
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+++ b/drivers/net/wireless/ath/ath11k/hw.c
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@@ -2822,6 +2822,81 @@ const struct ath11k_hw_regs ipq5018_regs
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.hal_wbm1_release_ring_base_lsb = 0x0000097c,
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};
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+const struct ath11k_hw_regs qcn6122_regs = {
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+ /* SW2TCL(x) R0 ring configuration address */
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+ .hal_tcl1_ring_base_lsb = 0x00000694,
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+ .hal_tcl1_ring_base_msb = 0x00000698,
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+ .hal_tcl1_ring_id = 0x0000069c,
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+ .hal_tcl1_ring_misc = 0x000006a4,
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+ .hal_tcl1_ring_tp_addr_lsb = 0x000006b0,
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+ .hal_tcl1_ring_tp_addr_msb = 0x000006b4,
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+ .hal_tcl1_ring_consumer_int_setup_ix0 = 0x000006c4,
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+ .hal_tcl1_ring_consumer_int_setup_ix1 = 0x000006c8,
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+ .hal_tcl1_ring_msi1_base_lsb = 0x000006dc,
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+ .hal_tcl1_ring_msi1_base_msb = 0x000006e0,
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+ .hal_tcl1_ring_msi1_data = 0x000006e4,
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+ .hal_tcl2_ring_base_lsb = 0x000006ec,
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+ .hal_tcl_ring_base_lsb = 0x0000079c,
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+
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+ /* TCL STATUS ring address */
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+ .hal_tcl_status_ring_base_lsb = 0x000008a4,
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+
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+ /* REO2SW(x) R0 ring configuration address */
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+ .hal_reo1_ring_base_lsb = 0x000001ec,
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+ .hal_reo1_ring_base_msb = 0x000001f0,
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+ .hal_reo1_ring_id = 0x000001f4,
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+ .hal_reo1_ring_misc = 0x000001fc,
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+ .hal_reo1_ring_hp_addr_lsb = 0x00000200,
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+ .hal_reo1_ring_hp_addr_msb = 0x00000204,
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+ .hal_reo1_ring_producer_int_setup = 0x00000210,
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+ .hal_reo1_ring_msi1_base_lsb = 0x00000234,
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+ .hal_reo1_ring_msi1_base_msb = 0x00000238,
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+ .hal_reo1_ring_msi1_data = 0x0000023c,
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+ .hal_reo2_ring_base_lsb = 0x00000244,
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+ .hal_reo1_aging_thresh_ix_0 = 0x00000564,
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+ .hal_reo1_aging_thresh_ix_1 = 0x00000568,
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+ .hal_reo1_aging_thresh_ix_2 = 0x0000056c,
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+ .hal_reo1_aging_thresh_ix_3 = 0x00000570,
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+
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+ /* REO2SW(x) R2 ring pointers (head/tail) address */
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+ .hal_reo1_ring_hp = 0x00003028,
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+ .hal_reo1_ring_tp = 0x0000302c,
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+ .hal_reo2_ring_hp = 0x00003030,
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+
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+ /* REO2TCL R0 ring configuration address */
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+ .hal_reo_tcl_ring_base_lsb = 0x000003fc,
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+ .hal_reo_tcl_ring_hp = 0x00003058,
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+
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+ /* SW2REO ring address */
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+ .hal_sw2reo_ring_base_lsb = 0x0000013c,
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+ .hal_sw2reo_ring_hp = 0x00003018,
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+
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+ /* REO CMD ring address */
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+ .hal_reo_cmd_ring_base_lsb = 0x000000e4,
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+ .hal_reo_cmd_ring_hp = 0x00003010,
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+
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+ /* REO status address */
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+ .hal_reo_status_ring_base_lsb = 0x00000504,
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+ .hal_reo_status_hp = 0x00003070,
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+
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+ /* WCSS relative address */
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+ .hal_seq_wcss_umac_ce0_src_reg = 0x01b80000,
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+ .hal_seq_wcss_umac_ce0_dst_reg = 0x01b81000,
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+ .hal_seq_wcss_umac_ce1_src_reg = 0x01b82000,
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+ .hal_seq_wcss_umac_ce1_dst_reg = 0x01b83000,
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+
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+ /* WBM Idle address */
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+ .hal_wbm_idle_link_ring_base_lsb = 0x00000874,
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+ .hal_wbm_idle_link_ring_misc = 0x00000884,
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+
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+ /* SW2WBM release address */
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+ .hal_wbm_release_ring_base_lsb = 0x000001ec,
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+
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+ /* WBM2SW release address */
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+ .hal_wbm0_release_ring_base_lsb = 0x00000924,
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+ .hal_wbm1_release_ring_base_lsb = 0x0000097c,
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+};
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+
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const struct ath11k_hw_hal_params ath11k_hw_hal_params_ipq8074 = {
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.rx_buf_rbm = HAL_RX_BUF_RBM_SW3_BM,
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.tcl2wbm_rbm_map = ath11k_hw_tcl2wbm_rbm_map_ipq8074,
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--- a/drivers/net/wireless/ath/ath11k/hw.h
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+++ b/drivers/net/wireless/ath/ath11k/hw.h
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@@ -425,6 +425,7 @@ extern const struct ath11k_hw_regs qcn90
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extern const struct ath11k_hw_regs wcn6855_regs;
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extern const struct ath11k_hw_regs wcn6750_regs;
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extern const struct ath11k_hw_regs ipq5018_regs;
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+extern const struct ath11k_hw_regs qcn6122_regs;
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static inline const char *ath11k_bd_ie_type_str(enum ath11k_bd_ie_type type)
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{
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