forked from Openwrt/openwrt
e59635668d
`loglevel=8` causes the kernel to output all logs, including debug logs, at boot time It is enabled by default on the upstream eval board because it is aimed at developer debugging. Most devices reference the eval board directly without modification, and the debug log should be hidden at release Signed-off-by: Coia Prant <coiaprant@gmail.com> Link: https://github.com/openwrt/openwrt/pull/19714 Signed-off-by: Robert Marko <robimarko@gmail.com>
123 lines
1.8 KiB
Plaintext
123 lines
1.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (C) 2023 Allen Zhao <allenzhao@unielecinc.com>
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*/
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/dts-v1/;
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#include "mt7981b.dtsi"
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/ {
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model = "Unielec U7981-01 (EMMC)";
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compatible = "unielec,u7981-01-emmc", "mediatek,mt7981";
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chosen {
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bootargs = "console=ttyS0,115200n1 earlycon=uart8250,mmio32,0x11002000";
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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ð {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins &gbe_led0_pins &gbe_led1_pins>;
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status = "okay";
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gmac0: mac@0 {
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/* LAN */
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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/* WAN */
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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};
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};
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&mdio_bus {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&usb_phy {
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status = "okay";
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};
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&xhci {
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mediatek,u3p-dis-msk = <0x0>;
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phys = <&u2port0 PHY_TYPE_USB2>,
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<&u3port0 PHY_TYPE_USB3>;
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status = "okay";
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};
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