openwrt/target/linux/mediatek/dts/mt7981b-snr-snr-cpe-ax2.dts

// SPDX-License-Identifier: GPL-2.0-only OR MIT

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

#include "mt7981b.dtsi"

/ {
	model = "SNR SNR-CPE-AX2";
	compatible = "snr,snr-cpe-ax2", "mediatek,mt7981";

	aliases {
		label-mac-device = &gmac0;

		led-boot = &led_status;
		led-failsafe = &led_fail;
		led-running = &led_status;
		led-upgrade = &led_fail;

		serial0 = &uart0;
	};

	chosen {
		rootdisk = <&ubi_fit_volume>;
		stdout-path = "serial0:115200n8";
		bootargs-append = " root=/dev/fit0 rootwait";
	};

	gpio-keys {
		compatible = "gpio-keys";

		button-0 {
			label = "mesh";
			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RFKILL>;
			debounce-interval = <60>;
		};

		button-1 {
			label = "reset";
			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
			debounce-interval = <60>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led-0 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_STATUS; // Second WAN led defined below.
			gpios = <&pio 4 GPIO_ACTIVE_LOW>;
		};

		led_fail: led-1 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_STATUS;
			gpios = <&pio 5 GPIO_ACTIVE_LOW>;
		};

		led-2 {
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_WLAN_2GHZ;
			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};

		led-3 {
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_WLAN_5GHZ;
			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};

		led_status: led-4 {
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_STATUS;
			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
		};

		led-5 {
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_WAN;
			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
		};

		led-6 {
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_STATUS;
			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
		};
	};
};

&eth {
	status = "okay";

	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		phy-mode = "2500base-x";

		nvmem-cell-names = "mac-address";
		nvmem-cells = <&macaddr_factory_e000 0>;

		fixed-link {
			speed = <2500>;
			full-duplex;
			pause;
		};
	};
};

&mdio_bus {
	switch: switch@1f {
		compatible = "mediatek,mt7531";
		reg = <0x1f>;
		reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
		interrupt-controller;
		#interrupt-cells = <1>;
		interrupt-parent = <&pio>;
		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
	};
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_flash_pins>;
	status = "okay";

	spi_nand@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-nand";
		reg = <0>;

		spi-max-frequency = <52000000>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;

		spi-cal-enable;
		spi-cal-mode = "read-data";
		spi-cal-datalen = <7>;
		spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
		spi-cal-addrlen = <5>;
		spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "BL2";
				reg = <0x0 0x100000>;
				read-only;
			};

			partition@100000 {
				label = "u-boot-env (unused)";
				reg = <0x100000 0x80000>;
				read-only;
			};

			partition@180000 {
				label = "Factory";
				reg = <0x180000 0x200000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					eeprom_factory_0: eeprom@0 {
						reg = <0x0 0x1000>;
					};

					macaddr_factory_4: macaddr@4 {
						compatible = "mac-base";
						reg = <0x4 0x6>;
						#nvmem-cell-cells = <1>;
					};

					macaddr_factory_e000: macaddr@e000 {
						compatible = "mac-base";
						reg = <0xe000 0x6>;
						#nvmem-cell-cells = <1>;
					};

					macaddr_factory_e006: macaddr@e006 {
						compatible = "mac-base";
						reg = <0xe006 0x6>;
						#nvmem-cell-cells = <1>;
					};

					macaddr_factory_100004: macaddr@100004 {
						compatible = "mac-base";
						reg = <0x100004 0x6>;
						#nvmem-cell-cells = <1>;
					};
				};
			};

			partition@380000 {
				label = "FIP";
				reg = <0x380000 0x200000>;
				read-only;
			};

			partition@580000 {
				label = "ubi";
				reg = <0x580000 0x7a80000>;
				compatible = "linux,ubi";

				volumes {
					ubi_fit_volume: ubi-volume-fit {
						volname = "fit";
					};

					ubi_ubootenv: ubi-volume-ubootenv {
						volname = "ubootenv";
					};

					ubi_ubootenv2: ubi-volume-ubootenv2 {
						volname = "ubootenv2";
					};
				};
			};
		};
	};
};

&switch {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			label = "wan";
			nvmem-cell-names = "mac-address";
			nvmem-cells = <&macaddr_factory_e006 0>;
		};

		port@1 {
			reg = <1>;
			label = "lan1";
		};

		port@2 {
			reg = <2>;
			label = "lan2";
		};

		port@3 {
			reg = <3>;
			label = "lan3";
		};

		port@4 {
			reg = <4>;
			label = "lan4";
		};

		port@6 {
			reg = <6>;
			ethernet = <&gmac0>;
			phy-mode = "2500base-x";

			fixed-link {
				speed = <2500>;
				full-duplex;
				pause;
			};
		};
	};
};

&pio {
	spi0_flash_pins: spi0-pins {
		mux {
			function = "spi";
			groups = "spi0", "spi0_wp_hold";
		};

		conf-pu {
			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};
};

&uart0 {
	status = "okay";
};

&ubi_ubootenv {
	nvmem-layout {
		compatible = "u-boot,env-redundant-bool";
	};
};

&ubi_ubootenv2 {
	nvmem-layout {
		compatible = "u-boot,env-redundant-bool";
	};
};

&watchdog {
	status = "okay";
};

&wifi {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;
	nvmem-cell-names = "eeprom";
	nvmem-cells = <&eeprom_factory_0>;

	band@0 {
		reg = <0>;
		nvmem-cells = <&macaddr_factory_4 0>;
		nvmem-cell-names = "mac-address";
	};

	band@1 {
		reg = <1>;
		nvmem-cells = <&macaddr_factory_100004 0>;
		nvmem-cell-names = "mac-address";
	};
};