openwrt/target/linux/mediatek/dts/mt7981a-glinet-gl-x3000-xe3000-common.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;

#include <dt-bindings/pinctrl/mt65xx.h>

#include "mt7981b.dtsi"

/ {
	chosen {
		bootargs = "console=ttyS0,115200n8 root=PARTLABEL=rootfs rootwait";
	};

	aliases {
		label-mac-device = &gmac0;
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	reg_5v: regulator-5v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-5V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};

	fan_5v: regulator-fan-5v {
		compatible = "regulator-fixed";
		regulator-name = "fan";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpios = <&pio 28 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	gpio-keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-export {
		compatible = "gpio-export";

		hub_power {
			gpio-export,name = "hub_power";
			gpio-export,output = <1>;
			gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
		};

		5G_power {
			gpio-export,name = "5G_power";
			gpio-export,output = <1>;
			gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
		};

		5G_control {
			gpio-export,name = "5G_control";
			gpio-export,output = <1>;
			gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
		};

		5G_reset {
			gpio-export,name = "5G_reset";
			gpio-export,output = <0>;
			gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
		};
	};

	leds {
		compatible = "gpio-leds";

		wifi2g {
			label = "green:wifi2g";
			gpios = <&pio 30 GPIO_ACTIVE_LOW>;
		};

		wifi5g {
			label = "green:wifi5g";
			gpios = <&pio 38 GPIO_ACTIVE_LOW>;
		};

		5g_led1 {
			label = "green:5g:led1";
			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
		};

		5g_led2 {
			label = "green:5g:led2";
			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
		};

		5g_led3 {
			label = "green:5g:led3";
			gpios = <&pio 8 GPIO_ACTIVE_LOW>;
		};

		5g_led4 {
			label = "green:5g:led4";
			gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
		};

		led_power: power {
			label = "green:power";
			gpios = <&pio 39 GPIO_ACTIVE_LOW>;
		};

		wan {
			label = "green:wan";
			gpios = <&pio 31 GPIO_ACTIVE_LOW>;
		};
	};
};

&uart0 {
	status = "okay";
};

&watchdog {
	status = "okay";
};

&mmc0 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default", "state_uhs";
	pinctrl-0 = <&mmc0_pins_default>;
	pinctrl-1 = <&mmc0_pins_uhs>;
	bus-width = <8>;
	max-frequency = <26000000>;
	cap-mmc-highspeed;
	vmmc-supply = <&reg_3p3v>;
	non-removable;
	status = "okay";

	card@0 {
		compatible = "mmc-card";
		reg = <0>;

		block {
			compatible = "block-device";
			partitions {
				block-partition-env {
					partname = "u-boot-env";

					nvmem-layout {
						compatible = "u-boot,env";
					};
				};

				block-partition-factory {
					partname = "factory";

					nvmem-layout {
						compatible = "fixed-layout";
						#address-cells = <1>;
						#size-cells = <1>;

						eeprom_factory_0: eeprom@0 {
							reg = <0x0 0x1000>;
						};

						macaddr_factory_a: macaddr@a {
							compatible = "mac-base";
							reg = <0xa 0x6>;
							#nvmem-cell-cells = <1>;
						};
					};
				};
			};
		};
	};
};

&mdio_bus {
	reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
	reset-delay-us = <600>;
	reset-post-delay-us = <20000>;

	phy5: ethernet-phy@5 {
		reg = <5>;
		compatible = "ethernet-phy-ieee802.3-c45";
	};
};

&eth {
	status = "okay";

	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		phy-mode = "2500base-x";
		phy-handle = <&phy5>;
		nvmem-cells = <&macaddr_factory_a 0>;
		nvmem-cell-names = "mac-address";
	};

	gmac1: mac@1 {
		compatible = "mediatek,eth-mac";
		reg = <1>;
		phy-mode = "gmii";
		phy-handle = <&int_gbe_phy>;
		nvmem-cells = <&macaddr_factory_a 1>;
		nvmem-cell-names = "mac-address";
	};
};

&pio {
	mmc0_pins_default: mmc0-pins-default {
		mux {
			function = "flash";
			groups = "emmc_8";
		};
		conf-cmd-dat {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
				"SPI0_CS", "SPI0_HOLD", "SPI0_WP",
				"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
			input-enable;
			drive-strength = <MTK_DRIVE_12mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};
		conf-clk {
			pins = "SPI1_CS";
			drive-strength = <MTK_DRIVE_12mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
	};
	mmc0_pins_uhs: mmc0-pins-uhs {
		mux {
			function = "flash";
			groups = "emmc_8";
		};
		conf-cmd-dat {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
				"SPI0_CS", "SPI0_HOLD", "SPI0_WP",
				"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
			input-enable;
			drive-strength = <MTK_DRIVE_12mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};
		conf-clk {
			pins = "SPI1_CS";
			drive-strength = <MTK_DRIVE_12mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
	};
	pcie_pins: pcie-pins {
		mux {
			function = "pcie";
			groups = "pcie_pereset", "pcie_clk", "pcie_wake";
		};
	};
	pwm0_pin: pwm0-pin-g0 {
		mux {
			function = "pwm";
			groups = "pwm0_1";
		};
	};
};

&xhci {
	phys = <&u2port0 PHY_TYPE_USB2>;
	vbus-supply = <&reg_5v>;
	mediatek,u3p-dis-msk = <0x01>;
	status = "okay";
};

&usb_phy {
	status = "okay";
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie_pins>;
	status = "okay";
};

&pwm {
	pinctrl-names = "default";
	pinctrl-0 = <&pwm0_pin>;
};

&wifi {
	nvmem-cells = <&eeprom_factory_0>;
	nvmem-cell-names = "eeprom";
	status = "okay";
};

&fan {
	pwms = <&pwm 0 40000 0>;
	fan-supply = <&fan_5v>;
	interrupt-parent = <&pio>;
	interrupts = <29 IRQ_TYPE_EDGE_RISING>;
	status = "okay";
};