583 lines
27 KiB
C
583 lines
27 KiB
C
/*
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Copyright 2000-2010 Broadcom Corporation
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Unless you and Broadcom execute a separate written software license
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agreement governing use of this software, this software is licensed
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to you under the terms of the GNU General Public License version 2
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(the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php,
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with the following added to such license:
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As a special exception, the copyright holders of this software give
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you permission to link this software with independent modules, and to
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copy and distribute the resulting executable under terms of your
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choice, provided that you also meet, for each linked independent
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module, the terms and conditions of the license of that module.
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An independent module is a module which is not derived from this
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software. The special exception does not apply to any modifications
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of the software.
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Notwithstanding the above, under no circumstances may you combine this
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software in any way with any other Broadcom software provided under a
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license other than the GPL, without Broadcom's express prior written
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consent.
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*/
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/**************************************************************************
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* File Name : boardparms.h
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*
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* Description: This file contains definitions and function prototypes for
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* the BCM63xx board parameter access functions.
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*
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* Updates : 07/14/2003 Created.
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***************************************************************************/
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#if !defined(_BOARDPARMS_H)
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#define _BOARDPARMS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Return codes. */
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#define BP_SUCCESS 0
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#define BP_BOARD_ID_NOT_FOUND 1
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#define BP_VALUE_NOT_DEFINED 2
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#define BP_BOARD_ID_NOT_SET 3
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/* Values for EthernetMacInfo PhyType. */
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#define BP_ENET_NO_PHY 0
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#define BP_ENET_INTERNAL_PHY 1
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#define BP_ENET_EXTERNAL_SWITCH 2
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#define BP_ENET_SWITCH_VIA_INTERNAL_PHY 3 /* it is for cpu internal phy connects to port 4 of 5325e */
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/* Values for EthernetMacInfo Configuration type. */
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#define BP_ENET_CONFIG_MDIO 0 /* Internal PHY, External PHY, Switch+(no GPIO, no SPI, no MDIO Pseudo phy */
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#define BP_ENET_CONFIG_MDIO_PSEUDO_PHY 1
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#define BP_ENET_CONFIG_SPI_SSB_0 2
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#define BP_ENET_CONFIG_SPI_SSB_1 3
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#define BP_ENET_CONFIG_SPI_SSB_2 4
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#define BP_ENET_CONFIG_SPI_SSB_3 5
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#define BP_ENET_CONFIG_MMAP 6
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#define BP_ENET_CONFIG_GPIO_MDIO 7 /* use GPIO to simulate MDC/MDIO */
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/* Values for VoIPDSPInfo DSPType. */
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#define BP_VOIP_NO_DSP 0
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#define BP_VOIP_DSP 1
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#define BP_VOIP_MIPS 2
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/* Values for GPIO pin assignments (AH = Active High, AL = Active Low). */
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#define BP_GPIO_NUM_MASK 0x00FF
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#define BP_ACTIVE_MASK 0x8000
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#define BP_ACTIVE_HIGH 0x0000
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#define BP_ACTIVE_LOW 0x8000
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#define BP_GPIO_SERIAL 0x4000
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#define BP_GPIO_0_AH (0)
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#define BP_GPIO_0_AL (0 | BP_ACTIVE_LOW)
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#define BP_GPIO_1_AH (1)
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#define BP_GPIO_1_AL (1 | BP_ACTIVE_LOW)
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#define BP_GPIO_2_AH (2)
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#define BP_GPIO_2_AL (2 | BP_ACTIVE_LOW)
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#define BP_GPIO_3_AH (3)
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#define BP_GPIO_3_AL (3 | BP_ACTIVE_LOW)
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#define BP_GPIO_4_AH (4)
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#define BP_GPIO_4_AL (4 | BP_ACTIVE_LOW)
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#define BP_GPIO_5_AH (5)
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#define BP_GPIO_5_AL (5 | BP_ACTIVE_LOW)
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#define BP_GPIO_6_AH (6)
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#define BP_GPIO_6_AL (6 | BP_ACTIVE_LOW)
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#define BP_GPIO_7_AH (7)
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#define BP_GPIO_7_AL (7 | BP_ACTIVE_LOW)
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#define BP_GPIO_8_AH (8)
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#define BP_GPIO_8_AL (8 | BP_ACTIVE_LOW)
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#define BP_GPIO_9_AH (9)
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#define BP_GPIO_9_AL (9 | BP_ACTIVE_LOW)
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#define BP_GPIO_10_AH (10)
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#define BP_GPIO_10_AL (10 | BP_ACTIVE_LOW)
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#define BP_GPIO_11_AH (11)
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#define BP_GPIO_11_AL (11 | BP_ACTIVE_LOW)
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#define BP_GPIO_12_AH (12)
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#define BP_GPIO_12_AL (12 | BP_ACTIVE_LOW)
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#define BP_GPIO_13_AH (13)
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#define BP_GPIO_13_AL (13 | BP_ACTIVE_LOW)
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#define BP_GPIO_14_AH (14)
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#define BP_GPIO_14_AL (14 | BP_ACTIVE_LOW)
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#define BP_GPIO_15_AH (15)
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#define BP_GPIO_15_AL (15 | BP_ACTIVE_LOW)
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#define BP_GPIO_16_AH (16)
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#define BP_GPIO_16_AL (16 | BP_ACTIVE_LOW)
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#define BP_GPIO_17_AH (17)
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#define BP_GPIO_17_AL (17 | BP_ACTIVE_LOW)
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#define BP_GPIO_18_AH (18)
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#define BP_GPIO_18_AL (18 | BP_ACTIVE_LOW)
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#define BP_GPIO_19_AH (19)
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#define BP_GPIO_19_AL (19 | BP_ACTIVE_LOW)
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#define BP_GPIO_20_AH (20)
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#define BP_GPIO_20_AL (20 | BP_ACTIVE_LOW)
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#define BP_GPIO_21_AH (21)
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#define BP_GPIO_21_AL (21 | BP_ACTIVE_LOW)
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#define BP_GPIO_22_AH (22)
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#define BP_GPIO_22_AL (22 | BP_ACTIVE_LOW)
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#define BP_GPIO_23_AH (23)
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#define BP_GPIO_23_AL (23 | BP_ACTIVE_LOW)
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#define BP_GPIO_24_AH (24)
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#define BP_GPIO_24_AL (24 | BP_ACTIVE_LOW)
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#define BP_GPIO_25_AH (25)
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#define BP_GPIO_25_AL (25 | BP_ACTIVE_LOW)
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#define BP_GPIO_26_AH (26)
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#define BP_GPIO_26_AL (26 | BP_ACTIVE_LOW)
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#define BP_GPIO_27_AH (27)
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#define BP_GPIO_27_AL (27 | BP_ACTIVE_LOW)
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#define BP_GPIO_28_AH (28)
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#define BP_GPIO_28_AL (28 | BP_ACTIVE_LOW)
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#define BP_GPIO_29_AH (29)
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#define BP_GPIO_29_AL (29 | BP_ACTIVE_LOW)
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#define BP_GPIO_30_AH (30)
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#define BP_GPIO_30_AL (30 | BP_ACTIVE_LOW)
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#define BP_GPIO_31_AH (31)
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#define BP_GPIO_31_AL (31 | BP_ACTIVE_LOW)
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#define BP_GPIO_32_AH (32)
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#define BP_GPIO_32_AL (32 | BP_ACTIVE_LOW)
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#define BP_GPIO_33_AH (33)
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#define BP_GPIO_33_AL (33 | BP_ACTIVE_LOW)
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#define BP_GPIO_34_AH (34)
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#define BP_GPIO_34_AL (34 | BP_ACTIVE_LOW)
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#define BP_GPIO_35_AH (35)
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#define BP_GPIO_35_AL (35 | BP_ACTIVE_LOW)
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#define BP_GPIO_36_AH (36)
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#define BP_GPIO_36_AL (36 | BP_ACTIVE_LOW)
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#define BP_GPIO_37_AH (37)
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#define BP_GPIO_37_AL (37 | BP_ACTIVE_LOW)
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#define BP_GPIO_38_AH (38)
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#define BP_GPIO_38_AL (38 | BP_ACTIVE_LOW)
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#define BP_GPIO_39_AH (39)
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#define BP_GPIO_39_AL (39 | BP_ACTIVE_LOW)
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#define BP_GPIO_40_AH (40)
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#define BP_GPIO_40_AL (40 | BP_ACTIVE_LOW)
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#define BP_GPIO_41_AH (41)
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#define BP_GPIO_41_AL (41 | BP_ACTIVE_LOW)
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#define BP_GPIO_42_AH (42)
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#define BP_GPIO_42_AL (42 | BP_ACTIVE_LOW)
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#define BP_GPIO_43_AH (43)
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#define BP_GPIO_43_AL (43 | BP_ACTIVE_LOW)
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#define BP_GPIO_44_AH (44)
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#define BP_GPIO_44_AL (44 | BP_ACTIVE_LOW)
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#define BP_GPIO_45_AH (45)
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#define BP_GPIO_45_AL (45 | BP_ACTIVE_LOW)
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#define BP_GPIO_46_AH (46)
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#define BP_GPIO_46_AL (46 | BP_ACTIVE_LOW)
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#define BP_GPIO_47_AH (47)
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#define BP_GPIO_47_AL (47 | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_0_AH (0 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_0_AL (0 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_1_AH (1 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_1_AL (1 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_2_AH (2 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_2_AL (2 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_3_AH (3 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_3_AL (3 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_4_AH (4 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_4_AL (4 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_5_AH (5 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_5_AL (5 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_6_AH (6 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_6_AL (6 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_7_AH (7 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_7_AL (7 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_8_AH (8 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_8_AL (8 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_9_AH (9 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_9_AL (9 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_10_AH (10 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_10_AL (10 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_11_AH (11 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_11_AL (11 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_12_AH (12 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_12_AL (12 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_13_AH (13 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_13_AL (13 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_14_AH (14 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_14_AL (14 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_15_AH (15 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_15_AL (15 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_16_AH (16 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_16_AL (16 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_17_AH (17 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_17_AL (17 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_18_AH (18 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_18_AL (18 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_19_AH (19 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_19_AL (19 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_20_AH (20 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_20_AL (20 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_21_AH (21 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_21_AL (21 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_22_AH (22 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_22_AL (22 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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#define BP_SERIAL_GPIO_23_AH (23 | BP_GPIO_SERIAL)
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#define BP_SERIAL_GPIO_23_AL (23 | BP_GPIO_SERIAL | BP_ACTIVE_LOW)
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/* Values for external interrupt assignments. */
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#define BP_EXT_INTR_0 0
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#define BP_EXT_INTR_1 1
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#define BP_EXT_INTR_2 2
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#define BP_EXT_INTR_3 3
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#define BP_EXT_INTR_4 4
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#define BP_EXT_INTR_5 5
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/* Values for chip select assignments. */
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#define BP_CS_0 0
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#define BP_CS_1 1
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#define BP_CS_2 2
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#define BP_CS_3 3
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#define BP_OVERLAY_GPON_TX_EN_L (1<<0)
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#define BP_OVERLAY_PCI (1<<0)
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#define BP_OVERLAY_PCIE_CLKREQ (1<<0)
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#define BP_OVERLAY_CB (1<<1) // Unused
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#define BP_OVERLAY_SPI_EXT_CS (1<<2)
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#define BP_OVERLAY_UART1 (1<<3) // Unused
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#define BP_OVERLAY_PHY (1<<4)
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#define BP_OVERLAY_SERIAL_LEDS (1<<5)
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#define BP_OVERLAY_EPHY_LED_0 (1<<6)
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#define BP_OVERLAY_EPHY_LED_1 (1<<7)
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#define BP_OVERLAY_EPHY_LED_2 (1<<8)
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#define BP_OVERLAY_EPHY_LED_3 (1<<9)
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#define BP_OVERLAY_GPHY_LED_0 (1<<10)
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#define BP_OVERLAY_GPHY_LED_1 (1<<11)
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#define BP_OVERLAY_INET_LED (1<<12)
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#define BP_OVERLAY_MOCA_LED (1<<13)
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#define BP_OVERLAY_USB_LED (1<<14)
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#define BP_OVERLAY_USB_DEVICE (1<<15)
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/* Value for GPIO and external interrupt fields that are not used. */
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#define BP_NOT_DEFINED 0xffff
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/* Maximum size of the board id string. */
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#define BP_BOARD_ID_LEN 16
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/* Maximum number of Ethernet MACs. */
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#define BP_MAX_ENET_MACS 2
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#define BP_MAX_SWITCH_PORTS 8
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#define BP_MAX_ENET_INTERNAL 2
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/* Maximum number of VoIP DSPs. */
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#define BP_MAX_VOIP_DSP 2
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/* Wireless Antenna Settings. */
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#define BP_WLAN_ANT_MAIN 0
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#define BP_WLAN_ANT_AUX 1
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#define BP_WLAN_ANT_BOTH 3
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/* Wireless FLAGS */
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#define BP_WLAN_MAC_ADDR_OVERRIDE 0x0001 /* use kerSysGetMacAddress for mac address */
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#define BP_WLAN_EXCLUDE_ONBOARD 0x0002 /* exclude onboard wireless */
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#define BP_WLAN_EXCLUDE_ONBOARD_FORCE 0x0004 /* force exclude onboard wireless even without addon card*/
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#define BP_WLAN_USE_OTP 0x0008 /* don't use sw srom map, may fall to OTP or uninitialzed */
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#define BP_WLAN_NVRAM_NAME_LEN 16
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#define BP_WLAN_MAX_PATCH_ENTRY 32
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/* AFE IDs */
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#define BP_AFE_DEFAULT 0
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#define BP_AFE_CHIP_INT (1 << 28)
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#define BP_AFE_CHIP_6505 (2 << 28)
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#define BP_AFE_CHIP_6306 (3 << 28)
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#define BP_AFE_LD_ISIL1556 (1 << 21)
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#define BP_AFE_LD_6301 (2 << 21)
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#define BP_AFE_LD_6302 (3 << 21)
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#define BP_AFE_FE_ANNEXA (1 << 15)
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#define BP_AFE_FE_ANNEXB (2 << 15)
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#define BP_AFE_FE_ANNEXJ (3 << 15)
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#define BP_AFE_FE_ANNEXBJ (4 << 15)
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#define BP_AFE_FE_ANNEXM (5 << 15)
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#define BP_AFE_FE_AVMODE_COMBO (0 << 13)
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#define BP_AFE_FE_AVMODE_ADSL (1 << 13)
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#define BP_AFE_FE_AVMODE_VDSL (2 << 13)
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/* VDSL only */
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#define BP_AFE_FE_REV_ISIL_REV1 (1 << 8)
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/* Combo */
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#define BP_AFE_FE_REV_6302_REV1 (1 << 8)
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#define BP_AFE_FE_REV_6302_REV_7_12 (1 << 8)
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#define BP_AFE_FE_REV_6302_REV_7_4 (2 << 8)
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#define BP_AFE_FE_REV_6302_REV_7_2_1 (3 << 8)
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#define BP_AFE_FE_REV_6302_REV_7_2 (4 << 8)
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#define BP_AFE_FE_REV_6302_REV_7_2_UR2 (5 << 8)
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#define BP_AFE_FE_REV_6302_REV_7_2_2 (6 << 8)
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/* ADSL only*/
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#define BP_AFE_FE_REV_6302_REV_5_2_1 (1 << 8)
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#define BP_AFE_FE_REV_6302_REV_5_2_2 (2 << 8)
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#define BP_AFE_FE_REV_6301_REV_5_1_1 (1 << 8)
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#define BP_AFE_FE_REV_6301_REV_5_1_2 (2 << 8)
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#define BP_GET_EXT_AFE_DEFINED
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#if !defined(__ASSEMBLER__)
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typedef struct {
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unsigned short duplexLed;
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unsigned short speedLed100;
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unsigned short speedLed1000;
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} LED_INFO;
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/* Information about Ethernet switch */
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typedef struct {
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unsigned long port_map;
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unsigned long phy_id[BP_MAX_SWITCH_PORTS];
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LED_INFO ledInfo[BP_MAX_ENET_INTERNAL];
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} ETHERNET_SW_INFO;
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#define BP_PHY_ID_0 (0)
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#define BP_PHY_ID_1 (1)
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#define BP_PHY_ID_2 (2)
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#define BP_PHY_ID_3 (3)
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#define BP_PHY_ID_4 (4)
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#define BP_PHY_ID_5 (5)
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#define BP_PHY_ID_6 (6)
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#define BP_PHY_ID_7 (7)
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#define BP_PHY_ID_8 (8)
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#define BP_PHY_ID_9 (9)
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#define BP_PHY_ID_10 (10)
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#define BP_PHY_ID_11 (11)
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#define BP_PHY_ID_12 (12)
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#define BP_PHY_ID_13 (13)
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#define BP_PHY_ID_14 (14)
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#define BP_PHY_ID_15 (15)
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#define BP_PHY_ID_16 (16)
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#define BP_PHY_ID_17 (17)
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#define BP_PHY_ID_18 (18)
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#define BP_PHY_ID_19 (19)
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#define BP_PHY_ID_20 (20)
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#define BP_PHY_ID_21 (21)
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#define BP_PHY_ID_22 (22)
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#define BP_PHY_ID_23 (23)
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#define BP_PHY_ID_24 (24)
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#define BP_PHY_ID_25 (25)
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#define BP_PHY_ID_26 (26)
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#define BP_PHY_ID_27 (27)
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#define BP_PHY_ID_28 (28)
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#define BP_PHY_ID_29 (29)
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#define BP_PHY_ID_30 (30)
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#define BP_PHY_ID_31 (31)
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#define BP_PHY_ID_NOT_SPECIFIED (0xFF)
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#define BP_PHY_NOT_PRESENT (0)
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/* Phy config info embedded into phy_id of ETHERNET_SW_INFO */
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#define PHYCFG_VALID_M 1
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#define PHYCFG_VALID_S 31
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#define PHYCFG_VALID (PHYCFG_VALID_M << PHYCFG_VALID_S)
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#define PHY_LNK_CFG_M 0x7
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#define PHY_LNK_CFG_S 8
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#define ATONEG_FOR_LINK (0 << PHY_LNK_CFG_S)
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#define FORCE_LINK_DOWN (1 << PHY_LNK_CFG_S)
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#define FORCE_LINK_10HD (2 << PHY_LNK_CFG_S)
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#define FORCE_LINK_10FD (3 << PHY_LNK_CFG_S)
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#define FORCE_LINK_100HD (4 << PHY_LNK_CFG_S)
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#define FORCE_LINK_100FD (5 << PHY_LNK_CFG_S)
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#define PHY_ADV_CAP_CFG_M 0x3F
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#define PHY_ADV_CAP_CFG_S 11
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#define ADVERTISE_10HD (1 << PHY_ADV_CAP_CFG_S)
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#define ADVERTISE_10FD (2 << PHY_ADV_CAP_CFG_S)
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#define ADVERTISE_100HD (4 << PHY_ADV_CAP_CFG_S)
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#define ADVERTISE_100FD (8 << PHY_ADV_CAP_CFG_S)
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#define ADVERTISE_1000HD (16 << PHY_ADV_CAP_CFG_S)
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#define ADVERTISE_1000FD (32 << PHY_ADV_CAP_CFG_S)
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#define ADVERTISE_ALL_GMII (ADVERTISE_10HD | ADVERTISE_10FD | ADVERTISE_100HD | ADVERTISE_100FD | ADVERTISE_1000HD | ADVERTISE_1000FD)
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#define ADVERTISE_ALL_MII (ADVERTISE_10HD | ADVERTISE_10FD | ADVERTISE_100HD | ADVERTISE_100FD)
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#define PHY_INTEGRATED_M 0x1
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#define PHY_INTEGRATED_S 17
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#define PHY_INTERNAL (0 << PHY_INTEGRATED_S)
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#define PHY_EXTERNAL (1 << PHY_INTEGRATED_S)
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#define MAC_PHY_IFACE_M 0x3
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#define MAC_PHY_IFACE_S 18
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#define MAC_PHY_IFACE (MAC_PHY_IFACE_M << MAC_PHY_IFACE_S)
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#define MAC_PHY_IF_GMII_MII (0 << MAC_PHY_IFACE_S)
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#define MAC_PHY_IF_RGMII (1 << MAC_PHY_IFACE_S)
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#define MAC_MAC_IF (2 << MAC_PHY_IFACE_S)
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#define PHYID_LSBYTE_M 0xFF
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#define BCM_PHY_ID_M 0x1F
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/* MII over GPIO config info embedded into phy_id of ETHERNET_SW_INFO */
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#define MII_OVER_GPIO_M 1
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#define MII_OVER_GPIO_S 30
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#define MII_OVER_GPIO_VALID (MII_OVER_GPIO_M << MII_OVER_GPIO_S)
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/* MII - RvMII connection. Force Link to 100FD */
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#define MII_DIRECT (PHYCFG_VALID | MAC_MAC_IF | FORCE_LINK_100FD)
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/* WAN port flag in the phy_id of ETHERNET_SW_INFO */
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#define BCM_WAN_PORT 0x40
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#define IsWanPort(id) ((id & PHYCFG_VALID)?(id & BCM_WAN_PORT):((id & BCM_WAN_PORT) && ((id & PHYID_LSBYTE_M) != 0xFF)))
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#define IsPhyConnected(id) ((id & PHYCFG_VALID)?((id & MAC_PHY_IFACE) != MAC_MAC_IF):((id & PHYID_LSBYTE_M) != 0xFF))
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#define IsExtPhyId(id) ((id & PHYCFG_VALID)?(id & PHY_EXTERNAL):((id & BCM_PHY_ID_M) >= 0x10))
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#define IsRGMII(id) ((id & PHYCFG_VALID)?((id & MAC_PHY_IFACE) == MAC_PHY_IF_RGMII):0)
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#define c0(n) (((n) & 0x55555555) + (((n) >> 1) & 0x55555555))
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#define c1(n) (((n) & 0x33333333) + (((n) >> 2) & 0x33333333))
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#define c2(n) (((n) & 0x0f0f0f0f) + (((n) >> 4) & 0x0f0f0f0f))
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#define bitcount(r, n) {r = n; r = c0(r); r = c1(r); r = c2(r); r %= 255;}
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/* Information about an Ethernet MAC. If ucPhyType is BP_ENET_NO_PHY,
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* then the other fields are not valid.
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*/
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typedef struct EthernetMacInfo
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{
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unsigned char ucPhyType; /* BP_ENET_xxx */
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unsigned char ucPhyAddress; /* 0 to 31 */
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unsigned short usConfigType; /* Configuration type */
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ETHERNET_SW_INFO sw; /* switch information */
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unsigned short usGpioMDC; /* GPIO pin to simulate MDC */
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unsigned short usGpioMDIO; /* GPIO pin to simulate MDIO */
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} ETHERNET_MAC_INFO, *PETHERNET_MAC_INFO;
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typedef struct WlanSromEntry {
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char name[BP_WLAN_NVRAM_NAME_LEN];
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unsigned short wordOffset;
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unsigned short value;
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} WLAN_SROM_ENTRY;
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typedef struct WlanSromPatchInfo {
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char szboardId[BP_BOARD_ID_LEN];
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unsigned short usWirelessChipId;
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unsigned short usNeededSize;
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WLAN_SROM_ENTRY entries[BP_WLAN_MAX_PATCH_ENTRY];
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} WLAN_SROM_PATCH_INFO, *PWLAN_SROM_PATCH_INFO;
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typedef struct WlanPciEntry {
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char name[BP_WLAN_NVRAM_NAME_LEN];
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unsigned int dwordOffset;
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unsigned int value;
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} WLAN_PCI_ENTRY;
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typedef struct WlanPciPatchInfo {
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char szboardId[BP_BOARD_ID_LEN];
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unsigned int usWirelessPciId;
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int usNeededSize;
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WLAN_PCI_ENTRY entries[BP_WLAN_MAX_PATCH_ENTRY];
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} WLAN_PCI_PATCH_INFO, *PWLAN_PCI_PATCH_INFO;
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/* Information about VoIP DSPs. If ucDspType is BP_VOIP_NO_DSP,
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* then the other fields are not valid.
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*/
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typedef struct VoIPDspInfo
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{
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unsigned char ucDspType;
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unsigned char ucDspAddress;
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unsigned short usGpioLedVoip;
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unsigned short usGpioVoip1Led;
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unsigned short usGpioVoip1LedFail;
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unsigned short usGpioVoip2Led;
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unsigned short usGpioVoip2LedFail;
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unsigned short usGpioPotsLed;
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unsigned short usGpioDectLed;
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} VOIP_DSP_INFO;
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|
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/***********************************************************************
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* SMP locking notes for BoardParm functions
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*
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* No locking is needed for any of these boardparm functions as long
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* as the following conditions/assumptions are not violated.
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*
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* 1. Initialization functions such as BpSetBoardId() are only called
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* during startup when no other BoardParam functions are in progress.
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* BpSetBoardId() modifies the internal global pointer g_CurrentBp,
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* which other functions deference multiple times inside their
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* functions. So if g_CurrentBp changes in the middle of a function,
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* inconsistent data could be returned.
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* Actually, BpSetBoardId is also called when cfe or whole image is
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* being written to flash, but this is when system is about to shut
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* down, so should also be OK.
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*
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* 2. Callers to functions which return a pointer to the boardparm data
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* (currently there is only 1: BpGetVoipDspConfig) should not modify
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* the boardparm data. All other functions are well written
|
|
* in this regard, they only return a copy of the requested data and
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* not a pointer to the data itself.
|
|
*
|
|
*
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************************************************************************/
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|
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int BpSetBoardId( char *pszBoardId );
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int BpGetBoardId( char *pszBoardId);
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int BpGetBoardIds( char *pszBoardIds, int nBoardIdsSize );
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|
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int BpGetGPIOverlays( unsigned short *pusValue );
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int BpGetRj11InnerOuterPairGpios( unsigned short *pusInner, unsigned short *pusOuter );
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int BpGetRtsCtsUartGpios( unsigned short *pusRts, unsigned short *pusCts );
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int BpGetAdslLedGpio( unsigned short *pusValue );
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int BpGetAdslFailLedGpio( unsigned short *pusValue );
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int BpGetSecAdslLedGpio( unsigned short *pusValue );
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int BpGetSecAdslFailLedGpio( unsigned short *pusValue );
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int BpGetWirelessSesLedGpio( unsigned short *pusValue );
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int BpGetHpnaLedGpio( unsigned short *pusValue );
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int BpGetWanDataLedGpio( unsigned short *pusValue );
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int BpGetWanErrorLedGpio( unsigned short *pusValue );
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|
int BpGetBootloaderPowerOnLedGpio( unsigned short *pusValue );
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|
int BpGetBootloaderStopLedGpio( unsigned short *pusValue );
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int BpGetFpgaResetGpio( unsigned short *pusValue );
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int BpGetGponLedGpio( unsigned short *pusValue );
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int BpGetGponFailLedGpio( unsigned short *pusValue );
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int BpGetMoCALedGpio( unsigned short *pusValue );
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int BpGetMoCAFailLedGpio( unsigned short *pusValue );
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|
|
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int BpGetResetToDefaultExtIntr( unsigned short *pusValue );
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int BpGetWirelessSesExtIntr( unsigned short *pusValue );
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|
int BpGetHpnaExtIntr( unsigned long *pulValue );
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|
|
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int BpGetHpnaChipSelect( unsigned long *pulValue );
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|
|
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int BpGetWirelessAntInUse( unsigned short *pusValue );
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int BpGetWirelessFlags( unsigned short *pusValue );
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int BpGetWirelessPowerDownGpio( unsigned short *pusValue );
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int BpUpdateWirelessSromMap(unsigned short chipID, unsigned short* pBase, int sizeInWords);
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int BpUpdateWirelessPciConfig (unsigned long pciID, unsigned long* pBase, int sizeInDWords);
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|
|
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int BpGetEthernetMacInfo( PETHERNET_MAC_INFO pEnetInfos, int nNumEnetInfos );
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|
int BpGet6829PortInfo( unsigned char *portInfo6829 );
|
|
int BpGetDslPhyAfeIds( unsigned long *pulValues );
|
|
int BpGetExtAFEResetGpio( unsigned short *pulValues );
|
|
int BpGetExtAFELDPwrGpio( unsigned short *pulValues );
|
|
int BpGetExtAFELDModeGpio( unsigned short *pulValues );
|
|
|
|
int BpGetEthSpdLedGpio( unsigned short port, unsigned short enetIdx,
|
|
unsigned short ledIdx, unsigned short *pusValue );
|
|
|
|
VOIP_DSP_INFO *BpGetVoipDspConfig( unsigned char dspNum );
|
|
int BpGetVoipLedGpio( unsigned short *pusValue );
|
|
int BpGetVoip1LedGpio( unsigned short *pusValue );
|
|
int BpGetVoip1FailLedGpio( unsigned short *pusValue );
|
|
int BpGetVoip2LedGpio( unsigned short *pusValue );
|
|
int BpGetVoip2FailLedGpio( unsigned short *pusValue );
|
|
int BpGetPotsLedGpio( unsigned short *pusValue );
|
|
int BpGetDectLedGpio( unsigned short *pusValue );
|
|
|
|
int bpstrcmp(const char *dest,const char *src);
|
|
|
|
int BpGetMiiOverGpioFlag( unsigned long* pMiiOverGpioFlag );
|
|
|
|
#endif /* __ASSEMBLER__ */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* _BOARDPARMS_H */
|
|
|