289 lines
11 KiB
C
289 lines
11 KiB
C
/*
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<:label-BRCM:2012:DUAL/GPL:standard
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Unless you and Broadcom execute a separate written software license
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agreement governing use of this software, this software is licensed
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to you under the terms of the GNU General Public License version 2
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(the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php,
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with the following added to such license:
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As a special exception, the copyright holders of this software give
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you permission to link this software with independent modules, and
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to copy and distribute the resulting executable under terms of your
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choice, provided that you also meet, for each linked independent
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module, the terms and conditions of the license of that module.
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An independent module is a module which is not derived from this
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software. The special exception does not apply to any modifications
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of the software.
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Not withstanding the above, under no circumstances may you combine
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this software in any way with any other Broadcom software provided
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under a license other than the GPL, without Broadcom's express prior
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written consent.
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:>
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*/
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/***********************************************************************/
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/* */
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/* MODULE: bcm_hwdefs.h */
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/* PURPOSE: Define all base device addresses and HW specific macros. */
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/* */
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/***********************************************************************/
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#ifndef _BCM_HWDEFS_H
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#define _BCM_HWDEFS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define DYING_GASP_API
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/*****************************************************************************/
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/* Physical Memory Map */
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/*****************************************************************************/
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#define PHYS_DRAM_BASE 0x00000000 /* Dynamic RAM Base */
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#if defined(CONFIG_BRCM_IKOS)
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#define PHYS_FLASH_BASE 0x18000000 /* Flash Memory */
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#else
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#define PHYS_FLASH_BASE 0x1FC00000 /* Flash Memory */
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#endif
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/*****************************************************************************/
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/* Note that the addresses above are physical addresses and that programs */
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/* have to use converted addresses defined below: */
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/*****************************************************************************/
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#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
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#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
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/* Binary images are always built for a standard MIPS boot address */
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#define IMAGE_BASE (0xA0000000 | PHYS_FLASH_BASE)
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/* Some chips don't support alternative boot vector */
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#if defined(CONFIG_BRCM_IKOS)
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#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
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#define BOOT_OFFSET 0
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#else
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#if defined(_BCM96328_) || defined(CONFIG_BCM96328) || defined(_BCM96362_) || defined(CONFIG_BCM96362) || defined(_BCM963268_) || defined(CONFIG_BCM963268) || defined(_BCM96828_) || defined(CONFIG_BCM96828) || defined(_BCM96318_) || defined(CONFIG_BCM96318)
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#define FLASH_BASE 0xB8000000
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#else
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#define FLASH_BASE (0xA0000000 | (MPI->cs[0].base & 0xFFFFFF00))
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#endif
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#define BOOT_OFFSET (FLASH_BASE - IMAGE_BASE)
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#endif
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/*****************************************************************************/
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/* Select the PLL value to get the desired CPU clock frequency. */
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/*****************************************************************************/
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#define FPERIPH 50000000
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/*****************************************************************************/
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/* Board memory type offset */
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/*****************************************************************************/
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#define ONEK 1024
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#define FLASH_LENGTH_BOOT_ROM (64*ONEK)
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/*****************************************************************************/
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/* NVRAM Offset and definition */
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/*****************************************************************************/
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#define NVRAM_SECTOR 0
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#define NVRAM_DATA_OFFSET 0x0580
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#define NVRAM_DATA_ID 0x0f1e2d3c // This is only for backwards compatability
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#define NVRAM_LENGTH ONEK // 1k nvram
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#define NVRAM_VERSION_NUMBER 6
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#define NVRAM_FULL_LEN_VERSION_NUMBER 5 /* version in which the checksum was
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placed at the end of the NVRAM
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structure */
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#define NVRAM_BOOTLINE_LEN 256
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#define NVRAM_BOARD_ID_STRING_LEN 16
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#define NVRAM_MAC_ADDRESS_LEN 6
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#define NVRAM_GPON_SERIAL_NUMBER_LEN 13
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#define NVRAM_GPON_PASSWORD_LEN 11
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#define NVRAM_WLAN_PARAMS_LEN 256
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#define NVRAM_WPS_DEVICE_PIN_LEN 8
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#define THREAD_NUM_ADDRESS_OFFSET (NVRAM_DATA_OFFSET + 4 + NVRAM_BOOTLINE_LEN + NVRAM_BOARD_ID_STRING_LEN)
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#define THREAD_NUM_ADDRESS (0x80000000 + THREAD_NUM_ADDRESS_OFFSET)
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#define DEFAULT_BOOTLINE "e=192.168.1.1:ffffff00 h=192.168.1.100 g= r=f f=vmlinux i=bcm963xx_fs_kernel d=1 p=0 "
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#define DEFAULT_BOARD_IP "192.168.1.1"
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#define DEFAULT_MAC_NUM 10
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#define DEFAULT_BOARD_MAC "00:10:18:00:00:00"
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#define DEFAULT_TP_NUM 0
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#define DEFAULT_PSI_SIZE 24
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#define DEFAULT_GPON_SN "BRCM12345678"
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#define DEFAULT_GPON_PW " "
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#define DEFAULT_LOG_SIZE 0
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#define DEFAULT_FLASHBLK_SIZE 64
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#define MAX_FLASHBLK_SIZE 128
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#define DEFAULT_AUXFS_PERCENT 0
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#define MAX_AUXFS_PERCENT 80
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#define DEFAUT_BACKUP_PSI 0
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#define DEFAULT_WPS_DEVICE_PIN "12345670"
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#define DEFAULT_VOICE_BOARD_ID "NONE"
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#define NVRAM_MAC_COUNT_MAX 32
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#define NVRAM_MAX_PSI_SIZE 64
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#define NVRAM_MAX_SYSLOG_SIZE 256
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#define NP_BOOT 0
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#define NP_ROOTFS_1 1
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#define NP_ROOTFS_2 2
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#define NP_DATA 3
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#define NP_BBT 4
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#define NP_TOTAL 5
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#define NAND_DATA_SIZE_KB 4096
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#define NAND_BBT_THRESHOLD_KB (512 * 1024)
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#define NAND_BBT_SMALL_SIZE_KB 1024
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#define NAND_BBT_BIG_SIZE_KB 4096
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#define NAND_CFE_RAM_NAME "cferam.000"
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#define NAND_RFS_OFS_NAME "NAND_RFS_OFS"
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#define NAND_COMMAND_NAME "NANDCMD"
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#define NAND_BOOT_STATE_FILE_NAME "boot_state_x"
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#define NAND_SEQ_MAGIC 0x53510000
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#define NAND_FULL_PARTITION_SEARCH 0
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#if (NAND_FULL_PARTITION_SEARCH == 1)
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#define MAX_NOT_JFFS2_VALUE 0 /* infinite */
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#else
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#define MAX_NOT_JFFS2_VALUE 10
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#endif
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#ifndef _LANGUAGE_ASSEMBLY
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typedef struct
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{
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unsigned long ulVersion;
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char szBootline[NVRAM_BOOTLINE_LEN];
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char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
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unsigned long ulMainTpNum;
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unsigned long ulPsiSize;
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unsigned long ulNumMacAddrs;
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unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
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char pad;
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char backupPsi; /**< if 0x01, allocate space for a backup PSI */
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unsigned long ulCheckSumV4;
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char gponSerialNumber[NVRAM_GPON_SERIAL_NUMBER_LEN];
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char gponPassword[NVRAM_GPON_PASSWORD_LEN];
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char wpsDevicePin[NVRAM_WPS_DEVICE_PIN_LEN];
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char wlanParams[NVRAM_WLAN_PARAMS_LEN];
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unsigned long ulSyslogSize; /**< number of KB to allocate for persistent syslog */
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unsigned long ulNandPartOfsKb[NP_TOTAL];
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unsigned long ulNandPartSizeKb[NP_TOTAL];
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char szVoiceBoardId[NVRAM_BOARD_ID_STRING_LEN];
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unsigned long afeId[2];
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unsigned short opticRxPwrReading; // optical initial rx power reading
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unsigned short opticRxPwrOffset; // optical rx power offset
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unsigned short opticTxPwrReading; // optical initial tx power reading
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unsigned char ucUnused2[58];
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unsigned char ucFlashBlkSize;
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unsigned char ucAuxFSPercent;
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unsigned long ulBoardStuffOption; // board options. bit0-3 is for DECT
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char chUnused[290];
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unsigned long ulCheckSum;
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} NVRAM_DATA, *PNVRAM_DATA;
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#endif
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/*****************************************************************************/
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/* Misc Offsets */
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/*****************************************************************************/
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#define CFE_VERSION_OFFSET 0x0570
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#define CFE_VERSION_MARK_SIZE 5
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#define CFE_VERSION_SIZE 5
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/*****************************************************************************/
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/* Scratch Pad Defines */
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/*****************************************************************************/
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/* SP - Persistent Scratch Pad format:
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sp header : 32 bytes
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tokenId-1 : 8 bytes
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tokenId-1 len : 4 bytes
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tokenId-1 data
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....
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tokenId-n : 8 bytes
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tokenId-n len : 4 bytes
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tokenId-n data
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*/
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#define MAGIC_NUM_LEN 8
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#define MAGIC_NUMBER "gOGoBrCm"
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#define TOKEN_NAME_LEN 16
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#define SP_VERSION 1
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#define CFE_NVRAM_DATA2_LEN 20
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#ifndef _LANGUAGE_ASSEMBLY
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typedef struct _SP_HEADER
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{
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char SPMagicNum[MAGIC_NUM_LEN]; // 8 bytes of magic number
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int SPVersion; // version number
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char NvramData2[CFE_NVRAM_DATA2_LEN]; // not related to scratch pad
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// additional NVRAM_DATA
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} SP_HEADER, *PSP_HEADER; // total 32 bytes
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typedef struct _TOKEN_DEF
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{
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char tokenName[TOKEN_NAME_LEN];
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int tokenLen;
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} SP_TOKEN, *PSP_TOKEN;
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#endif
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/*****************************************************************************/
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/* Boot Loader Parameters */
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/*****************************************************************************/
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#define BLPARMS_MAGIC 0x424c504d
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#define BOOTED_IMAGE_ID_NAME "boot_image"
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#define BOOTED_NEW_IMAGE 1
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#define BOOTED_OLD_IMAGE 2
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#define BOOTED_ONLY_IMAGE 3
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#define BOOTED_PART1_IMAGE 4
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#define BOOTED_PART2_IMAGE 5
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#define BOOT_SET_NEW_IMAGE '0'
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#define BOOT_SET_OLD_IMAGE '1'
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#define BOOT_SET_NEW_IMAGE_ONCE '2'
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#define BOOT_GET_IMAGE_VERSION '3'
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#define BOOT_GET_BOOTED_IMAGE_ID '4'
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#define BOOT_SET_PART1_IMAGE '5'
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#define BOOT_SET_PART2_IMAGE '6'
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#define BOOT_SET_PART1_IMAGE_ONCE '7'
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#define BOOT_SET_PART2_IMAGE_ONCE '8'
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#define BOOT_GET_BOOT_IMAGE_STATE '9'
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#define FLASH_PARTDEFAULT_REBOOT 0x00000000
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#define FLASH_PARTDEFAULT_NO_REBOOT 0x00000001
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#define FLASH_PART1_REBOOT 0x00010000
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#define FLASH_PART1_NO_REBOOT 0x00010001
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#define FLASH_PART2_REBOOT 0x00020000
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#define FLASH_PART2_NO_REBOOT 0x00020001
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#define FLASH_IS_NO_REBOOT(X) ((X) & 0x0000ffff)
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#define FLASH_GET_PARTITION(X) ((unsigned long) (X) >> 16)
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/*****************************************************************************/
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/* Global Shared Parameters */
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/*****************************************************************************/
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#define BRCM_MAX_CHIP_NAME_LEN 16
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#ifdef __cplusplus
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}
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#endif
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#endif /* _BCM_HWDEFS_H */
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