204 lines
8.3 KiB
C
204 lines
8.3 KiB
C
#ifndef __PKTDMA_DEFINES_H_INCLUDED__
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#define __PKTDMA_DEFINES_H_INCLUDED__
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#define XTMFREE_FORCE_FREE 1
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#define XTMFREE_NO_FORCE_FREE 0
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#if defined(CONFIG_BCM96816) || defined(CHIP_6816) || defined(CONFIG_BCM96818) || defined(CHIP_6818)
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#define ENET_TX_EGRESS_QUEUES_MAX 8
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#else
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#define ENET_TX_EGRESS_QUEUES_MAX 4
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#endif
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#if defined(CONFIG_BCM96362) && defined(CONFIG_BCM_PKTDMA)
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#define ENET_RX_CHANNELS_MAX CONFIG_BCM_DEF_NR_RX_DMA_CHANNELS
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#define ENET_TX_CHANNELS_MAX CONFIG_BCM_DEF_NR_TX_DMA_CHANNELS
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#elif defined(CONFIG_BCM96362) || defined(CONFIG_BCM963268) || defined(CONFIG_BCM96828) \
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|| ( defined(CONFIG_BCM96818) && defined(CONFIG_BCM_FAP) || defined(CONFIG_BCM_FAP_MODULE))
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/* Increase these from 1 to 2 to support rx & tx splitting - Oct 2010 */
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#define ENET_RX_CHANNELS_MAX 2
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#define ENET_TX_CHANNELS_MAX 2
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#elif (defined(CONFIG_BCM963268) || defined(CONFIG_BCM96828)) && defined(CONFIG_BCM_FAP_PWRSAVE)
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#define ENET_RX_CHANNELS_MAX 3 // 1 iuDMA needed for Host when FAP is powered off
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#define ENET_TX_CHANNELS_MAX 3 // 1 iuDMA needed for Host when FAP is powered off
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#elif defined(CONFIG_BCM96368)
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#define ENET_RX_CHANNELS_MAX 2
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#define ENET_TX_CHANNELS_MAX 2
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#else
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#define ENET_RX_CHANNELS_MAX 4
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#define ENET_TX_CHANNELS_MAX 4
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#endif
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#define XTM_RX_CHANNELS_MAX 2
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#define XTM_TX_CHANNELS_MAX 16
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/*
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* -----------------------------------------------------------------------------
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* 1. Added % memory used by BPM to menuconfig. Set default to 15% of memory.
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* 2. For 64MB #of RXBDs and #of buffers doubles to that of 32MB
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* 3. BPM will be disabled on 6368 chip on 32MB boards.
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* 4. Mini-jumbo packets (size of 2K) support on 6816 only.
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* 5. 6819BHR will be treated similar to 6816.
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* 6. Number of buffers on 6816 is going to be less since jumbo packets will
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* be enabled
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* 7. Number of RXBDs will be computed as % of total buffers. i.e. Ethernet
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* host BDs on 40% of total buffers. Unless CMF is compiled in and then
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* it is reduced to 20% of total
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* 8. A fixed number of 100 BDs for additional DMA channels on 6816 does not
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* need change for different memory sizes i.e. don't double it to 200 on
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* 64MB board
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* 9. RX Multiple channels
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* - supported for 6816 only.
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* - Ingress Qos supported on default channel (Channel 0) only.
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* - All other channels (n) are allocated 100 desc each, and are treated
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* as high priority by IQ.
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*10. FAP has fixed number of BDs because of limited DSPRAM/PSRAM
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* Eth Chnl: # of RXBDs = 600
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* XTM Chnl: # of RXBDs = 200
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* Eth (WoE) Chnl: # of RXBDs = 800 (min)
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*11. 6368 has 2 times the requirements for RXBDs because of CMF FWD driver.
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* XTM bonding needs at least 512 RXBDs because of latency requirements.
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*
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*12. Table below gives rough estimate of RXBDs
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* -----------------------------------------------------------------------------
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* Chip | Mem | # of RXBDs | # of | Comments
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* -----------------------------------------------------------------------------
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* | Host | FAP/FWD | buff |
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* -----------------------------------------------------------------------------
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* | ETH | XTM | ETH | XTM | |
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* -----------------------------------------------------------------------------
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* 6328 | 32M | 800 | 200 | | | 2000 |
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* 6362 | 32M | | | 600 | 200 | 2000 | XTM WAN
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* 6362 | 32M | 800 | | 600 | | 2000 | WoE (iuDMA split)
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* 6816 | 32M | 800+(n*100) | | | | 2000 | Default Chnl and n other
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* | | | | | | | channels
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* 6368 | 64M | 800 | 600 | 800 | 600 | 4000 | 6368 requires atleast
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* | | | | | | | 512 RXBDs for XTM bonding
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* -----------------------------------------------------------------------------
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*/
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#if (defined(CONFIG_BCM_INGQOS) || defined(CONFIG_BCM_INGQOS_MODULE) || defined(CONFIG_BCM_BPM) || defined(CONFIG_BCM_BPM_MODULE))
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/* Channel-0 is default */
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/* % of number of buffers assigned to RXBDs */
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#define ENET_DEF_RXBDS_BUF_PRCNT 40
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#define XTM_DEF_RXBDS_BUF_PRCNT 10
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/* Fixed # of RXBDs for non-default channels */
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#define HOST_ENET_NON_DEF_CHNL_NR_RXBDS 100
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#define HOST_XTM_NON_DEF_CHNL_NR_RXBDS 16
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#define HOST_ENET_NR_RXBDS 600
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#if defined(CONFIG_BCM96338) || defined(CHIP_6338)
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/* 38 needs a bigger cell queue for soft sar (64 bytes each) */
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#define HOST_XTM_NR_RXBDS 500
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#else
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#define HOST_XTM_NR_RXBDS HOST_ENET_NR_RXBDS
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#endif
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/* Host/MIPS: # of TXBDs for IuDMA managed by host */
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#define HOST_ENET_NR_TXBDS 200
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#if defined(CONFIG_BCM_DSL_GINP_RTX) || defined(SUPPORT_DSL_GINP_RTX)
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/* 20 ms RTX buffering */
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#define HOST_XTM_NR_TXBDS 4700
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#else
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#define HOST_XTM_NR_TXBDS 400
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#endif
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#define MOCA_TXQ_DEPTH_MAX 3000
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#if defined(CONFIG_BCM96362) || defined(CONFIG_BCM963268) || defined(CONFIG_BCM96828) || defined(CONFIG_BCM96818)
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/* FAP: # of buffers assigned to RXBDs */
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#define FAP_ENET_NR_RXBDS 600 /* FAP chnl */
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#define FAP_XTM_NR_RXBDS 200
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#define HOST_ENET_NR_RXBDS_MIN 800 /* Host chnl, WANoE case */
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#define HOST_XTM_NR_RXBDS_MIN 512
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/* FAP: # of RXBDs for non-default channels */
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#define FAP_ENET_NON_DEF_CHNL_NR_RXBDS HOST_ENET_NON_DEF_CHNL_NR_RXBDS
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#define FAP_XTM_NON_DEF_CHNL_NR_RXBDS HOST_XTM_NON_DEF_CHNL_NR_RXBDS
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/* FAP: # of TXBDs for IuDMA managed by FAP */
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#define FAP_ENET_NR_TXBDS HOST_ENET_NR_TXBDS
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#define FAP_XTM_NR_TXBDS HOST_XTM_NR_TXBDS
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#endif
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#if defined(CONFIG_BCM96368)
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/* FWD: # of buffers assigned to RXBDs
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* XTM should be atleast 512 because of bonding */
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#define HOST_ENET_NR_RXBDS_MIN 600
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#define HOST_XTM_NR_RXBDS_MIN 512
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/* FWD: # of RXBDs for non-default channels */
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#define FWD_ENET_NON_DEF_CHNL_NR_RXBDS HOST_ENET_NON_DEF_CHNL_NR_RXBDS
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#define FWD_XTM_NON_DEF_CHNL_NR_RXBDS HOST_XTM_NON_DEF_CHNL_NR_RXBDS
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/* FWD: # of RXBDs for IuDMA managed by FWD */
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#define FWD_ENET_NR_TXBDS HOST_ENET_NR_TXBDS
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#define FWD_XTM_NR_TXBDS HOST_XTM_NR_TXBDS
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#endif
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#else // (defined(CONFIG_BCM_INGQOS) || defined(CONFIG_BCM_INGQOS_MODULE) || defined(CONFIG_BCM_BPM) || defined(CONFIG_BCM_BPM_MODULE))
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/* Channel-0 is default */
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/* Fixed # of RXBDs for non-default channels */
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#define HOST_ENET_NON_DEF_CHNL_NR_RXBDS 100
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#define HOST_XTM_NON_DEF_CHNL_NR_RXBDS 16
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#if defined(CONFIG_BCM_MOCA_SOFT_SWITCHING)
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#define HOST_ENET_NR_RXBDS 4000
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#else
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#define HOST_ENET_NR_RXBDS 400
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#endif
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#if defined(CONFIG_BCM96338) || defined(CHIP_6338)
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/* 38 needs a bigger cell queue for soft sar (64 bytes each) */
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#define HOST_XTM_NR_RXBDS 500
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#else
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#define HOST_XTM_NR_RXBDS HOST_ENET_NR_RXBDS
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#endif
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/* Host/MIPS: # of TXBDs for IuDMA managed by host */
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#define HOST_ENET_NR_TXBDS 200
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#define HOST_XTM_NR_TXBDS HOST_ENET_NR_RXBDS
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#define MOCA_TXQ_DEPTH_MAX 3000
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#if defined(CONFIG_BCM96362) || defined(CONFIG_BCM963268) || defined(CONFIG_BCM96828)
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/* FAP: # of buffers assigned to RXBDs */
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#define FAP_ENET_NR_RXBDS HOST_ENET_NR_RXBDS
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#define FAP_XTM_NR_RXBDS HOST_XTM_NR_RXBDS
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/* FAP: # of RXBDs for non-default channels */
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#define FAP_ENET_NON_DEF_CHNL_NR_RXBDS HOST_ENET_NON_DEF_CHNL_NR_RXBDS
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#define FAP_XTM_NON_DEF_CHNL_NR_RXBDS HOST_XTM_NON_DEF_CHNL_NR_RXBDS
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/* FAP: # of TXBDs for IuDMA managed by FAP */
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#define FAP_ENET_NR_TXBDS HOST_ENET_NR_TXBDS
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#define FAP_XTM_NR_TXBDS HOST_XTM_NR_TXBDS
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#endif
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#if defined(CONFIG_BCM96368)
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/* FWD: # of buffers assigned to RXBDs
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* XTM should be atleast 512 because of bonding */
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#define FWD_ENET_NR_RXBDS 600
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#define FWD_XTM_NR_RXBDS 512
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/* FWD: # of RXBDs for non-default channels */
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#define FWD_ENET_NON_DEF_CHNL_NR_RXBDS HOST_ENET_NON_DEF_CHNL_NR_RXBDS
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#define FWD_XTM_NON_DEF_CHNL_NR_RXBDS HOST_XTM_NON_DEF_CHNL_NR_RXBDS
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/* FWD: # of TXBDs for IuDMA managed by FWD */
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#define FWD_ENET_NR_TXBDS 500
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#define FWD_XTM_NR_TXBDS 400
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#endif
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#endif // (defined(CONFIG_BCM_INGQOS) || defined(CONFIG_BCM_INGQOS_MODULE) || defined(CONFIG_BCM_BPM) || defined(CONFIG_BCM_BPM_MODULE))
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#endif /* __PKTDMA_DEFINES_H_INCLUDED__ */
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