Pull networking changes from Paolo Abeni: "Core: - Refactor the forward memory allocation to better cope with memory pressure with many open sockets, moving from a per socket cache to a per-CPU one - Replace rwlocks with RCU for better fairness in ping, raw sockets and IP multicast router. - Network-side support for IO uring zero-copy send. - A few skb drop reason improvements, including codegen the source file with string mapping instead of using macro magic. - Rename reference tracking helpers to a more consistent netdev_* schema. - Adapt u64_stats_t type to address load/store tearing issues. - Refine debug helper usage to reduce the log noise caused by bots. BPF: - Improve socket map performance, avoiding skb cloning on read operation. - Add support for 64 bits enum, to match types exposed by kernel. - Introduce support for sleepable uprobes program. - Introduce support for enum textual representation in libbpf. - New helpers to implement synproxy with eBPF/XDP. - Improve loop performances, inlining indirect calls when possible. - Removed all the deprecated libbpf APIs. - Implement new eBPF-based LSM flavor. - Add type match support, which allow accurate queries to the eBPF used types. - A few TCP congetsion control framework usability improvements. - Add new infrastructure to manipulate CT entries via eBPF programs. - Allow for livepatch (KLP) and BPF trampolines to attach to the same kernel function. Protocols: - Introduce per network namespace lookup tables for unix sockets, increasing scalability and reducing contention. - Preparation work for Wi-Fi 7 Multi-Link Operation (MLO) support. - Add support to forciby close TIME_WAIT TCP sockets via user-space tools. - Significant performance improvement for the TLS 1.3 receive path, both for zero-copy and not-zero-copy. - Support for changing the initial MTPCP subflow priority/backup status - Introduce virtually contingus buffers for sockets over RDMA, to cope better with memory pressure. - Extend CAN ethtool support with timestamping capabilities - Refactor CAN build infrastructure to allow building only the needed features. Driver API: - Remove devlink mutex to allow parallel commands on multiple links. - Add support for pause stats in distributed switch. - Implement devlink helpers to query and flash line cards. - New helper for phy mode to register conversion. New hardware / drivers: - Ethernet DSA driver for the rockchip mt7531 on BPI-R2 Pro. - Ethernet DSA driver for the Renesas RZ/N1 A5PSW switch. - Ethernet DSA driver for the Microchip LAN937x switch. - Ethernet PHY driver for the Aquantia AQR113C EPHY. - CAN driver for the OBD-II ELM327 interface. - CAN driver for RZ/N1 SJA1000 CAN controller. - Bluetooth: Infineon CYW55572 Wi-Fi plus Bluetooth combo device. Drivers: - Intel Ethernet NICs: - i40e: add support for vlan pruning - i40e: add support for XDP framented packets - ice: improved vlan offload support - ice: add support for PPPoE offload - Mellanox Ethernet (mlx5) - refactor packet steering offload for performance and scalability - extend support for TC offload - refactor devlink code to clean-up the locking schema - support stacked vlans for bridge offloads - use TLS objects pool to improve connection rate - Netronome Ethernet NICs (nfp): - extend support for IPv6 fields mangling offload - add support for vepa mode in HW bridge - better support for virtio data path acceleration (VDPA) - enable TSO by default - Microsoft vNIC driver (mana) - add support for XDP redirect - Others Ethernet drivers: - bonding: add per-port priority support - microchip lan743x: extend phy support - Fungible funeth: support UDP segmentation offload and XDP xmit - Solarflare EF100: add support for virtual function representors - MediaTek SoC: add XDP support - Mellanox Ethernet/IB switch (mlxsw): - dropped support for unreleased H/W (XM router). - improved stats accuracy - unified bridge model coversion improving scalability (parts 1-6) - support for PTP in Spectrum-2 asics - Broadcom PHYs - add PTP support for BCM54210E - add support for the BCM53128 internal PHY - Marvell Ethernet switches (prestera): - implement support for multicast forwarding offload - Embedded Ethernet switches: - refactor OcteonTx MAC filter for better scalability - improve TC H/W offload for the Felix driver - refactor the Microchip ksz8 and ksz9477 drivers to share the probe code (parts 1, 2), add support for phylink mac configuration - Other WiFi: - Microchip wilc1000: diable WEP support and enable WPA3 - Atheros ath10k: encapsulation offload support Old code removal: - Neterion vxge ethernet driver: this is untouched since more than 10 years" * tag 'net-next-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1890 commits) doc: sfp-phylink: Fix a broken reference wireguard: selftests: support UML wireguard: allowedips: don't corrupt stack when detecting overflow wireguard: selftests: update config fragments wireguard: ratelimiter: use hrtimer in selftest net/mlx5e: xsk: Discard unaligned XSK frames on striding RQ net: usb: ax88179_178a: Bind only to vendor-specific interface selftests: net: fix IOAM test skip return code net: usb: make USB_RTL8153_ECM non user configurable net: marvell: prestera: remove reduntant code octeontx2-pf: Reduce minimum mtu size to 60 net: devlink: Fix missing mutex_unlock() call net/tls: Remove redundant workqueue flush before destroy net: txgbe: Fix an error handling path in txgbe_probe() net: dsa: Fix spelling mistakes and cleanup code Documentation: devlink: add add devlink-selftests to the table of contents dccp: put dccp_qpolicy_full() and dccp_qpolicy_push() in the same lock net: ionic: fix error check for vlan flags in ionic_set_nic_features() net: ice: fix error NETIF_F_HW_VLAN_CTAG_FILTER check in ice_vsi_sync_fltr() nfp: flower: add support for tunnel offload without key ID ...
611 lines
12 KiB
Plaintext
611 lines
12 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2018 SolidRun ltd.
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* Based on Marvell MACCHIATOBin board
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*
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* Device Tree file for SolidRun's ClearFog GT 8K
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*/
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#include "armada-8040.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "SolidRun ClearFog GT 8K";
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compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
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"marvell,armada-ap806-quad", "marvell,armada-ap806";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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aliases {
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ethernet0 = &cp1_eth1;
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ethernet1 = &cp0_eth0;
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ethernet2 = &cp1_eth2;
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};
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fan: pwm {
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compatible = "pwm-fan";
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/* 20% steps */
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cooling-levels = <0 51 102 153 204 255>;
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#cooling-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_fan_pwm_pins>;
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pwms = <&cp0_gpio2 16 40000>;
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};
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v_3_3: regulator-3-3v {
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compatible = "regulator-fixed";
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regulator-name = "v_3_3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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status = "okay";
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};
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v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
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compatible = "regulator-fixed";
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gpio = <&cp0_gpio2 15 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_xhci_vbus_pins>;
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regulator-name = "v_5v0_usb3_hst_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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status = "okay";
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};
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sfp_cp0_eth0: sfp-cp0-eth0 {
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compatible = "sff,sfp";
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i2c-bus = <&cp0_i2c1>;
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mod-def0-gpios = <&cp0_gpio2 17 GPIO_ACTIVE_LOW>;
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tx-disable-gpios = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_sfp_present_pins &cp1_sfp_tx_disable_pins>;
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maximum-power-milliwatt = <2000>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&cp0_led0_pins
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&cp0_led1_pins>;
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pinctrl-names = "default";
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/* No designated function for these LEDs at the moment */
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led0 {
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label = "clearfog-gt-8k:green:led0";
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gpios = <&cp0_gpio2 8 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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led1 {
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label = "clearfog-gt-8k:green:led1";
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gpios = <&cp0_gpio2 9 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&cp0_gpio_reset_pins &cp1_wps_button_pins>;
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pinctrl-names = "default";
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button-0 {
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/* The rear button */
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label = "Rear Button";
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gpios = <&cp0_gpio2 7 GPIO_ACTIVE_LOW>;
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linux,can-disable;
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linux,code = <BTN_0>;
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};
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button-1 {
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/* The wps button */
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label = "WPS Button";
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gpios = <&cp1_gpio1 30 GPIO_ACTIVE_LOW>;
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linux,can-disable;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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};
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&ap_thermal_ic {
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polling-delay = <1000>; /* milliseconds */
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trips {
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ap_active: trip-active {
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temperature = <40000>; /* millicelsius */
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hysteresis = <4000>; /* millicelsius */
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type = "active";
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};
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};
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cooling-maps {
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map0 {
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trip = <&ap_active>;
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cooling-device = <&fan THERMAL_NO_LIMIT 4>;
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};
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map1 {
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trip = <&ap_crit>;
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cooling-device = <&fan 4 5>;
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};
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};
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};
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&cp0_thermal_ic {
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polling-delay = <1000>; /* milliseconds */
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trips {
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cp0_active0: trip-active0 {
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temperature = <40000>; /* millicelsius */
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hysteresis = <2500>; /* millicelsius */
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type = "active";
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};
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cp0_active1: trip-active1 {
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temperature = <45000>; /* millicelsius */
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hysteresis = <2500>; /* millicelsius */
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type = "active";
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};
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cp0_active2: trip-active2 {
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temperature = <50000>; /* millicelsius */
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hysteresis = <2500>; /* millicelsius */
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type = "active";
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};
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cp0_active3: trip-active3 {
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temperature = <60000>; /* millicelsius */
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hysteresis = <2500>; /* millicelsius */
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type = "active";
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};
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};
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cooling-maps {
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map0 {
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trip = <&cp0_active0>;
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cooling-device = <&fan 0 1>;
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};
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map1 {
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trip = <&cp0_active1>;
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cooling-device = <&fan 1 2>;
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};
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map2 {
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trip = <&cp0_active2>;
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cooling-device = <&fan 2 3>;
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};
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map3 {
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trip = <&cp0_active3>;
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cooling-device = <&fan 3 4>;
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};
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map4 {
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trip = <&cp0_crit>;
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cooling-device = <&fan 4 5>;
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};
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};
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};
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&cp1_thermal_ic {
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polling-delay = <1000>; /* milliseconds */
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trips {
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cp1_active0: trip-active0 {
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temperature = <40000>; /* millicelsius */
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hysteresis = <2500>; /* millicelsius */
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type = "active";
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};
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cp1_active1: trip-active1 {
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temperature = <45000>; /* millicelsius */
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hysteresis = <2500>; /* millicelsius */
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type = "active";
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};
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cp1_active2: trip-active2 {
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temperature = <50000>; /* millicelsius */
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hysteresis = <2500>; /* millicelsius */
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type = "active";
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};
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cp1_active3: trip-active3 {
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temperature = <60000>; /* millicelsius */
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hysteresis = <2500>; /* millicelsius */
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type = "active";
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};
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};
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cooling-maps {
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map0 {
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trip = <&cp1_active0>;
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cooling-device = <&fan 0 1>;
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};
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map1 {
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trip = <&cp1_active1>;
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cooling-device = <&fan 1 2>;
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};
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map2 {
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trip = <&cp1_active2>;
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cooling-device = <&fan 2 3>;
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};
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map3 {
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trip = <&cp1_active3>;
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cooling-device = <&fan 3 4>;
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};
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map4 {
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trip = <&cp1_crit>;
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cooling-device = <&fan 4 5>;
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};
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};
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};
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&uart0 {
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status = "okay";
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pinctrl-0 = <&uart0_pins>;
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pinctrl-names = "default";
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};
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&ap_sdhci0 {
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bus-width = <8>;
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no-1-8-v;
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no-sd;
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no-sdio;
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non-removable;
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status = "okay";
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vqmmc-supply = <&v_3_3>;
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};
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&cp0_i2c0 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c0_pins>;
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status = "okay";
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};
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&cp0_i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c1_pins>;
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status = "okay";
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};
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&cp0_pinctrl {
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/*
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* MPP Bus:
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* [0-31] = 0xff: Keep default CP0_shared_pins:
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* [11] CLKOUT_MPP_11 (out)
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* [23] LINK_RD_IN_CP2CP (in)
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* [25] CLKOUT_MPP_25 (out)
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* [29] AVS_FB_IN_CP2CP (in)
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* [32, 33, 34] pci0/1/2 reset
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* [35-38] CP0 I2C1 and I2C0
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* [39] GPIO reset button
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* [40,41] LED0 and LED1
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* [43] 1512 phy reset
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* [47] USB VBUS EN (active low)
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* [48] FAN PWM
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* [49] SFP+ present signal
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* [50] TPM interrupt
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* [51] WLAN0 disable
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* [52] WLAN1 disable
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* [53] LTE disable
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* [54] NFC reset
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* [55] Micro SD card detect
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* [56-61] Micro SD
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*/
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cp0_pci0_reset_pins: pci0-reset-pins {
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marvell,pins = "mpp32";
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marvell,function = "gpio";
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};
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cp0_pci1_reset_pins: pci1-reset-pins {
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marvell,pins = "mpp33";
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marvell,function = "gpio";
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};
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cp0_pci2_reset_pins: pci2-reset-pins {
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marvell,pins = "mpp34";
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marvell,function = "gpio";
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};
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cp0_i2c1_pins: i2c1-pins {
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marvell,pins = "mpp35", "mpp36";
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marvell,function = "i2c1";
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};
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cp0_i2c0_pins: i2c0-pins {
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marvell,pins = "mpp37", "mpp38";
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marvell,function = "i2c0";
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};
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cp0_gpio_reset_pins: gpio-reset-pins {
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marvell,pins = "mpp39";
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marvell,function = "gpio";
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};
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cp0_led0_pins: led0-pins {
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marvell,pins = "mpp40";
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marvell,function = "gpio";
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};
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cp0_led1_pins: led1-pins {
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marvell,pins = "mpp41";
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marvell,function = "gpio";
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};
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cp0_copper_eth_phy_reset: copper-eth-phy-reset {
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marvell,pins = "mpp43";
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marvell,function = "gpio";
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};
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cp0_xhci_vbus_pins: xhci0-vbus-pins {
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marvell,pins = "mpp47";
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marvell,function = "gpio";
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};
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cp0_fan_pwm_pins: fan-pwm-pins {
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marvell,pins = "mpp48";
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marvell,function = "gpio";
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};
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cp0_sfp_present_pins: sfp-present-pins {
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marvell,pins = "mpp49";
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marvell,function = "gpio";
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};
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cp0_tpm_irq_pins: tpm-irq-pins {
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marvell,pins = "mpp50";
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marvell,function = "gpio";
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};
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cp0_wlan_disable_pins: wlan-disable-pins {
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marvell,pins = "mpp51";
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marvell,function = "gpio";
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};
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cp0_sdhci_pins: sdhci-pins {
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marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
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"mpp60", "mpp61";
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marvell,function = "sdio";
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};
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};
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&cp0_pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_pci0_reset_pins &cp0_wlan_disable_pins>;
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reset-gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
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phys = <&cp0_comphy0 0>;
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phy-names = "cp0-pcie0-x1-phy";
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status = "okay";
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};
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&cp0_gpio2 {
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sata_reset {
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gpio-hog;
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gpios = <1 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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lte_reset {
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gpio-hog;
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gpios = <2 GPIO_ACTIVE_LOW>;
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output-low;
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};
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wlan_disable {
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gpio-hog;
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gpios = <19 GPIO_ACTIVE_LOW>;
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output-low;
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};
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lte_disable {
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gpio-hog;
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gpios = <21 GPIO_ACTIVE_LOW>;
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output-low;
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};
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};
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&cp0_ethernet {
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status = "okay";
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};
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/* SFP */
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&cp0_eth0 {
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status = "okay";
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phy-mode = "10gbase-r";
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managed = "in-band-status";
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phys = <&cp0_comphy2 0>;
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sfp = <&sfp_cp0_eth0>;
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};
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&cp0_sdhci0 {
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broken-cd;
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_sdhci_pins>;
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status = "okay";
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vqmmc-supply = <&v_3_3>;
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};
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&cp0_usb3_1 {
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status = "okay";
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};
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&cp1_pinctrl {
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/*
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* MPP Bus:
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* [0-5] TDM
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* [6] VHV Enable
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* [7] CP1 SPI0 CSn1 (FXS)
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* [8] CP1 SPI0 CSn0 (TPM)
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* [9.11]CP1 SPI0 MOSI/MISO/CLK
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* [13] CP1 SPI1 MISO (TDM and SPI ROM shared)
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* [14] CP1 SPI1 CS0n (64Mb SPI ROM)
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* [15] CP1 SPI1 MOSI (TDM and SPI ROM shared)
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* [16] CP1 SPI1 CLK (TDM and SPI ROM shared)
|
|
* [24] Topaz switch reset
|
|
* [26] Buzzer
|
|
* [27] CP1 SMI MDIO
|
|
* [28] CP1 SMI MDC
|
|
* [29] CP0 10G SFP TX Disable
|
|
* [30] WPS button
|
|
* [31] Front panel button
|
|
*/
|
|
|
|
cp1_spi1_pins: spi1-pins {
|
|
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
|
marvell,function = "spi1";
|
|
};
|
|
|
|
cp1_switch_reset_pins: switch-reset-pins {
|
|
marvell,pins = "mpp24";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
cp1_ge_mdio_pins: ge-mdio-pins {
|
|
marvell,pins = "mpp27", "mpp28";
|
|
marvell,function = "ge";
|
|
};
|
|
|
|
cp1_sfp_tx_disable_pins: sfp-tx-disable-pins {
|
|
marvell,pins = "mpp29";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
cp1_wps_button_pins: wps-button-pins {
|
|
marvell,pins = "mpp30";
|
|
marvell,function = "gpio";
|
|
};
|
|
};
|
|
|
|
&cp1_sata0 {
|
|
pinctrl-0 = <&cp0_pci1_reset_pins>;
|
|
status = "okay";
|
|
|
|
sata-port@1 {
|
|
phys = <&cp1_comphy0 1>;
|
|
phy-names = "cp1-sata0-1-phy";
|
|
};
|
|
};
|
|
|
|
&cp1_mdio {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&cp1_ge_mdio_pins>;
|
|
status = "okay";
|
|
|
|
ge_phy: ethernet-phy@0 {
|
|
/* LED0 - GB link
|
|
* LED1 - on: link, blink: activity
|
|
*/
|
|
marvell,reg-init = <3 16 0 0x1017>;
|
|
reg = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&cp0_copper_eth_phy_reset>;
|
|
reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
|
|
reset-assert-us = <10000>;
|
|
reset-deassert-us = <10000>;
|
|
};
|
|
|
|
switch0: switch0@4 {
|
|
compatible = "marvell,mv88e6085";
|
|
reg = <4>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&cp1_switch_reset_pins>;
|
|
reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
label = "lan2";
|
|
phy-handle = <&switch0phy0>;
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
label = "lan1";
|
|
phy-handle = <&switch0phy1>;
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
label = "lan4";
|
|
phy-handle = <&switch0phy2>;
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
label = "lan3";
|
|
phy-handle = <&switch0phy3>;
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
label = "cpu";
|
|
ethernet = <&cp1_eth2>;
|
|
phy-mode = "2500base-x";
|
|
managed = "in-band-status";
|
|
};
|
|
};
|
|
|
|
mdio {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
switch0phy0: switch0phy0@11 {
|
|
reg = <0x11>;
|
|
};
|
|
|
|
switch0phy1: switch0phy1@12 {
|
|
reg = <0x12>;
|
|
};
|
|
|
|
switch0phy2: switch0phy2@13 {
|
|
reg = <0x13>;
|
|
};
|
|
|
|
switch0phy3: switch0phy3@14 {
|
|
reg = <0x14>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&cp1_ethernet {
|
|
status = "okay";
|
|
};
|
|
|
|
/* 1G copper */
|
|
&cp1_eth1 {
|
|
status = "okay";
|
|
phy-mode = "sgmii";
|
|
phy = <&ge_phy>;
|
|
phys = <&cp1_comphy3 1>;
|
|
};
|
|
|
|
/* Switch uplink */
|
|
&cp1_eth2 {
|
|
status = "okay";
|
|
phy-mode = "2500base-x";
|
|
phys = <&cp1_comphy5 2>;
|
|
managed = "in-band-status";
|
|
};
|
|
|
|
&cp1_spi1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&cp1_spi1_pins>;
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "st,w25q32";
|
|
spi-max-frequency = <50000000>;
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
&cp1_comphy2 {
|
|
cp1_usbh0_con: connector {
|
|
compatible = "usb-a-connector";
|
|
phy-supply = <&v_5v0_usb3_hst_vbus>;
|
|
};
|
|
};
|
|
|
|
&cp1_usb3_0 {
|
|
phys = <&cp1_comphy2 0>;
|
|
phy-names = "cp1-usb3h0-comphy";
|
|
status = "okay";
|
|
};
|