0381830b41
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 48247
137 lines
4.2 KiB
Diff
137 lines
4.2 KiB
Diff
From 269f19c848a2380db03a3f207cafb88e28d71c53 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Sun, 24 Mar 2013 19:26:28 +0100
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Subject: [PATCH] rt2x00: rt2800lib: add channel configuration code for RT3883
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 72 +++++++++++++++++++++++++++++--
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1 file changed, 69 insertions(+), 3 deletions(-)
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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@@ -3406,6 +3406,36 @@ static char rt2800_txpower_to_dev(struct
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return clamp_t(char, txpower, MIN_A_TXPOWER, MAX_A_TXPOWER);
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}
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+static void rt3883_bbp_adjust(struct rt2x00_dev *rt2x00dev,
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+ struct rf_channel *rf)
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+{
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+ u8 bbp;
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+
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+ bbp = (rf->channel > 14) ? 0x48 : 0x38;
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+ rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, bbp);
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+
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+ rt2800_bbp_write(rt2x00dev, 69, 0x12);
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+
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+ if (rf->channel <= 14) {
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+ rt2800_bbp_write(rt2x00dev, 70, 0x0a);
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+ } else {
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+ /* Disable CCK packet detection */
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+ rt2800_bbp_write(rt2x00dev, 70, 0x00);
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+ }
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+
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+ rt2800_bbp_write(rt2x00dev, 73, 0x10);
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+
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+ if (rf->channel > 14) {
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+ rt2800_bbp_write(rt2x00dev, 62, 0x1d);
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+ rt2800_bbp_write(rt2x00dev, 63, 0x1d);
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+ rt2800_bbp_write(rt2x00dev, 64, 0x1d);
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+ } else {
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+ rt2800_bbp_write(rt2x00dev, 62, 0x2d);
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+ rt2800_bbp_write(rt2x00dev, 63, 0x2d);
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+ rt2800_bbp_write(rt2x00dev, 64, 0x2d);
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+ }
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+}
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+
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static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
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struct ieee80211_conf *conf,
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struct rf_channel *rf,
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@@ -3424,6 +3454,12 @@ static void rt2800_config_channel(struct
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rt2800_txpower_to_dev(rt2x00dev, rf->channel,
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info->default_power3);
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+ switch (rt2x00dev->chip.rt) {
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+ case RT3883:
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+ rt3883_bbp_adjust(rt2x00dev, rf);
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+ break;
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+ }
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+
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switch (rt2x00dev->chip.rf) {
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case RF2020:
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case RF3020:
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@@ -3507,6 +3543,15 @@ static void rt2800_config_channel(struct
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rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
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rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
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rt2800_bbp_write(rt2x00dev, 77, 0x98);
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+ } else if (rt2x00_rt(rt2x00dev, RT3883)) {
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+ rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
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+ rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
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+ rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
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+
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+ if (rt2x00dev->default_ant.rx_chain_num > 1)
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+ rt2800_bbp_write(rt2x00dev, 86, 0x46);
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+ else
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+ rt2800_bbp_write(rt2x00dev, 86, 0);
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} else {
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rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
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rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
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@@ -3519,6 +3564,7 @@ static void rt2800_config_channel(struct
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!rt2x00_rt(rt2x00dev, RT5392)) {
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if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
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rt2800_bbp_write(rt2x00dev, 82, 0x62);
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+ rt2800_bbp_write(rt2x00dev, 82, 0x62);
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rt2800_bbp_write(rt2x00dev, 75, 0x46);
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} else {
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if (rt2x00_rt(rt2x00dev, RT3593))
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@@ -3527,19 +3573,22 @@ static void rt2800_config_channel(struct
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rt2800_bbp_write(rt2x00dev, 82, 0x84);
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rt2800_bbp_write(rt2x00dev, 75, 0x50);
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}
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- if (rt2x00_rt(rt2x00dev, RT3593))
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+ if (rt2x00_rt(rt2x00dev, RT3593) ||
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+ rt2x00_rt(rt2x00dev, RT3883))
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rt2800_bbp_write(rt2x00dev, 83, 0x8a);
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}
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} else {
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if (rt2x00_rt(rt2x00dev, RT3572))
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rt2800_bbp_write(rt2x00dev, 82, 0x94);
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- else if (rt2x00_rt(rt2x00dev, RT3593))
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+ else if (rt2x00_rt(rt2x00dev, RT3593) ||
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+ rt2x00_rt(rt2x00dev, RT3883))
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rt2800_bbp_write(rt2x00dev, 82, 0x82);
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else
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rt2800_bbp_write(rt2x00dev, 82, 0xf2);
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- if (rt2x00_rt(rt2x00dev, RT3593))
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+ if (rt2x00_rt(rt2x00dev, RT3593) ||
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+ rt2x00_rt(rt2x00dev, RT3883))
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rt2800_bbp_write(rt2x00dev, 83, 0x9a);
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if (rt2x00_has_cap_external_lna_a(rt2x00dev))
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@@ -3661,6 +3710,23 @@ static void rt2800_config_channel(struct
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rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg);
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+ usleep_range(1000, 1500);
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+ }
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+
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+ if (rt2x00_rt(rt2x00dev, RT3883)) {
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+ if (!conf_is_ht40(conf))
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+ rt2800_bbp_write(rt2x00dev, 105, 0x34);
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+ else
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+ rt2800_bbp_write(rt2x00dev, 105, 0x04);
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+
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+ /* AGC init */
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+ if (rf->channel <= 14)
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+ reg = 0x2e + rt2x00dev->lna_gain;
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+ else
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+ reg = 0x20 + ((rt2x00dev->lna_gain * 5) / 3);
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+
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+ rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg);
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+
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usleep_range(1000, 1500);
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}
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