300 lines
6.4 KiB
C
300 lines
6.4 KiB
C
/*
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* Atheros PB44 board SPI controller driver
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*
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* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ar71xx/platform.h>
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#define DRV_DESC "Atheros PB44 SPI Controller driver"
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#define DRV_VERSION "0.1.0"
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#define DRV_NAME "pb44-spi"
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#undef PER_BIT_READ
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struct ar71xx_spi {
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struct spi_bitbang bitbang;
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u32 ioc_base;
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u32 reg_ctrl;
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void __iomem *base;
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struct platform_device *pdev;
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};
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static inline u32 pb44_spi_rr(struct ar71xx_spi *sp, unsigned reg)
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{
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return __raw_readl(sp->base + reg);
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}
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static inline void pb44_spi_wr(struct ar71xx_spi *sp, unsigned reg, u32 val)
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{
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__raw_writel(val, sp->base + reg);
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}
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static inline struct ar71xx_spi *spidev_to_sp(struct spi_device *spi)
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{
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return spi_master_get_devdata(spi->master);
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}
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static void pb44_spi_chipselect(struct spi_device *spi, int is_active)
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{
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struct ar71xx_spi *sp = spidev_to_sp(spi);
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int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;
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if (is_active) {
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/* set initial clock polarity */
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if (spi->mode & SPI_CPOL)
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sp->ioc_base |= SPI_IOC_CLK;
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else
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sp->ioc_base &= ~SPI_IOC_CLK;
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pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
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}
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if (spi->chip_select) {
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unsigned long gpio = (unsigned long) spi->controller_data;
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/* SPI is normally active-low */
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gpio_set_value(gpio, cs_high);
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} else {
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if (cs_high)
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sp->ioc_base |= SPI_IOC_CS0;
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else
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sp->ioc_base &= ~SPI_IOC_CS0;
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pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
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}
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}
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static int pb44_spi_setup_cs(struct spi_device *spi)
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{
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struct ar71xx_spi *sp = spidev_to_sp(spi);
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/* enable GPIO mode */
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pb44_spi_wr(sp, SPI_REG_FS, SPI_FS_GPIO);
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/* save CTRL register */
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sp->reg_ctrl = pb44_spi_rr(sp, SPI_REG_CTRL);
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sp->ioc_base = pb44_spi_rr(sp, SPI_REG_IOC);
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/* TODO: setup speed? */
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pb44_spi_wr(sp, SPI_REG_CTRL, 0x43);
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if (spi->chip_select) {
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unsigned long gpio = (unsigned long) spi->controller_data;
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int status = 0;
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status = gpio_request(gpio, dev_name(&spi->dev));
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if (status)
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return status;
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status = gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH);
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if (status) {
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gpio_free(gpio);
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return status;
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}
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} else {
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if (spi->mode & SPI_CS_HIGH)
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sp->ioc_base |= SPI_IOC_CS0;
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else
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sp->ioc_base &= ~SPI_IOC_CS0;
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pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
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}
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return 0;
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}
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static void pb44_spi_cleanup_cs(struct spi_device *spi)
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{
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struct ar71xx_spi *sp = spidev_to_sp(spi);
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if (spi->chip_select) {
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unsigned long gpio = (unsigned long) spi->controller_data;
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gpio_free(gpio);
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}
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/* restore CTRL register */
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pb44_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl);
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/* disable GPIO mode */
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pb44_spi_wr(sp, SPI_REG_FS, 0);
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}
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static int pb44_spi_setup(struct spi_device *spi)
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{
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int status = 0;
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if (spi->bits_per_word > 32)
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return -EINVAL;
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if (!spi->controller_state) {
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status = pb44_spi_setup_cs(spi);
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if (status)
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return status;
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}
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status = spi_bitbang_setup(spi);
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if (status && !spi->controller_state)
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pb44_spi_cleanup_cs(spi);
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return status;
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}
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static void pb44_spi_cleanup(struct spi_device *spi)
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{
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pb44_spi_cleanup_cs(spi);
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spi_bitbang_cleanup(spi);
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}
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static u32 pb44_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
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u32 word, u8 bits)
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{
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struct ar71xx_spi *sp = spidev_to_sp(spi);
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u32 ioc = sp->ioc_base;
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u32 ret;
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/* clock starts at inactive polarity */
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for (word <<= (32 - bits); likely(bits); bits--) {
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u32 out;
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if (word & (1 << 31))
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out = ioc | SPI_IOC_DO;
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else
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out = ioc & ~SPI_IOC_DO;
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/* setup MSB (to slave) on trailing edge */
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pb44_spi_wr(sp, SPI_REG_IOC, out);
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pb44_spi_wr(sp, SPI_REG_IOC, out | SPI_IOC_CLK);
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word <<= 1;
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#ifdef PER_BIT_READ
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/* sample MSB (from slave) on leading edge */
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ret = pb44_spi_rr(sp, SPI_REG_RDS);
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pb44_spi_wr(sp, SPI_REG_IOC, out);
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#endif
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}
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#ifndef PER_BIT_READ
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ret = pb44_spi_rr(sp, SPI_REG_RDS);
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#endif
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return ret;
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}
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static int pb44_spi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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struct ar71xx_spi *sp;
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struct ar71xx_spi_platform_data *pdata;
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struct resource *r;
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int ret;
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master = spi_alloc_master(&pdev->dev, sizeof(*sp));
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if (master == NULL) {
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dev_err(&pdev->dev, "failed to allocate spi master\n");
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return -ENOMEM;
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}
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sp = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, sp);
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pdata = pdev->dev.platform_data;
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master->setup = pb44_spi_setup;
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master->cleanup = pb44_spi_cleanup;
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if (pdata) {
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master->bus_num = pdata->bus_num;
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master->num_chipselect = pdata->num_chipselect;
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} else {
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master->bus_num = 0;
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master->num_chipselect = 1;
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}
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sp->bitbang.master = spi_master_get(master);
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sp->bitbang.chipselect = pb44_spi_chipselect;
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sp->bitbang.txrx_word[SPI_MODE_0] = pb44_spi_txrx_mode0;
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sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
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sp->bitbang.flags = SPI_CS_HIGH;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (r == NULL) {
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ret = -ENOENT;
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goto err1;
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}
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sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
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if (!sp->base) {
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ret = -ENXIO;
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goto err1;
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}
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ret = spi_bitbang_start(&sp->bitbang);
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if (!ret)
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return 0;
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iounmap(sp->base);
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err1:
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platform_set_drvdata(pdev, NULL);
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spi_master_put(sp->bitbang.master);
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return ret;
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}
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static int pb44_spi_remove(struct platform_device *pdev)
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{
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struct ar71xx_spi *sp = platform_get_drvdata(pdev);
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spi_bitbang_stop(&sp->bitbang);
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iounmap(sp->base);
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platform_set_drvdata(pdev, NULL);
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spi_master_put(sp->bitbang.master);
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return 0;
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}
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static struct platform_driver pb44_spi_drv = {
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.probe = pb44_spi_probe,
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.remove = pb44_spi_remove,
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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},
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};
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static int __init pb44_spi_init(void)
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{
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return platform_driver_register(&pb44_spi_drv);
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}
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module_init(pb44_spi_init);
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static void __exit pb44_spi_exit(void)
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{
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platform_driver_unregister(&pb44_spi_drv);
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}
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module_exit(pb44_spi_exit);
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MODULE_ALIAS("platform:" DRV_NAME);
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MODULE_DESCRIPTION(DRV_DESC);
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MODULE_VERSION(DRV_VERSION);
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
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MODULE_LICENSE("GPL v2");
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