846 lines
21 KiB
C
846 lines
21 KiB
C
/*
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* ADM5120 HCD (Host Controller Driver) for USB
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*
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* Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
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*
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* This file was derived from: drivers/usb/host/ohci-hcd.c
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
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*
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* [ Initialisation is based on Linus' ]
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* [ uhci code and gregs ahcd fragments ]
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* [ (C) Copyright 1999 Linus Torvalds ]
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* [ (C) Copyright 1999 Gregory P. Smith]
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/timer.h>
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#include <linux/list.h>
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#include <linux/usb.h>
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#include <linux/usb/otg.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmapool.h>
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#include <linux/reboot.h>
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#include <linux/debugfs.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/unaligned.h>
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#include <asm/byteorder.h>
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#include "../core/hcd.h"
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#include "../core/hub.h"
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#define DRIVER_VERSION "0.27.0"
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#define DRIVER_AUTHOR "Gabor Juhos <juhosg@openwrt.org>"
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#define DRIVER_DESC "ADMtek USB 1.1 Host Controller Driver"
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/*-------------------------------------------------------------------------*/
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#undef ADMHC_VERBOSE_DEBUG /* not always helpful */
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/* For initializing controller (mask in an HCFS mode too) */
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#define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
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#define ADMHC_INTR_INIT \
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( ADMHC_INTR_MIE | ADMHC_INTR_INSM | ADMHC_INTR_FATI \
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| ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI )
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/*-------------------------------------------------------------------------*/
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static const char hcd_name [] = "admhc-hcd";
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#define STATECHANGE_DELAY msecs_to_jiffies(300)
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#include "adm5120.h"
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static void admhc_dump(struct admhcd *ahcd, int verbose);
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static int admhc_init(struct admhcd *ahcd);
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static void admhc_stop(struct usb_hcd *hcd);
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#include "adm5120-dbg.c"
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#include "adm5120-mem.c"
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#include "adm5120-pm.c"
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#include "adm5120-hub.c"
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#include "adm5120-q.c"
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/*-------------------------------------------------------------------------*/
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/*
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* queue up an urb for anything except the root hub
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*/
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static int admhc_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
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gfp_t mem_flags)
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{
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struct admhcd *ahcd = hcd_to_admhcd(hcd);
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struct ed *ed;
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struct urb_priv *urb_priv;
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unsigned int pipe = urb->pipe;
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int td_cnt = 0;
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unsigned long flags;
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int ret = 0;
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#ifdef ADMHC_VERBOSE_DEBUG
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spin_lock_irqsave(&ahcd->lock, flags);
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urb_print(ahcd, urb, "ENQEUE", usb_pipein(pipe), -EINPROGRESS);
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spin_unlock_irqrestore(&ahcd->lock, flags);
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#endif
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/* every endpoint has an ed, locate and maybe (re)initialize it */
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ed = ed_get(ahcd, urb->ep, urb->dev, pipe, urb->interval);
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if (!ed)
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return -ENOMEM;
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/* for the private part of the URB we need the number of TDs */
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switch (ed->type) {
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case PIPE_CONTROL:
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if (urb->transfer_buffer_length > TD_DATALEN_MAX)
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/* td_submit_urb() doesn't yet handle these */
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return -EMSGSIZE;
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/* 1 TD for setup, 1 for ACK, plus ... */
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td_cnt = 2;
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/* FALLTHROUGH */
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case PIPE_BULK:
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/* one TD for every 4096 Bytes (can be upto 8K) */
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td_cnt += urb->transfer_buffer_length / TD_DATALEN_MAX;
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/* ... and for any remaining bytes ... */
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if ((urb->transfer_buffer_length % TD_DATALEN_MAX) != 0)
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td_cnt++;
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/* ... and maybe a zero length packet to wrap it up */
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if (td_cnt == 0)
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td_cnt++;
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else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
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&& (urb->transfer_buffer_length
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% usb_maxpacket(urb->dev, pipe,
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usb_pipeout (pipe))) == 0)
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td_cnt++;
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break;
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case PIPE_INTERRUPT:
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/*
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* for Interrupt IN/OUT transactions, each ED contains
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* only 1 TD.
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* TODO: check transfer_buffer_length?
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*/
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td_cnt = 1;
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break;
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case PIPE_ISOCHRONOUS:
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/* number of packets from URB */
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td_cnt = urb->number_of_packets;
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break;
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}
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urb_priv = urb_priv_alloc(ahcd, td_cnt, mem_flags);
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if (!urb_priv)
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return -ENOMEM;
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urb_priv->ed = ed;
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spin_lock_irqsave(&ahcd->lock, flags);
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/* don't submit to a dead HC */
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if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
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ret = -ENODEV;
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goto fail;
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}
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if (!HC_IS_RUNNING(hcd->state)) {
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ret = -ENODEV;
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goto fail;
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}
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ret = usb_hcd_link_urb_to_ep(hcd, urb);
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if (ret)
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goto fail;
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/* schedule the ed if needed */
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if (ed->state == ED_IDLE) {
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ret = ed_schedule(ahcd, ed);
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if (ret < 0) {
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usb_hcd_unlink_urb_from_ep(hcd, urb);
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goto fail;
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}
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if (ed->type == PIPE_ISOCHRONOUS) {
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u16 frame = admhc_frame_no(ahcd);
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/* delay a few frames before the first TD */
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frame += max_t (u16, 8, ed->interval);
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frame &= ~(ed->interval - 1);
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frame |= ed->branch;
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urb->start_frame = frame;
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/* yes, only URB_ISO_ASAP is supported, and
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* urb->start_frame is never used as input.
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*/
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}
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} else if (ed->type == PIPE_ISOCHRONOUS)
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urb->start_frame = ed->last_iso + ed->interval;
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/* fill the TDs and link them to the ed; and
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* enable that part of the schedule, if needed
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* and update count of queued periodic urbs
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*/
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urb->hcpriv = urb_priv;
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td_submit_urb(ahcd, urb);
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#ifdef ADMHC_VERBOSE_DEBUG
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admhc_dump_ed(ahcd, "admhc_urb_enqueue", urb_priv->ed, 1);
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#endif
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fail:
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if (ret)
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urb_priv_free(ahcd, urb_priv);
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spin_unlock_irqrestore(&ahcd->lock, flags);
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return ret;
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}
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/*
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* decouple the URB from the HC queues (TDs, urb_priv);
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* reporting is always done
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* asynchronously, and we might be dealing with an urb that's
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* partially transferred, or an ED with other urbs being unlinked.
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*/
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static int admhc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
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int status)
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{
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struct admhcd *ahcd = hcd_to_admhcd(hcd);
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&ahcd->lock, flags);
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#ifdef ADMHC_VERBOSE_DEBUG
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urb_print(ahcd, urb, "DEQUEUE", 1, status);
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#endif
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ret = usb_hcd_check_unlink_urb(hcd, urb, status);
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if (ret) {
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/* Do nothing */
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;
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} else if (HC_IS_RUNNING(hcd->state)) {
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struct urb_priv *urb_priv;
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/* Unless an IRQ completed the unlink while it was being
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* handed to us, flag it for unlink and giveback, and force
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* some upcoming INTR_SF to call finish_unlinks()
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*/
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urb_priv = urb->hcpriv;
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if (urb_priv) {
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if (urb_priv->ed->state == ED_OPER)
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start_ed_unlink(ahcd, urb_priv->ed);
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}
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} else {
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/*
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* with HC dead, we won't respect hc queue pointers
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* any more ... just clean up every urb's memory.
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*/
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if (urb->hcpriv)
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finish_urb(ahcd, urb, status);
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}
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spin_unlock_irqrestore(&ahcd->lock, flags);
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return ret;
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}
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/*-------------------------------------------------------------------------*/
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/* frees config/altsetting state for endpoints,
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* including ED memory, dummy TD, and bulk/intr data toggle
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*/
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static void admhc_endpoint_disable(struct usb_hcd *hcd,
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struct usb_host_endpoint *ep)
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{
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struct admhcd *ahcd = hcd_to_admhcd(hcd);
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unsigned long flags;
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struct ed *ed = ep->hcpriv;
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unsigned limit = 1000;
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/* ASSERT: any requests/urbs are being unlinked */
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/* ASSERT: nobody can be submitting urbs for this any more */
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if (!ed)
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return;
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#ifdef ADMHC_VERBOSE_DEBUG
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spin_lock_irqsave(&ahcd->lock, flags);
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admhc_dump_ed(ahcd, "EP-DISABLE", ed, 1);
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spin_unlock_irqrestore(&ahcd->lock, flags);
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#endif
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rescan:
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spin_lock_irqsave(&ahcd->lock, flags);
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if (!HC_IS_RUNNING(hcd->state)) {
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sanitize:
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ed->state = ED_IDLE;
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finish_unlinks(ahcd, 0);
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}
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switch (ed->state) {
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case ED_UNLINK: /* wait for hw to finish? */
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/* major IRQ delivery trouble loses INTR_SOFI too... */
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if (limit-- == 0) {
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admhc_warn(ahcd, "IRQ INTR_SOFI lossage\n");
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goto sanitize;
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}
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spin_unlock_irqrestore(&ahcd->lock, flags);
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schedule_timeout_uninterruptible(1);
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goto rescan;
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case ED_IDLE: /* fully unlinked */
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if (list_empty(&ed->td_list)) {
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td_free (ahcd, ed->dummy);
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ed_free (ahcd, ed);
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break;
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}
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/* else FALL THROUGH */
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default:
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/* caller was supposed to have unlinked any requests;
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* that's not our job. can't recover; must leak ed.
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*/
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admhc_err(ahcd, "leak ed %p (#%02x) state %d%s\n",
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ed, ep->desc.bEndpointAddress, ed->state,
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list_empty(&ed->td_list) ? "" : " (has tds)");
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td_free(ahcd, ed->dummy);
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break;
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}
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ep->hcpriv = NULL;
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spin_unlock_irqrestore(&ahcd->lock, flags);
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return;
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}
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static int admhc_get_frame_number(struct usb_hcd *hcd)
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{
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struct admhcd *ahcd = hcd_to_admhcd(hcd);
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return admhc_frame_no(ahcd);
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}
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static void admhc_usb_reset(struct admhcd *ahcd)
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{
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#if 0
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ahcd->hc_control = admhc_readl(ahcd, &ahcd->regs->control);
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ahcd->hc_control &= OHCI_CTRL_RWC;
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admhc_writel(ahcd, ahcd->hc_control, &ahcd->regs->control);
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#else
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/* FIXME */
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ahcd->host_control = ADMHC_BUSS_RESET;
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admhc_writel(ahcd, ahcd->host_control ,&ahcd->regs->host_control);
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#endif
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}
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/* admhc_shutdown forcibly disables IRQs and DMA, helping kexec and
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* other cases where the next software may expect clean state from the
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* "firmware". this is bus-neutral, unlike shutdown() methods.
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*/
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static void
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admhc_shutdown(struct usb_hcd *hcd)
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{
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struct admhcd *ahcd;
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ahcd = hcd_to_admhcd(hcd);
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admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
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admhc_dma_disable(ahcd);
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admhc_usb_reset(ahcd);
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/* flush the writes */
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admhc_writel_flush(ahcd);
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}
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/*-------------------------------------------------------------------------*
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* HC functions
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*-------------------------------------------------------------------------*/
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static void admhc_eds_cleanup(struct admhcd *ahcd)
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{
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if (ahcd->ed_tails[PIPE_INTERRUPT]) {
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ed_free(ahcd, ahcd->ed_tails[PIPE_INTERRUPT]);
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ahcd->ed_tails[PIPE_INTERRUPT] = NULL;
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}
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if (ahcd->ed_tails[PIPE_ISOCHRONOUS]) {
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ed_free(ahcd, ahcd->ed_tails[PIPE_ISOCHRONOUS]);
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ahcd->ed_tails[PIPE_ISOCHRONOUS] = NULL;
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}
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if (ahcd->ed_tails[PIPE_CONTROL]) {
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ed_free(ahcd, ahcd->ed_tails[PIPE_CONTROL]);
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ahcd->ed_tails[PIPE_CONTROL] = NULL;
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}
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if (ahcd->ed_tails[PIPE_BULK]) {
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ed_free(ahcd, ahcd->ed_tails[PIPE_BULK]);
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ahcd->ed_tails[PIPE_BULK] = NULL;
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}
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ahcd->ed_head = NULL;
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}
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#define ED_DUMMY_INFO (ED_SPEED_FULL | ED_SKIP)
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static int admhc_eds_init(struct admhcd *ahcd)
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{
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struct ed *ed;
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ed = ed_create(ahcd, PIPE_INTERRUPT, ED_DUMMY_INFO);
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if (!ed)
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goto err;
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ahcd->ed_tails[PIPE_INTERRUPT] = ed;
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ed = ed_create(ahcd, PIPE_ISOCHRONOUS, ED_DUMMY_INFO);
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if (!ed)
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goto err;
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ahcd->ed_tails[PIPE_ISOCHRONOUS] = ed;
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ed->ed_prev = ahcd->ed_tails[PIPE_INTERRUPT];
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ahcd->ed_tails[PIPE_INTERRUPT]->ed_next = ed;
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ahcd->ed_tails[PIPE_INTERRUPT]->hwNextED = cpu_to_hc32(ahcd, ed->dma);
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ed = ed_create(ahcd, PIPE_CONTROL, ED_DUMMY_INFO);
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if (!ed)
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goto err;
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ahcd->ed_tails[PIPE_CONTROL] = ed;
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ed->ed_prev = ahcd->ed_tails[PIPE_ISOCHRONOUS];
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ahcd->ed_tails[PIPE_ISOCHRONOUS]->ed_next = ed;
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ahcd->ed_tails[PIPE_ISOCHRONOUS]->hwNextED = cpu_to_hc32(ahcd, ed->dma);
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ed = ed_create(ahcd, PIPE_BULK, ED_DUMMY_INFO);
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if (!ed)
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goto err;
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ahcd->ed_tails[PIPE_BULK] = ed;
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ed->ed_prev = ahcd->ed_tails[PIPE_CONTROL];
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ahcd->ed_tails[PIPE_CONTROL]->ed_next = ed;
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ahcd->ed_tails[PIPE_CONTROL]->hwNextED = cpu_to_hc32(ahcd, ed->dma);
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ahcd->ed_head = ahcd->ed_tails[PIPE_INTERRUPT];
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#ifdef ADMHC_VERBOSE_DEBUG
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admhc_dump_ed(ahcd, "ed intr", ahcd->ed_tails[PIPE_INTERRUPT], 1);
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admhc_dump_ed(ahcd, "ed isoc", ahcd->ed_tails[PIPE_ISOCHRONOUS], 1);
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admhc_dump_ed(ahcd, "ed ctrl", ahcd->ed_tails[PIPE_CONTROL], 1);
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admhc_dump_ed(ahcd, "ed bulk", ahcd->ed_tails[PIPE_BULK], 1);
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#endif
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return 0;
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err:
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admhc_eds_cleanup(ahcd);
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return -ENOMEM;
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}
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/* init memory, and kick BIOS/SMM off */
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static int admhc_init(struct admhcd *ahcd)
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{
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struct usb_hcd *hcd = admhcd_to_hcd(ahcd);
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int ret;
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admhc_disable(ahcd);
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ahcd->regs = hcd->regs;
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/* Disable HC interrupts */
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admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
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/* Read the number of ports unless overridden */
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if (ahcd->num_ports == 0)
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ahcd->num_ports = admhc_read_rhdesc(ahcd) & ADMHC_RH_NUMP;
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ret = admhc_mem_init(ahcd);
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if (ret)
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goto err;
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/* init dummy endpoints */
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ret = admhc_eds_init(ahcd);
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if (ret)
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goto err;
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create_debug_files(ahcd);
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return 0;
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err:
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admhc_stop(hcd);
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return ret;
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}
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/*-------------------------------------------------------------------------*/
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/* Start an OHCI controller, set the BUS operational
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* resets USB and controller
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* enable interrupts
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*/
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static int admhc_run(struct admhcd *ahcd)
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{
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u32 temp;
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int first = ahcd->fminterval == 0;
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struct usb_hcd *hcd = admhcd_to_hcd(ahcd);
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admhc_disable(ahcd);
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/* boot firmware should have set this up (5.1.1.3.1) */
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if (first) {
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temp = admhc_readl(ahcd, &ahcd->regs->fminterval);
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ahcd->fminterval = temp & ADMHC_SFI_FI_MASK;
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if (ahcd->fminterval != FI)
|
|
admhc_dbg(ahcd, "fminterval delta %d\n",
|
|
ahcd->fminterval - FI);
|
|
ahcd->fminterval |=
|
|
(FSLDP(ahcd->fminterval) << ADMHC_SFI_FSLDP_SHIFT);
|
|
/* also: power/overcurrent flags in rhdesc */
|
|
}
|
|
|
|
#if 0 /* TODO: not applicable */
|
|
/* Reset USB nearly "by the book". RemoteWakeupConnected was
|
|
* saved if boot firmware (BIOS/SMM/...) told us it's connected,
|
|
* or if bus glue did the same (e.g. for PCI add-in cards with
|
|
* PCI PM support).
|
|
*/
|
|
if ((ahcd->hc_control & OHCI_CTRL_RWC) != 0
|
|
&& !device_may_wakeup(hcd->self.controller))
|
|
device_init_wakeup(hcd->self.controller, 1);
|
|
#endif
|
|
|
|
switch (ahcd->host_control & ADMHC_HC_BUSS) {
|
|
case ADMHC_BUSS_OPER:
|
|
temp = 0;
|
|
break;
|
|
case ADMHC_BUSS_SUSPEND:
|
|
/* FALLTHROUGH ? */
|
|
case ADMHC_BUSS_RESUME:
|
|
ahcd->host_control = ADMHC_BUSS_RESUME;
|
|
temp = 10 /* msec wait */;
|
|
break;
|
|
/* case ADMHC_BUSS_RESET: */
|
|
default:
|
|
ahcd->host_control = ADMHC_BUSS_RESET;
|
|
temp = 50 /* msec wait */;
|
|
break;
|
|
}
|
|
admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
|
|
|
|
/* flush the writes */
|
|
admhc_writel_flush(ahcd);
|
|
|
|
msleep(temp);
|
|
temp = admhc_read_rhdesc(ahcd);
|
|
if (!(temp & ADMHC_RH_NPS)) {
|
|
/* power down each port */
|
|
for (temp = 0; temp < ahcd->num_ports; temp++)
|
|
admhc_write_portstatus(ahcd, temp, ADMHC_PS_CPP);
|
|
}
|
|
/* flush those writes */
|
|
admhc_writel_flush(ahcd);
|
|
|
|
/* 2msec timelimit here means no irqs/preempt */
|
|
spin_lock_irq(&ahcd->lock);
|
|
|
|
admhc_writel(ahcd, ADMHC_CTRL_SR, &ahcd->regs->gencontrol);
|
|
temp = 30; /* ... allow extra time */
|
|
while ((admhc_readl(ahcd, &ahcd->regs->gencontrol) & ADMHC_CTRL_SR) != 0) {
|
|
if (--temp == 0) {
|
|
spin_unlock_irq(&ahcd->lock);
|
|
admhc_err(ahcd, "USB HC reset timed out!\n");
|
|
return -1;
|
|
}
|
|
udelay(1);
|
|
}
|
|
|
|
/* enable HOST mode, before access any host specific register */
|
|
admhc_writel(ahcd, ADMHC_CTRL_UHFE, &ahcd->regs->gencontrol);
|
|
|
|
/* Tell the controller where the descriptor list is */
|
|
admhc_writel(ahcd, (u32)ahcd->ed_head->dma, &ahcd->regs->hosthead);
|
|
|
|
periodic_reinit(ahcd);
|
|
|
|
/* use rhsc irqs after khubd is fully initialized */
|
|
hcd->poll_rh = 1;
|
|
hcd->uses_new_polling = 1;
|
|
|
|
#if 0
|
|
/* wake on ConnectStatusChange, matching external hubs */
|
|
admhc_writel(ahcd, RH_HS_DRWE, &ahcd->regs->roothub.status);
|
|
#else
|
|
/* FIXME roothub_write_status (ahcd, ADMHC_RH_DRWE); */
|
|
#endif
|
|
|
|
/* Choose the interrupts we care about now, others later on demand */
|
|
admhc_intr_ack(ahcd, ~0);
|
|
admhc_intr_enable(ahcd, ADMHC_INTR_INIT);
|
|
|
|
admhc_writel(ahcd, ADMHC_RH_NPS | ADMHC_RH_LPSC, &ahcd->regs->rhdesc);
|
|
|
|
/* flush those writes */
|
|
admhc_writel_flush(ahcd);
|
|
|
|
/* start controller operations */
|
|
ahcd->host_control = ADMHC_BUSS_OPER;
|
|
admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
|
|
|
|
temp = 20;
|
|
while ((admhc_readl(ahcd, &ahcd->regs->host_control)
|
|
& ADMHC_HC_BUSS) != ADMHC_BUSS_OPER) {
|
|
if (--temp == 0) {
|
|
spin_unlock_irq(&ahcd->lock);
|
|
admhc_err(ahcd, "unable to setup operational mode!\n");
|
|
return -1;
|
|
}
|
|
mdelay(1);
|
|
}
|
|
|
|
hcd->state = HC_STATE_RUNNING;
|
|
|
|
ahcd->next_statechange = jiffies + STATECHANGE_DELAY;
|
|
|
|
#if 0
|
|
/* FIXME: enabling DMA is always failed here for an unknown reason */
|
|
admhc_dma_enable(ahcd);
|
|
|
|
temp = 200;
|
|
while ((admhc_readl(ahcd, &ahcd->regs->host_control)
|
|
& ADMHC_HC_DMAE) != ADMHC_HC_DMAE) {
|
|
if (--temp == 0) {
|
|
spin_unlock_irq(&ahcd->lock);
|
|
admhc_err(ahcd, "unable to enable DMA!\n");
|
|
admhc_dump(ahcd, 1);
|
|
return -1;
|
|
}
|
|
mdelay(1);
|
|
}
|
|
|
|
#endif
|
|
|
|
spin_unlock_irq(&ahcd->lock);
|
|
|
|
mdelay(ADMHC_POTPGT);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* an interrupt happens */
|
|
|
|
static irqreturn_t admhc_irq(struct usb_hcd *hcd)
|
|
{
|
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
|
struct admhcd_regs __iomem *regs = ahcd->regs;
|
|
u32 ints;
|
|
|
|
ints = admhc_readl(ahcd, ®s->int_status);
|
|
if ((ints & ADMHC_INTR_INTA) == 0) {
|
|
/* no unmasked interrupt status is set */
|
|
return IRQ_NONE;
|
|
}
|
|
|
|
ints &= admhc_readl(ahcd, ®s->int_enable);
|
|
|
|
if (ints & ADMHC_INTR_FATI) {
|
|
/* e.g. due to PCI Master/Target Abort */
|
|
admhc_disable(ahcd);
|
|
admhc_err(ahcd, "Fatal Error, controller disabled\n");
|
|
admhc_dump(ahcd, 1);
|
|
admhc_usb_reset(ahcd);
|
|
}
|
|
|
|
if (ints & ADMHC_INTR_BABI) {
|
|
admhc_intr_disable(ahcd, ADMHC_INTR_BABI);
|
|
admhc_intr_ack(ahcd, ADMHC_INTR_BABI);
|
|
admhc_err(ahcd, "Babble Detected\n");
|
|
}
|
|
|
|
if (ints & ADMHC_INTR_INSM) {
|
|
admhc_vdbg(ahcd, "Root Hub Status Change\n");
|
|
ahcd->next_statechange = jiffies + STATECHANGE_DELAY;
|
|
admhc_intr_ack(ahcd, ADMHC_INTR_RESI | ADMHC_INTR_INSM);
|
|
|
|
/* NOTE: Vendors didn't always make the same implementation
|
|
* choices for RHSC. Many followed the spec; RHSC triggers
|
|
* on an edge, like setting and maybe clearing a port status
|
|
* change bit. With others it's level-triggered, active
|
|
* until khubd clears all the port status change bits. We'll
|
|
* always disable it here and rely on polling until khubd
|
|
* re-enables it.
|
|
*/
|
|
admhc_intr_disable(ahcd, ADMHC_INTR_INSM);
|
|
usb_hcd_poll_rh_status(hcd);
|
|
} else if (ints & ADMHC_INTR_RESI) {
|
|
/* For connect and disconnect events, we expect the controller
|
|
* to turn on RHSC along with RD. But for remote wakeup events
|
|
* this might not happen.
|
|
*/
|
|
admhc_vdbg(ahcd, "Resume Detect\n");
|
|
admhc_intr_ack(ahcd, ADMHC_INTR_RESI);
|
|
hcd->poll_rh = 1;
|
|
if (ahcd->autostop) {
|
|
spin_lock(&ahcd->lock);
|
|
admhc_rh_resume(ahcd);
|
|
spin_unlock(&ahcd->lock);
|
|
} else
|
|
usb_hcd_resume_root_hub(hcd);
|
|
}
|
|
|
|
if (ints & ADMHC_INTR_TDC) {
|
|
admhc_vdbg(ahcd, "Transfer Descriptor Complete\n");
|
|
admhc_intr_ack(ahcd, ADMHC_INTR_TDC);
|
|
if (HC_IS_RUNNING(hcd->state))
|
|
admhc_intr_disable(ahcd, ADMHC_INTR_TDC);
|
|
spin_lock(&ahcd->lock);
|
|
admhc_td_complete(ahcd);
|
|
spin_unlock(&ahcd->lock);
|
|
if (HC_IS_RUNNING(hcd->state))
|
|
admhc_intr_enable(ahcd, ADMHC_INTR_TDC);
|
|
}
|
|
|
|
if (ints & ADMHC_INTR_SO) {
|
|
/* could track INTR_SO to reduce available PCI/... bandwidth */
|
|
admhc_vdbg(ahcd, "Schedule Overrun\n");
|
|
}
|
|
|
|
#if 1
|
|
spin_lock(&ahcd->lock);
|
|
if (ahcd->ed_rm_list)
|
|
finish_unlinks(ahcd, admhc_frame_no(ahcd));
|
|
|
|
if ((ints & ADMHC_INTR_SOFI) != 0 && !ahcd->ed_rm_list
|
|
&& HC_IS_RUNNING(hcd->state))
|
|
admhc_intr_disable(ahcd, ADMHC_INTR_SOFI);
|
|
spin_unlock(&ahcd->lock);
|
|
#else
|
|
if (ints & ADMHC_INTR_SOFI) {
|
|
admhc_vdbg(ahcd, "Start Of Frame\n");
|
|
spin_lock(&ahcd->lock);
|
|
|
|
/* handle any pending ED removes */
|
|
finish_unlinks(ahcd, admhc_frameno(ahcd));
|
|
|
|
/* leaving INTR_SOFI enabled when there's still unlinking
|
|
* to be done in the (next frame).
|
|
*/
|
|
if ((ahcd->ed_rm_list == NULL) ||
|
|
HC_IS_RUNNING(hcd->state) == 0)
|
|
/*
|
|
* disable INTR_SOFI if there are no unlinking to be
|
|
* done (in the next frame)
|
|
*/
|
|
admhc_intr_disable(ahcd, ADMHC_INTR_SOFI);
|
|
|
|
spin_unlock(&ahcd->lock);
|
|
}
|
|
#endif
|
|
|
|
if (HC_IS_RUNNING(hcd->state)) {
|
|
admhc_intr_ack(ahcd, ints);
|
|
admhc_intr_enable(ahcd, ADMHC_INTR_MIE);
|
|
admhc_writel_flush(ahcd);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static void admhc_stop(struct usb_hcd *hcd)
|
|
{
|
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
|
|
|
admhc_dump(ahcd, 1);
|
|
|
|
flush_scheduled_work();
|
|
|
|
admhc_usb_reset(ahcd);
|
|
admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
|
|
|
|
free_irq(hcd->irq, hcd);
|
|
hcd->irq = -1;
|
|
|
|
remove_debug_files(ahcd);
|
|
admhc_eds_cleanup(ahcd);
|
|
admhc_mem_cleanup(ahcd);
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#ifdef CONFIG_ADM5120
|
|
#include "adm5120-drv.c"
|
|
#define PLATFORM_DRIVER usb_hcd_adm5120_driver
|
|
#endif
|
|
|
|
#if !defined(PLATFORM_DRIVER)
|
|
#error "missing bus glue for admhc-hcd"
|
|
#endif
|
|
|
|
#define DRIVER_INFO DRIVER_DESC " version " DRIVER_VERSION
|
|
|
|
static int __init admhc_hcd_mod_init(void)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (usb_disabled())
|
|
return -ENODEV;
|
|
|
|
pr_info("%s: " DRIVER_INFO "\n", hcd_name);
|
|
pr_info("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
|
|
sizeof (struct ed), sizeof (struct td));
|
|
|
|
#ifdef DEBUG
|
|
admhc_debug_root = debugfs_create_dir("admhc", NULL);
|
|
if (!admhc_debug_root) {
|
|
ret = -ENOENT;
|
|
goto error_debug;
|
|
}
|
|
#endif
|
|
|
|
#ifdef PLATFORM_DRIVER
|
|
ret = platform_driver_register(&PLATFORM_DRIVER);
|
|
if (ret < 0)
|
|
goto error_platform;
|
|
#endif
|
|
|
|
return ret;
|
|
|
|
#ifdef PLATFORM_DRIVER
|
|
platform_driver_unregister(&PLATFORM_DRIVER);
|
|
error_platform:
|
|
#endif
|
|
|
|
#ifdef DEBUG
|
|
debugfs_remove(admhc_debug_root);
|
|
admhc_debug_root = NULL;
|
|
error_debug:
|
|
#endif
|
|
return ret;
|
|
}
|
|
module_init(admhc_hcd_mod_init);
|
|
|
|
static void __exit admhc_hcd_mod_exit(void)
|
|
{
|
|
platform_driver_unregister(&PLATFORM_DRIVER);
|
|
#ifdef DEBUG
|
|
debugfs_remove(admhc_debug_root);
|
|
#endif
|
|
}
|
|
module_exit(admhc_hcd_mod_exit);
|
|
|
|
MODULE_AUTHOR(DRIVER_AUTHOR);
|
|
MODULE_DESCRIPTION(DRIVER_INFO);
|
|
MODULE_VERSION(DRIVER_VERSION);
|
|
MODULE_LICENSE("GPL v2");
|