af92022fde
SVN-Revision: 17127
87 lines
2.4 KiB
Diff
87 lines
2.4 KiB
Diff
--- a/arch/arm/mach-s3c2442/Kconfig
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+++ b/arch/arm/mach-s3c2442/Kconfig
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@@ -25,6 +25,21 @@ config SMDK2440_CPU2442
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depends on ARCH_S3C2440
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select CPU_S3C2442
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+config MACH_NEO1973_GTA02
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+ bool "Openmoko Freerunner GSM Phone (GTA02 Hardware)"
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+ select CPU_S3C2442
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+ select MFD_PCF50633
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+ select PCF50633_GPIO
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+ select I2C
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+ select POWER_SUPPLY
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+ select MACH_NEO1973
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+ select S3C_PWM
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+ select FIQ
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+ select S3C_DEV_USB_HOST
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+ select S3C24XX_GPIO_EXTRA64
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+ help
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+ Say Y here if you are using the Openmoko Freerunner GSM Phone
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+
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endmenu
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--- a/arch/arm/mach-s3c2442/Makefile
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+++ b/arch/arm/mach-s3c2442/Makefile
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@@ -9,8 +9,11 @@ obj-m :=
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obj-n :=
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obj- :=
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+obj-$(CONFIG_S3C2440_C_FIQ) += fiq_c_isr.o
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+
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obj-$(CONFIG_CPU_S3C2442) += s3c2442.o
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obj-$(CONFIG_CPU_S3C2442) += clock.o
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+obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
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# Machine support
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--- a/arch/arm/mach-s3c2410/include/mach/irqs.h
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+++ b/arch/arm/mach-s3c2410/include/mach/irqs.h
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@@ -153,9 +153,9 @@
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#define IRQ_S3C2443_AC97 S3C2410_IRQSUB(28)
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#ifdef CONFIG_CPU_S3C2443
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-#define NR_IRQS (IRQ_S3C2443_AC97+1)
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+#define _NR_IRQS (IRQ_S3C2443_AC97+1)
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#else
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-#define NR_IRQS (IRQ_S3C2440_AC97+1)
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+#define _NR_IRQS (IRQ_S3C2440_AC97+1)
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#endif
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/* compatibility define. */
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@@ -167,4 +167,33 @@
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/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */
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#define FIQ_START IRQ_EINT0
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+
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+/*
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+ * The next 16 interrupts are for board specific purposes. Since
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+ * the kernel can only run on one machine at a time, we can re-use
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+ * these. If you need more, increase IRQ_BOARD_END, but keep it
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+ * within sensible limits.
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+ */
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+#define IRQ_BOARD_START _NR_IRQS
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+#define IRQ_BOARD_END (_NR_IRQS + 10)
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+
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+#if defined(CONFIG_MACH_NEO1973_GTA02)
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+#define NR_IRQS (IRQ_BOARD_END)
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+#else
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+#define NR_IRQS (IRQ_BOARD_START)
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+#endif
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+
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+/* Neo1973 GTA02 interrupts */
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+#define NEO1973_GTA02_IRQ(x) (IRQ_BOARD_START + (x))
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+#define IRQ_GLAMO(x) NEO1973_GTA02_IRQ(x)
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+#define IRQ_GLAMO_HOSTBUS IRQ_GLAMO(0)
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+#define IRQ_GLAMO_JPEG IRQ_GLAMO(1)
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+#define IRQ_GLAMO_MPEG IRQ_GLAMO(2)
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+#define IRQ_GLAMO_MPROC1 IRQ_GLAMO(3)
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+#define IRQ_GLAMO_MPROC0 IRQ_GLAMO(4)
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+#define IRQ_GLAMO_CMDQUEUE IRQ_GLAMO(5)
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+#define IRQ_GLAMO_2D IRQ_GLAMO(6)
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+#define IRQ_GLAMO_MMC IRQ_GLAMO(7)
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+#define IRQ_GLAMO_RISC IRQ_GLAMO(8)
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+
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#endif /* __ASM_ARCH_IRQ_H */
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