2e31e4cea2
SVN-Revision: 31379
86 lines
1.9 KiB
Diff
86 lines
1.9 KiB
Diff
--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -365,6 +365,8 @@ config ARCH_CNS21XX
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select CPU_FA526
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select PLAT_FA
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select PLAT_FA_TIME
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+ select PLAT_FA_GPIO
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+ select ARCH_REQUIRE_GPIOLIB
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select ARM_L1_CACHE_SHIFT_4
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help
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Support for Cavium Networks CNS21xx family.
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--- a/arch/arm/mach-cns21xx/common.h
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+++ b/arch/arm/mach-cns21xx/common.h
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@@ -13,6 +13,7 @@
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void cns21xx_restart(char mode, const char *cmd);
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void cns21xx_map_io(void);
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void cns21xx_init_irq(void);
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+void cns21xx_gpio_init(void);
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extern struct sys_timer cns21xx_timer;
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--- /dev/null
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+++ b/arch/arm/mach-cns21xx/gpio.c
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@@ -0,0 +1,45 @@
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+/*
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+ * Copyright (c) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
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+ *
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+ * This file is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License, Version 2, as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <plat/gpio.h>
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+
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+#include <mach/cns21xx.h>
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+#include <mach/irqs.h>
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+
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+static struct fa_gpio_chip cns21xx_gpio_chips[] = {
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+ {
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+ .gpio_chip = {
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+ .label = "GPIOA",
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+ .base = 0,
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+ .ngpio = 32,
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+ },
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+
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+ .map_base = CNS21XX_GPIOA_BASE,
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+ .irq_base = CNS21XX_GPIO_IRQ_BASE,
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+ }, {
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+ .gpio_chip = {
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+ .label = "GPIOB",
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+ .base = 32,
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+ .ngpio = 32,
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+ },
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+
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+ .map_base = CNS21XX_GPIOB_BASE,
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+ .irq_base = CNS21XX_GPIO_IRQ_BASE + 32,
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+ }
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+};
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+
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+static struct fa_gpio_data cns21xx_gpio_data = {
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+ .chips = cns21xx_gpio_chips,
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+ .nchips = ARRAY_SIZE(cns21xx_gpio_chips),
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+ .irq = CNS21XX_IRQ_GPIO,
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+};
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+
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+void __init cns21xx_gpio_init(void)
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+{
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+ fa_gpio_init(&cns21xx_gpio_data);
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+}
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--- /dev/null
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+++ b/arch/arm/mach-cns21xx/include/mach/gpio.h
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@@ -0,0 +1,2 @@
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+/* empty */
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+
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--- a/arch/arm/mach-cns21xx/Makefile
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+++ b/arch/arm/mach-cns21xx/Makefile
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@@ -4,7 +4,7 @@
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# Object file lists.
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-obj-y := core.o devices.o irq.o mm.o time.o
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+obj-y := core.o devices.o gpio.o irq.o mm.o time.o
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# machine specific files
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