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cd6dd1c01e
Apart from improved power consumption, this fixes the runtime errors
from the pmdomain driver (failed to set idle on domain '%s')
Backport four clk fixes while at it.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/19925
(cherry picked from commit 13db7a0708)
[rebased upon 24.10 branch]
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/19989
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
91 lines
3.0 KiB
Diff
91 lines
3.0 KiB
Diff
From fe0fb6675fa48cade97d8bcd46226479c4a704df Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Wed, 11 Dec 2024 17:58:52 +0100
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Subject: [PATCH] clk: rockchip: expose rockchip_clk_set_lookup
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Move rockchip_clk_add_lookup to clk.h, so that it can be used
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by sub-devices with their own driver. These might also have to
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do a lookup, so rename the function to rockchip_clk_set_lookup
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and add a matching rockchip_clk_get_lookup.
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20241211165957.94922-4-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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drivers/clk/rockchip/clk.c | 14 ++++----------
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drivers/clk/rockchip/clk.h | 12 ++++++++++++
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2 files changed, 16 insertions(+), 10 deletions(-)
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--- a/drivers/clk/rockchip/clk.c
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+++ b/drivers/clk/rockchip/clk.c
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@@ -197,12 +197,6 @@ static void rockchip_fractional_approxim
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clk_fractional_divider_general_approximation(hw, rate, parent_rate, m, n);
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}
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-static void rockchip_clk_add_lookup(struct rockchip_clk_provider *ctx,
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- struct clk *clk, unsigned int id)
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-{
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- ctx->clk_data.clks[id] = clk;
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-}
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-
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static struct clk *rockchip_clk_register_frac_branch(
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struct rockchip_clk_provider *ctx, const char *name,
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const char *const *parent_names, u8 num_parents,
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@@ -292,7 +286,7 @@ static struct clk *rockchip_clk_register
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return mux_clk;
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}
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- rockchip_clk_add_lookup(ctx, mux_clk, child->id);
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+ rockchip_clk_set_lookup(ctx, mux_clk, child->id);
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/* notifier on the fraction divider to catch rate changes */
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if (frac->mux_frac_idx >= 0) {
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@@ -452,7 +446,7 @@ void rockchip_clk_register_plls(struct r
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continue;
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}
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- rockchip_clk_add_lookup(ctx, clk, list->id);
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+ rockchip_clk_set_lookup(ctx, clk, list->id);
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}
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}
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EXPORT_SYMBOL_GPL(rockchip_clk_register_plls);
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@@ -614,7 +608,7 @@ void rockchip_clk_register_branches(stru
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continue;
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}
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- rockchip_clk_add_lookup(ctx, clk, list->id);
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+ rockchip_clk_set_lookup(ctx, clk, list->id);
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}
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}
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EXPORT_SYMBOL_GPL(rockchip_clk_register_branches);
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@@ -638,7 +632,7 @@ void rockchip_clk_register_armclk(struct
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return;
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}
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- rockchip_clk_add_lookup(ctx, clk, lookup_id);
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+ rockchip_clk_set_lookup(ctx, clk, lookup_id);
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}
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EXPORT_SYMBOL_GPL(rockchip_clk_register_armclk);
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--- a/drivers/clk/rockchip/clk.h
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+++ b/drivers/clk/rockchip/clk.h
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@@ -970,6 +970,18 @@ struct rockchip_clk_branch {
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#define SGRF_GATE(_id, cname, pname) \
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FACTOR(_id, cname, pname, 0, 1, 1)
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+static inline struct clk *rockchip_clk_get_lookup(struct rockchip_clk_provider *ctx,
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+ unsigned int id)
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+{
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+ return ctx->clk_data.clks[id];
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+}
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+
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+static inline void rockchip_clk_set_lookup(struct rockchip_clk_provider *ctx,
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+ struct clk *clk, unsigned int id)
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+{
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+ ctx->clk_data.clks[id] = clk;
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+}
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+
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struct rockchip_clk_provider *rockchip_clk_init(struct device_node *np,
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void __iomem *base, unsigned long nr_clks);
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struct rockchip_clk_provider *rockchip_clk_init_early(struct device_node *np,
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