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cfc13c4459
moves extraction entries out of 11-ath10k-caldata and into the individual board's device-tree. Some notes: - mmc could work as well (not tested) - devices that pass the partitions via mtdparts bootargs are kept as is - gl-b2200 has a weird pcie wifi device (vendor claims 9886 wave 2. But firmware-extraction was for a wave 1 device?!) Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
197 lines
3.5 KiB
Plaintext
197 lines
3.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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#include "qcom-ipq4029-aruba-glenmorangie.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Aruba AP-303";
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compatible = "aruba,ap-303";
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aliases {
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led-boot = &led_system_green;
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led-failsafe = &led_system_red;
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led-running = &led_system_green;
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led-upgrade = &led_system_red;
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};
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leds {
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compatible = "gpio-leds";
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wifi_green {
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label = "green:wifi";
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gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0tpt";
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};
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wifi_amber {
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label = "amber:wifi";
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gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy1tpt";
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};
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led_system_red: system_red {
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label = "red:system";
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gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
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};
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led_system_green: system_green {
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label = "green:system";
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gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&tlmm {
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/*
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* In addition to the Pins listed below,
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* the following GPIOs have "features":
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* 54 - out - active low to force HW reset
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* 41 - out - active low to reset TPM
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* 43 - out - active low to reset BLE radio
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* 19 - in - active high when DC powered
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*/
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phy-reset {
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line-name = "PHY-reset";
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gpios = <42 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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output-high;
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};
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};
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&blsp1_spi1 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/*
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* There is no partition map for the NOR flash
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* in the stock firmware.
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*
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* All partitions here are based on offsets
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* found in the U-Boot GPL code and information
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* from smem.
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*/
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partition@0 {
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label = "sbl1";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "mibib";
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reg = <0x40000 0x20000>;
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read-only;
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};
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partition@60000 {
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label = "qsee";
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reg = <0x60000 0x60000>;
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read-only;
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};
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partition@c0000 {
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label = "cdt";
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reg = <0xc0000 0x10000>;
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read-only;
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};
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partition@d0000 {
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label = "ddrparams";
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reg = <0xd0000 0x10000>;
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read-only;
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};
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partition@e0000 {
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label = "ART";
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reg = <0xe0000 0x10000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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precal_art_1000: precal@1000 {
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reg = <0x1000 0x2f20>;
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};
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precal_art_5000: precal@5000 {
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reg = <0x5000 0x2f20>;
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};
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};
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partition@f0000 {
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label = "appsbl";
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reg = <0xf0000 0xf0000>;
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read-only;
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};
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partition@1e0000 {
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label = "mfginfo";
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reg = <0x1e0000 0x10000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_mfginfo_1d: macaddr@1d {
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reg = <0x1d 0x6>;
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};
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};
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partition@1f0000 {
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label = "apcd";
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reg = <0x1f0000 0x10000>;
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read-only;
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};
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partition@200000 {
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label = "osss";
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reg = <0x200000 0x180000>;
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read-only;
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};
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partition@380000 {
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label = "appsblenv";
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reg = <0x380000 0x10000>;
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};
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partition@390000 {
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label = "pds";
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reg = <0x390000 0x10000>;
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read-only;
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};
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partition@3a0000 {
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label = "fcache";
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reg = <0x3a0000 0x10000>;
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read-only;
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};
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partition@3b0000 {
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/* Called osss1 in smem */
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label = "u-boot-env-bak";
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reg = <0x3b0000 0x10000>;
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read-only;
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};
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partition@3f0000 {
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label = "u-boot-env";
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reg = <0x3f0000 0x10000>;
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read-only;
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};
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};
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};
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};
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